GB1228754A - - Google Patents

Info

Publication number
GB1228754A
GB1228754A GB1228754DA GB1228754A GB 1228754 A GB1228754 A GB 1228754A GB 1228754D A GB1228754D A GB 1228754DA GB 1228754 A GB1228754 A GB 1228754A
Authority
GB
United Kingdom
Prior art keywords
implantation
ions
mask
region
base region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1228754A publication Critical patent/GB1228754A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • H01L29/93Variable capacitance diodes, e.g. varactors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Bipolar Transistors (AREA)

Abstract

1,228,754. Semi-conductor devices. ASSOCIATED SEMICONDUCTOR MFS. Ltd. 16 May, 1968 [26 May, 1967], No. 24762/67. Heading H1K. In the manufacture of a transistor the N+ (or P +) type emitter region 32 is initially provided at a surface 23 of an N(P) type body 22, and the P(N) type base region 31 is subsequently formed by ion implantation into the surface 23 through the region 32. The annealing step required after implantation to reduce the damage to the crystal lattice caused by ion bombardment may be carried out at a sufficiently low temperature to eliminate the possibility of the " emitter dip " effect. In the Si transistor illustrated the emitter region 32 is produced by diffusion of phosphorus derived from phosphine through an oxide mask into an N-type epitaxial layer 22 on an N+ type substrate 21. The oxide mask is then removed over the area to be impregnated with ions and a fresh thin oxide coating 29 is deposited and densified by heating. An aluminium layer is evaporated over this coating, and is shaped by etching to provide a mask which overlies only the remnants of the first oxide mask 24. Boron ions are then implanted to form the base region 31. An R.F. ion source fed with boron trichloride is used, the beam being analysed magnetically to filter off unwanted contaminant ions. Ion energies increasing or decreasing in the range 10-130 kev are used, the axis of incidence of the beam being arranged to be within 7 degrees of a (111) axis of the crystal. After implantation the remaining aluminium mask is removed and the semi-conductor body is annealed for 30 mins. at 600-800‹ C. in dry N 2 . This causes a small adjustment of the junctions. Aluminium electrodes 36, 38 are then applied in a conventional manner. In the embodiment of Figs. 9-12 (not shown) a relatively thin oxide layer (65) is formed in an aperture in a thicker oxide layer (64) over the area ultimately to be implanted with ions. A small aperture (66) is opened through the layer (65) and the emitter region is diffused therethrough, a thin phosphosilicate glass coating (69) simultaneously forming in the aperture (66). The aluminium mask (70) is then applied as described above, and ion implantation and annealing are carried out to form the base region (72). An anodic oxidation step may be included prior to implantation to render the insulating covering of the aperture (66) as thick as the remainder of the oxide layer (65), and thereby to ensure a uniform thickness for the base region. The initial formation of the emitter region may, according to a further alternative, be by implantation of phosphorus ions using phosphorus trichloride as the source. The zone to be thus implanted may first be rendered amorphous by bombardment with ions which do not affect conductivity, thus minimizing channeling of the phosphorus ions. After phosphorus implantation through an aluminium mask, but prior to implantation of the boron ions to form the base region, 30 min. annealing stage at 900‹ C. is performed. Prior art methods are described in which the base region is first produced by diffusion or ion implantation and the emitter region is then formed by ion implantation. The subsequent high temperature anneal necessary to reduce damage in the emitter region produces the undesirable " emitter dip " effect. Ge and GaAs are also referred to as suitable semi-conductor materials.
GB1228754D 1967-05-26 1967-05-26 Expired GB1228754A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2476267 1967-05-26

Publications (1)

Publication Number Publication Date
GB1228754A true GB1228754A (en) 1971-04-21

Family

ID=10216859

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1228754D Expired GB1228754A (en) 1967-05-26 1967-05-26

Country Status (6)

Country Link
CH (1) CH474158A (en)
DE (1) DE1764372C3 (en)
FR (1) FR1573306A (en)
GB (1) GB1228754A (en)
NL (1) NL151558B (en)
SE (1) SE352196B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1263009A (en) * 1969-03-31 1972-02-09 Tokyo Shibaura Electric Co A method for manufacturing a semiconductor device and such device prepared thereby
GB1332931A (en) * 1970-01-15 1973-10-10 Mullard Ltd Methods of manufacturing a semiconductor device
FR2096876B1 (en) * 1970-07-09 1973-08-10 Thomson Csf
NL170348C (en) * 1970-07-10 1982-10-18 Philips Nv METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE APPLYING TO A SURFACE OF A SEMICONDUCTOR BODY AGAINST DOTTING AND AGAINST THERMAL OXIDICATION MASK MATERIAL, PRE-FRIENDLY COVERING THE WINDOWS OF THE WINDOWS IN THE MATERIALS The semiconductor body with the mask is subjected to a thermal oxidation treatment to form an oxide pattern that at least partially fills in the recesses.
GB1355806A (en) * 1970-12-09 1974-06-05 Mullard Ltd Methods of manufacturing a semiconductor device

Also Published As

Publication number Publication date
FR1573306A (en) 1969-07-04
NL6807438A (en) 1968-11-27
DE1764372C3 (en) 1975-01-16
SE352196B (en) 1972-12-18
DE1764372A1 (en) 1972-04-20
DE1764372B2 (en) 1974-06-12
CH474158A (en) 1969-06-15
NL151558B (en) 1976-11-15

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Legal Events

Date Code Title Description
PS Patent sealed
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee