GB1135718A - Code translator - Google Patents
Code translatorInfo
- Publication number
- GB1135718A GB1135718A GB1345967A GB1345967A GB1135718A GB 1135718 A GB1135718 A GB 1135718A GB 1345967 A GB1345967 A GB 1345967A GB 1345967 A GB1345967 A GB 1345967A GB 1135718 A GB1135718 A GB 1135718A
- Authority
- GB
- United Kingdom
- Prior art keywords
- register
- digit code
- memory
- bits
- digit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Logic Circuits (AREA)
Abstract
1,135,718. Codes. INTERNATIONAL STANDARD ELECTRIC CORP. 22 March, 1967 [29 March, 1966], No. 13459/67. Heading G4H. A coder for translating an n-digit code into another n-digit code includes three translating circuits which each translate an applied n-digit code into another n-digit code, the input signal being selectively fed to the circuits under the control of a programme stored in a memory. In the embodiment described (Fig. 6) the transformation which it is required to perform and which is the product of three transformations P, Q, R which are affected by circuits 20, 21, 22 is fed via a register 49 and AND gates 48 into the register 47 of a ferromagnetic matrix memory 50 causing read out in a subsequent time interval of one twenty-four bit row of the memory. Each two bits of the row represent one of the transformations P, Q, R and the contents of the register 43 are transferred to a shift register 40 which is shifted two bits at a time to successively enter the bits representing the transformation into a decoding circuit 39. The decoding circuit 39 enables one of the AND gates 32, 33, 34 to enable an n-digit number entered via OR gate 36 into a register 23 to be transformed in the associated circuit 20, 21, or 22 and then fed back into the register 23 to be operated on again in accordance with the next two bit digit entered into decoder 39. When two zero bits are stored in the left hand side of shift register 40, indicating that the programme is complete an output signal Fi from the decoder 39 enables an AND gate 37 so that the transformed n-digit code may be read out. If the programme comprises more than 12 successive transformations, it is stored in successive lines of the memory 50.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR55425A FR1539615A (en) | 1966-03-29 | 1966-03-29 | Training for translators |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1135718A true GB1135718A (en) | 1968-12-04 |
Family
ID=8604952
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1345967A Expired GB1135718A (en) | 1966-03-29 | 1967-03-22 | Code translator |
Country Status (6)
Country | Link |
---|---|
BE (1) | BE696214A (en) |
CH (1) | CH456691A (en) |
DE (1) | DE1512258A1 (en) |
FR (1) | FR1539615A (en) |
GB (1) | GB1135718A (en) |
NL (1) | NL6704504A (en) |
-
1966
- 1966-03-29 FR FR55425A patent/FR1539615A/en not_active Expired
-
1967
- 1967-03-22 GB GB1345967A patent/GB1135718A/en not_active Expired
- 1967-03-23 DE DE19671512258 patent/DE1512258A1/en active Pending
- 1967-03-29 NL NL6704504A patent/NL6704504A/xx unknown
- 1967-03-29 CH CH439567A patent/CH456691A/en unknown
- 1967-03-29 BE BE696214D patent/BE696214A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
DE1512258A1 (en) | 1969-05-22 |
BE696214A (en) | 1967-09-29 |
FR1539615A (en) | 1968-09-20 |
NL6704504A (en) | 1967-10-02 |
CH456691A (en) | 1968-07-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1115765A (en) | Improvements in or relating to electronic data processing apparatus | |
GB774936A (en) | Improvements in or relating to electrical apparatus for sorting data | |
GB890323A (en) | Improvements in or relating to electronic data processing apparatus | |
US3008127A (en) | Information handling apparatus | |
GB1105582A (en) | Information processing systems | |
GB1069375A (en) | Calculator apparatus for distinguishing meaningful digits | |
US3693162A (en) | Subroutine call and return means for an electronic calculator | |
GB745907A (en) | Improvements in or relating to electronic apparatus for translating a number from a first to a second radix of notation | |
GB1069128A (en) | Calculator decimal point alignment apparatus | |
US3961170A (en) | Fixed point to floating point conversion in an electronic computer | |
GB1070423A (en) | Improvements in or relating to variable word length data processing apparatus | |
GB1120791A (en) | System for reading, recording and resetting registered data | |
GB1187622A (en) | Improvements in or relating to apparatus for Generating Position-Control Signals | |
GB1135718A (en) | Code translator | |
US3026035A (en) | Decimal to binary conversion | |
US3947663A (en) | Magnetic card writing and reading device | |
GB977430A (en) | Apparatus to generate an electrical binary representation of a number from a succession of electrical binary representations of decimal digits of the number | |
US2998192A (en) | Computer register | |
GB1129659A (en) | Signal generating circuits | |
US3828322A (en) | Electronic computers | |
US3505503A (en) | Scaler reading device | |
GB1042785A (en) | Improvements in or relating to calculating machines | |
GB1106427A (en) | Data processing apparatus | |
GB1151725A (en) | Register controlling sytem. | |
GB1114503A (en) | Improvements in or relating to data handling apparatus |