GB1022305A - Improvements relating to electric signalling systems - Google Patents

Abstract

1,022,305. Multiplex pulse signalling. ASSOCIATED ELECTRICAL INDUSTRIES Ltd. Oct. 29, 1964 [Dec. 18, 1963; May 22, 1964], Nos. 49982/63 and 21237/64. Heading H4L. In a time division multiplex pulse codesignalling system, for synchronizing purposes the first time slot in each frame is occupied by an auxiliary pulse AP1, Fig. 2, and a predetermined number of time slots at the end of the frame (as shown five) are left unoccupied to provide a continuous SPACE signal, further auxiliary pulses AP2 to AP5 being allotted to certain other time slots to ensure that no other SPACE signal of the same duration can occur. At a reciver, Fig. 1, incoming pulses are supplied to a pulse shaper PS1 providing an output W/R. Immediately before the occurrence of the leading edge of pulse P1, i.e. the leading edge of pulse AP1, a pulse counter PC is in its count-of-four condition and accordingly applies an inhibiting condition to a pulse generator PG. Upon the start of pulse AP1 a reset circuit RC returns the counter to zero, thus allowing the pulse generator PG to start and supply pulses to a terminal T3 and to a pulse shaper PS2. The pulse generator operates at twice the recurrence frequency of the time slots of Fig. 2 and the shaper PS2 is of the divide-by-two trigger type and produces a brief pulse X in the centre of each time slot. For the duration of pulse P1 a gate G1 is inhibited and prevents pulses XP1 to XP6 from the shaper from stepping the counter PC. At the end of pulse P1 the gate G1 is opened and pulses XP7 and XP8 step the counter to a count of two but the leading edge of pulse P2 will reset the counter to zero and close the gate G1. The counter will only reach its count of four after the occurrence of pulse P4 and will then stop the generator PG and supply a pulse SP constituting a synchronizing signal at output terminal T2. In a modification, Fig. 3 (not shown), timing pulses are received on a separate channel from the transmitter via an INHIBIT gate which replaces the pulse generator PG and is similarly controlled by the counter PC. In this arrangement the clock pulse recurrence frequency may be variable. A system for multiplexing various telemetering, supervisory and control signals using the synchronizing arrangement of Fig. 1 is described. Means are included for transmitting a parity bit in the event that the number of pulses transmitted during a frame would otherwise be an even number. In this embodiment the frame are arranged in groups, each group consisting of a predetermined number of frames. The end of each group is indicated by the transmission of a continuous MARK signal for a longer period than would occur normally.