GB0000562D0 - Method for forming a trench on a semiconductor device - Google Patents

Method for forming a trench on a semiconductor device

Info

Publication number
GB0000562D0
GB0000562D0 GB0000562A GB0000562A GB0000562D0 GB 0000562 D0 GB0000562 D0 GB 0000562D0 GB 0000562 A GB0000562 A GB 0000562A GB 0000562 A GB0000562 A GB 0000562A GB 0000562 D0 GB0000562 D0 GB 0000562D0
Authority
GB
United Kingdom
Prior art keywords
trench
forming
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0000562A
Other versions
GB2345578A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of GB0000562D0 publication Critical patent/GB0000562D0/en
Publication of GB2345578A publication Critical patent/GB2345578A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/66181Conductor-insulator-semiconductor capacitors, e.g. trench capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • H01L21/76235Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls trench shape altered by a local oxidation of silicon process step, e.g. trench corner rounding by LOCOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76237Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Element Separation (AREA)
GB0000562A 1999-01-11 2000-01-11 A method of manufacturing a semiconductor device including a trench Withdrawn GB2345578A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11004531A JP2000208606A (en) 1999-01-11 1999-01-11 Semiconductor device and production thereof

Publications (2)

Publication Number Publication Date
GB0000562D0 true GB0000562D0 (en) 2000-03-01
GB2345578A GB2345578A (en) 2000-07-12

Family

ID=11586637

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0000562A Withdrawn GB2345578A (en) 1999-01-11 2000-01-11 A method of manufacturing a semiconductor device including a trench

Country Status (4)

Country Link
JP (1) JP2000208606A (en)
KR (1) KR20000053417A (en)
CN (1) CN1260586A (en)
GB (1) GB2345578A (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100608386B1 (en) * 2005-06-30 2006-08-08 주식회사 하이닉스반도체 Method of manufacturing semiconductor device
CN100416793C (en) * 2005-11-24 2008-09-03 上海华虹Nec电子有限公司 Method for improving isolation effect of apparatus in shallow groove isolation techniques
JP2008135458A (en) * 2006-11-27 2008-06-12 Elpida Memory Inc Semiconductor device and its fabrication process
KR20100025291A (en) * 2008-08-27 2010-03-09 매그나칩 반도체 유한회사 Semiconductor device and method for manufacturing the same
CN102110708A (en) * 2011-01-14 2011-06-29 北方工业大学 High-voltage isolation trench and manufacturing method thereof and metal oxide semiconductor (MOS) device
CN108109992B (en) * 2017-12-15 2020-08-11 温州曼昔维服饰有限公司 Manufacturing method of MIM capacitor

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5057444A (en) * 1985-03-05 1991-10-15 Matsushita Electric Industrial Co., Ltd. Method of fabricating semiconductor device
JPH0824166B2 (en) * 1986-11-26 1996-03-06 松下電子工業株式会社 Method for manufacturing semiconductor device
US5112762A (en) * 1990-12-05 1992-05-12 Anderson Dirk N High angle implant around top of trench to reduce gated diode leakage
US5643822A (en) * 1995-01-10 1997-07-01 International Business Machines Corporation Method for forming trench-isolated FET devices

Also Published As

Publication number Publication date
CN1260586A (en) 2000-07-19
KR20000053417A (en) 2000-08-25
JP2000208606A (en) 2000-07-28
GB2345578A (en) 2000-07-12

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)