FR3078792B1 - Circuit integre muni de leurres contre l'ingenierie inverse et procede de fabrication correspondant - Google Patents

Circuit integre muni de leurres contre l'ingenierie inverse et procede de fabrication correspondant Download PDF

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Publication number
FR3078792B1
FR3078792B1 FR1851957A FR1851957A FR3078792B1 FR 3078792 B1 FR3078792 B1 FR 3078792B1 FR 1851957 A FR1851957 A FR 1851957A FR 1851957 A FR1851957 A FR 1851957A FR 3078792 B1 FR3078792 B1 FR 3078792B1
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FR
France
Prior art keywords
integrated circuit
lures
manufacturing
circuit provided
reverse engineering
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1851957A
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English (en)
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FR3078792A1 (fr
Inventor
Abderrezak Marzaki
Mathieu Lisart
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1851957A priority Critical patent/FR3078792B1/fr
Priority to US16/292,958 priority patent/US11069628B2/en
Priority to CN201910169156.5A priority patent/CN110246839A/zh
Priority to CN201920283525.9U priority patent/CN209592037U/zh
Publication of FR3078792A1 publication Critical patent/FR3078792A1/fr
Application granted granted Critical
Publication of FR3078792B1 publication Critical patent/FR3078792B1/fr
Priority to US17/351,930 priority patent/US11710711B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/71—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information
    • G06F21/75—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure computing or processing of information by inhibiting the analysis of circuitry or operation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/86—Secure or tamper-resistant housings
    • G06F21/87—Secure or tamper-resistant housings by means of encapsulation, e.g. for integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/44—Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42—Simultaneous manufacture of periphery and memory cells
    • H10B41/49—Simultaneous manufacture of periphery and memory cells comprising different types of peripheral transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823462—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Manufacturing & Machinery (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

Le circuit intégré (IC) comprenant un premier domaine (LVP) destiné à être alimenté par une première tension d'alimentation (LVdd) et comportant au moins un premier transistor (PTb, NTb) comprenant une première région de grille (GTb) et une première région de diélectrique de grille (DE1), et un deuxième domaine (HVP) comportant au moins un deuxième transistor (FGT) comprenant une deuxième région de grille (CG) destinée à être polarisée à une deuxième tension (HVdd) supérieure à la première tension d'alimentation (LVdd) et une deuxième région de diélectrique de grille (DE2). Les première et deuxième régions de diélectrique de grille (DE1, DE2) sont de même constitution et sont configurées de façon à ce que ledit au moins un premier transistor (PTb, NTb) soit bloqué pour toute polarisation de ladite première région de grille (GTb) à une valeur inférieure ou égale à la première tension d'alimentation (LVdd).
FR1851957A 2018-03-07 2018-03-07 Circuit integre muni de leurres contre l'ingenierie inverse et procede de fabrication correspondant Active FR3078792B1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
FR1851957A FR3078792B1 (fr) 2018-03-07 2018-03-07 Circuit integre muni de leurres contre l'ingenierie inverse et procede de fabrication correspondant
US16/292,958 US11069628B2 (en) 2018-03-07 2019-03-05 Integrated circuit provided with decoys against reverse engineering and corresponding fabrication process
CN201910169156.5A CN110246839A (zh) 2018-03-07 2019-03-06 设置有防止逆向工程的诱饵的集成电路和对应的制造工艺
CN201920283525.9U CN209592037U (zh) 2018-03-07 2019-03-06 集成电路和电子设备
US17/351,930 US11710711B2 (en) 2018-03-07 2021-06-18 Integrated circuit provided with decoys against reverse engineering and corresponding fabrication process

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1851957 2018-03-07
FR1851957A FR3078792B1 (fr) 2018-03-07 2018-03-07 Circuit integre muni de leurres contre l'ingenierie inverse et procede de fabrication correspondant

Publications (2)

Publication Number Publication Date
FR3078792A1 FR3078792A1 (fr) 2019-09-13
FR3078792B1 true FR3078792B1 (fr) 2020-03-27

Family

ID=63209469

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1851957A Active FR3078792B1 (fr) 2018-03-07 2018-03-07 Circuit integre muni de leurres contre l'ingenierie inverse et procede de fabrication correspondant

Country Status (3)

Country Link
US (2) US11069628B2 (fr)
CN (2) CN110246839A (fr)
FR (1) FR3078792B1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3078792B1 (fr) * 2018-03-07 2020-03-27 Stmicroelectronics (Rousset) Sas Circuit integre muni de leurres contre l'ingenierie inverse et procede de fabrication correspondant

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5814850A (en) * 1995-08-22 1998-09-29 Nippon Steel Corporation Semiconductor device including a capacitor responsible for a power supply voltage to semiconductor device and capable of blocking an increased voltage
EP1156524B1 (fr) * 2000-05-15 2014-10-22 Micron Technology, Inc. Procédé de fabrication d'un circuit intégré ayant une partie à haute densité et une partie logique
TW546840B (en) * 2001-07-27 2003-08-11 Hitachi Ltd Non-volatile semiconductor memory device
KR20050011317A (ko) * 2003-07-22 2005-01-29 삼성전자주식회사 리버스 엔지니어링 방지수단을 구비하는 반도체 집적회로및 이의 리버스 엔지니어링 방지방법
FR2858113B1 (fr) * 2003-07-22 2008-04-25 Samsung Electronics Co Ltd Circuit integre a semi-conducteur et procede de protection contre l'ingenierie inverse
JP4928825B2 (ja) * 2006-05-10 2012-05-09 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN104160507B (zh) * 2011-12-28 2017-10-24 英特尔公司 在三栅极（finfet）工艺上集成多个栅极电介质晶体管的方法
US8836006B2 (en) * 2012-12-14 2014-09-16 Spansion Llc Integrated circuits with non-volatile memory and methods for manufacture
US9306058B2 (en) * 2013-10-02 2016-04-05 Infineon Technologies Ag Integrated circuit and method of manufacturing an integrated circuit
FR3078792B1 (fr) * 2018-03-07 2020-03-27 Stmicroelectronics (Rousset) Sas Circuit integre muni de leurres contre l'ingenierie inverse et procede de fabrication correspondant

Also Published As

Publication number Publication date
CN110246839A (zh) 2019-09-17
FR3078792A1 (fr) 2019-09-13
US20210313280A1 (en) 2021-10-07
US11069628B2 (en) 2021-07-20
US11710711B2 (en) 2023-07-25
US20190279947A1 (en) 2019-09-12
CN209592037U (zh) 2019-11-05

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