FR3071100B1 - Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant - Google Patents
Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant Download PDFInfo
- Publication number
- FR3071100B1 FR3071100B1 FR1758480A FR1758480A FR3071100B1 FR 3071100 B1 FR3071100 B1 FR 3071100B1 FR 1758480 A FR1758480 A FR 1758480A FR 1758480 A FR1758480 A FR 1758480A FR 3071100 B1 FR3071100 B1 FR 3071100B1
- Authority
- FR
- France
- Prior art keywords
- integrated circuit
- thinning
- rear face
- detection
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title abstract 4
- 238000001514 detection method Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/57—Protection from inspection, reverse engineering or tampering
- H01L23/576—Protection from inspection, reverse engineering or tampering using active circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0642—Isolation within the component, i.e. internal isolation
- H01L29/0649—Dielectric regions, e.g. SiO2 regions, air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8613—Mesa PN junction diodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Automation & Control Theory (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
Abstract
Circuit électronique intégré, comportant un substrat semi-conducteur (S) dans lequel est réalisé un premier caisson semi-conducteur (C1) d'un premier type de conductivité, le circuit intégré comportant en outre un dispositif (DIS) de détection d'un amincissement du substrat par sa face arrière comprenant une jonction PN (J), le dispositif étant configuré pour détecter un amincissement du substrat en comparant la valeur d'un courant circulant au travers de la jonction (J) à une valeur seuil.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1758480A FR3071100B1 (fr) | 2017-09-13 | 2017-09-13 | Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant |
US16/129,163 US10453808B2 (en) | 2017-09-13 | 2018-09-12 | Method for detecting thinning of an integrated circuit substrate via its rear face, and corresponding integrated circuit |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1758480 | 2017-09-13 | ||
FR1758480A FR3071100B1 (fr) | 2017-09-13 | 2017-09-13 | Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3071100A1 FR3071100A1 (fr) | 2019-03-15 |
FR3071100B1 true FR3071100B1 (fr) | 2021-12-10 |
Family
ID=61599241
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1758480A Active FR3071100B1 (fr) | 2017-09-13 | 2017-09-13 | Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant |
Country Status (2)
Country | Link |
---|---|
US (1) | US10453808B2 (fr) |
FR (1) | FR3071100B1 (fr) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3072211B1 (fr) * | 2017-10-11 | 2021-12-10 | St Microelectronics Rousset | Procede de detection d'une injection de fautes et d'un amincissement du substrat dans un circuit integre, et circuit integre associe |
FR3077678B1 (fr) | 2018-02-07 | 2022-10-21 | St Microelectronics Rousset | Procede de detection d'une atteinte a l'integrite d'un substrat semi-conducteur d'un circuit integre depuis sa face arriere, et dispositif correspondant |
FR3096175B1 (fr) * | 2019-05-13 | 2021-05-07 | St Microelectronics Rousset | Procédé de détection d’une atteinte éventuelle à l’intégrité d’un substrat semi-conducteur d’un circuit intégré depuis sa face arrière, et circuit intégré correspondant |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3050317A1 (fr) * | 2016-04-19 | 2017-10-20 | Stmicroelectronics Rousset | Puce electronique |
US10250258B2 (en) * | 2016-09-28 | 2019-04-02 | Nxp B.V. | Device and method for detecting semiconductor substrate thickness |
FR3069954B1 (fr) * | 2017-08-01 | 2020-02-07 | Stmicroelectronics (Rousset) Sas | Procede de detection d'un amincissement du substrat d'un circuit integre par sa face arriere, et circuit integre associe |
-
2017
- 2017-09-13 FR FR1758480A patent/FR3071100B1/fr active Active
-
2018
- 2018-09-12 US US16/129,163 patent/US10453808B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US10453808B2 (en) | 2019-10-22 |
US20190081011A1 (en) | 2019-03-14 |
FR3071100A1 (fr) | 2019-03-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR3071100B1 (fr) | Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant | |
EP3564937B1 (fr) | Procédé de détection de tension de seuil pour un transistor en couches minces de pilotage d'oled | |
FR3069954B1 (fr) | Procede de detection d'un amincissement du substrat d'un circuit integre par sa face arriere, et circuit integre associe | |
EP4254502A3 (fr) | Dispositif d'imagerie à semi-conducteurs | |
JP2016522890A5 (fr) | ||
EP2911093A3 (fr) | Procédé et dispositif de détection de ligne droite | |
JP2016027694A5 (ja) | 撮像装置、及び監視装置 | |
EP3564935A1 (fr) | Procédé de détection de valeur k pour transistor à couche mince d'attaque à oled | |
MX2018004708A (es) | Metodo y dispositivo de deteccion de linea del espacio de estacionamiento. | |
SG11201902868TA (en) | Optical measurement device and method | |
FR3065533B1 (fr) | Procede et systeme de detection d'un defaut dans une ligne de transmission a partir d'une mesure de phase | |
MY175546A (en) | Semiconductor device and control for testing a transistor and diode | |
AR108833A1 (es) | Sistema y método de detección de deterioro | |
JP2013224931A5 (fr) | ||
CN108304803A (zh) | 光检测电路、光检测方法和显示装置 | |
JP2007300264A5 (fr) | ||
FR3037142B1 (fr) | Dispositif de mesure de pression a fiabilite amelioree et procede de calibrage associe | |
US9863999B2 (en) | Circuit and method for inspecting semiconductor device | |
EP2871557A3 (fr) | Dispositif de fonctionnement | |
CO2021011317A2 (es) | Sistemas y métodos de detección de armas y dispositivos destructivos basados en perfil de campo electromagnético | |
FR3048103B1 (fr) | Procede de detection d'un amincissement du substrat semi-conducteur d'un circuit integre depuis sa face arriere et circuit integre correspondant | |
MX2019007044A (es) | Sistema para procesamiento de informacion. | |
FR3072211B1 (fr) | Procede de detection d'une injection de fautes et d'un amincissement du substrat dans un circuit integre, et circuit integre associe | |
FR3035150B1 (fr) | Procede, systeme et appareil pour detecter un instant de fermeture d'un injecteur | |
MX2020004336A (es) | Deteccion capacitiva accionada por pulsos para transistores de efecto campo. |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLSC | Publication of the preliminary search report |
Effective date: 20190315 |
|
PLFP | Fee payment |
Year of fee payment: 3 |
|
PLFP | Fee payment |
Year of fee payment: 4 |
|
PLFP | Fee payment |
Year of fee payment: 5 |
|
PLFP | Fee payment |
Year of fee payment: 6 |
|
PLFP | Fee payment |
Year of fee payment: 7 |