FR3071100B1 - Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant - Google Patents

Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant Download PDF

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Publication number
FR3071100B1
FR3071100B1 FR1758480A FR1758480A FR3071100B1 FR 3071100 B1 FR3071100 B1 FR 3071100B1 FR 1758480 A FR1758480 A FR 1758480A FR 1758480 A FR1758480 A FR 1758480A FR 3071100 B1 FR3071100 B1 FR 3071100B1
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FR
France
Prior art keywords
integrated circuit
thinning
rear face
detection
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1758480A
Other languages
English (en)
Other versions
FR3071100A1 (fr
Inventor
Alexandre Sarafianos
Abderrezak Marzaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Rousset SAS
Original Assignee
STMicroelectronics Rousset SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics Rousset SAS filed Critical STMicroelectronics Rousset SAS
Priority to FR1758480A priority Critical patent/FR3071100B1/fr
Priority to US16/129,163 priority patent/US10453808B2/en
Publication of FR3071100A1 publication Critical patent/FR3071100A1/fr
Application granted granted Critical
Publication of FR3071100B1 publication Critical patent/FR3071100B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/57Protection from inspection, reverse engineering or tampering
    • H01L23/576Protection from inspection, reverse engineering or tampering using active circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/14Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
    • H01L22/34Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0642Isolation within the component, i.e. internal isolation
    • H01L29/0649Dielectric regions, e.g. SiO2 regions, air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/8613Mesa PN junction diodes

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)

Abstract

Circuit électronique intégré, comportant un substrat semi-conducteur (S) dans lequel est réalisé un premier caisson semi-conducteur (C1) d'un premier type de conductivité, le circuit intégré comportant en outre un dispositif (DIS) de détection d'un amincissement du substrat par sa face arrière comprenant une jonction PN (J), le dispositif étant configuré pour détecter un amincissement du substrat en comparant la valeur d'un courant circulant au travers de la jonction (J) à une valeur seuil.
FR1758480A 2017-09-13 2017-09-13 Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant Active FR3071100B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR1758480A FR3071100B1 (fr) 2017-09-13 2017-09-13 Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant
US16/129,163 US10453808B2 (en) 2017-09-13 2018-09-12 Method for detecting thinning of an integrated circuit substrate via its rear face, and corresponding integrated circuit

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1758480 2017-09-13
FR1758480A FR3071100B1 (fr) 2017-09-13 2017-09-13 Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant

Publications (2)

Publication Number Publication Date
FR3071100A1 FR3071100A1 (fr) 2019-03-15
FR3071100B1 true FR3071100B1 (fr) 2021-12-10

Family

ID=61599241

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1758480A Active FR3071100B1 (fr) 2017-09-13 2017-09-13 Procede de detection d'un amincissement d'un substrat de circuit integre par sa face arriere, et circuit integre correspondant

Country Status (2)

Country Link
US (1) US10453808B2 (fr)
FR (1) FR3071100B1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3072211B1 (fr) * 2017-10-11 2021-12-10 St Microelectronics Rousset Procede de detection d'une injection de fautes et d'un amincissement du substrat dans un circuit integre, et circuit integre associe
FR3077678B1 (fr) 2018-02-07 2022-10-21 St Microelectronics Rousset Procede de detection d'une atteinte a l'integrite d'un substrat semi-conducteur d'un circuit integre depuis sa face arriere, et dispositif correspondant
FR3096175B1 (fr) * 2019-05-13 2021-05-07 St Microelectronics Rousset Procédé de détection d’une atteinte éventuelle à l’intégrité d’un substrat semi-conducteur d’un circuit intégré depuis sa face arrière, et circuit intégré correspondant

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3050317A1 (fr) * 2016-04-19 2017-10-20 Stmicroelectronics Rousset Puce electronique
US10250258B2 (en) * 2016-09-28 2019-04-02 Nxp B.V. Device and method for detecting semiconductor substrate thickness
FR3069954B1 (fr) * 2017-08-01 2020-02-07 Stmicroelectronics (Rousset) Sas Procede de detection d'un amincissement du substrat d'un circuit integre par sa face arriere, et circuit integre associe

Also Published As

Publication number Publication date
US10453808B2 (en) 2019-10-22
US20190081011A1 (en) 2019-03-14
FR3071100A1 (fr) 2019-03-15

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