FR3055712B1 - Titre non renseigne. - Google Patents
Titre non renseigne. Download PDFInfo
- Publication number
- FR3055712B1 FR3055712B1 FR1658291A FR1658291A FR3055712B1 FR 3055712 B1 FR3055712 B1 FR 3055712B1 FR 1658291 A FR1658291 A FR 1658291A FR 1658291 A FR1658291 A FR 1658291A FR 3055712 B1 FR3055712 B1 FR 3055712B1
- Authority
- FR
- France
- Prior art keywords
- title
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0372—Bistable circuits of the master-slave type
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Logic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1658291A FR3055712B1 (fr) | 2016-09-07 | 2016-09-07 | Titre non renseigne. |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1658291 | 2016-09-07 | ||
FR1658291A FR3055712B1 (fr) | 2016-09-07 | 2016-09-07 | Titre non renseigne. |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3055712A1 FR3055712A1 (fr) | 2018-03-09 |
FR3055712B1 true FR3055712B1 (fr) | 2018-09-28 |
Family
ID=58009883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1658291A Expired - Fee Related FR3055712B1 (fr) | 2016-09-07 | 2016-09-07 | Titre non renseigne. |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR3055712B1 (fr) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112800000B (zh) * | 2019-11-14 | 2023-07-18 | 海思光电子有限公司 | 一种电路以及电子设备 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4999528A (en) * | 1989-11-14 | 1991-03-12 | Keech Eugene E | Metastable-proof flip-flop |
DE102005060394B4 (de) * | 2005-12-16 | 2012-10-11 | Infineon Technologies Ag | Schaltungsanordnung und Verfahren zum Betreiben einer Schaltungsanordnung |
GB2516451A (en) * | 2013-07-22 | 2015-01-28 | Nordic Semiconductor Asa | Digital circuits |
-
2016
- 2016-09-07 FR FR1658291A patent/FR3055712B1/fr not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
FR3055712A1 (fr) | 2018-03-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 2 |
|
PLSC | Publication of the preliminary search report |
Effective date: 20180309 |
|
PLFP | Fee payment |
Year of fee payment: 3 |
|
ST | Notification of lapse |
Effective date: 20200906 |