FR2913833B1 - Convertisseur analogique-numerique parallele a double echelle statique - Google Patents
Convertisseur analogique-numerique parallele a double echelle statiqueInfo
- Publication number
- FR2913833B1 FR2913833B1 FR0701932A FR0701932A FR2913833B1 FR 2913833 B1 FR2913833 B1 FR 2913833B1 FR 0701932 A FR0701932 A FR 0701932A FR 0701932 A FR0701932 A FR 0701932A FR 2913833 B1 FR2913833 B1 FR 2913833B1
- Authority
- FR
- France
- Prior art keywords
- digital converter
- static scale
- double static
- parallel analogue
- analogue
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000003068 static effect Effects 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
- H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
- H03M1/362—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type the reference values being generated by a resistive voltage divider
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
- H03M1/0675—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy
- H03M1/0678—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components
- H03M1/068—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS
- H03M1/0682—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence using redundancy using additional components or elements, e.g. dummy components the original and additional components or elements being complementary to each other, e.g. CMOS using a differential network structure, i.e. symmetrical with respect to ground
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0701932A FR2913833B1 (fr) | 2007-03-16 | 2007-03-16 | Convertisseur analogique-numerique parallele a double echelle statique |
JP2009553145A JP2010521850A (ja) | 2007-03-16 | 2008-03-13 | 二重静的ラダーを備えた並列アナログ−デジタル変換器 |
PCT/EP2008/052989 WO2008113738A1 (fr) | 2007-03-16 | 2008-03-13 | Convertisseur analogique-numerique parallele a double echelle statique |
US12/530,521 US7999713B2 (en) | 2007-03-16 | 2008-03-13 | Parallel analog-digital converter with dual static ladder |
EP08717733A EP2135355A1 (fr) | 2007-03-16 | 2008-03-13 | Convertisseur analogique-numerique parallele a double echelle statique |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0701932A FR2913833B1 (fr) | 2007-03-16 | 2007-03-16 | Convertisseur analogique-numerique parallele a double echelle statique |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2913833A1 FR2913833A1 (fr) | 2008-09-19 |
FR2913833B1 true FR2913833B1 (fr) | 2009-06-12 |
Family
ID=38567031
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0701932A Active FR2913833B1 (fr) | 2007-03-16 | 2007-03-16 | Convertisseur analogique-numerique parallele a double echelle statique |
Country Status (5)
Country | Link |
---|---|
US (1) | US7999713B2 (fr) |
EP (1) | EP2135355A1 (fr) |
JP (1) | JP2010521850A (fr) |
FR (1) | FR2913833B1 (fr) |
WO (1) | WO2008113738A1 (fr) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9467160B2 (en) * | 2014-11-11 | 2016-10-11 | Mediatek Inc. | Flash ADC with interpolators |
US10116319B2 (en) * | 2017-03-03 | 2018-10-30 | Texas Instruments Incorporated | Resistive interpolation for an amplifier array |
JP7091800B2 (ja) * | 2018-04-16 | 2022-06-28 | 株式会社デンソー | 回路基板 |
US10673452B1 (en) | 2018-12-12 | 2020-06-02 | Texas Instruments Incorporated | Analog-to-digital converter with interpolation |
TWI743948B (zh) * | 2020-08-17 | 2021-10-21 | 瑞昱半導體股份有限公司 | 快閃式類比數位轉換器 |
US11438001B2 (en) * | 2020-12-24 | 2022-09-06 | Texas Instruments Incorporated | Gain mismatch correction for voltage-to-delay preamplifier array |
US11962318B2 (en) | 2021-01-12 | 2024-04-16 | Texas Instruments Incorporated | Calibration scheme for a non-linear ADC |
US11881867B2 (en) | 2021-02-01 | 2024-01-23 | Texas Instruments Incorporated | Calibration scheme for filling lookup table in an ADC |
Family Cites Families (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4004546A1 (de) * | 1990-02-14 | 1991-08-22 | Siemens Ag | Differentieller analog-digitalumsetzer |
US5157397A (en) * | 1991-01-28 | 1992-10-20 | Trw Inc. | Quantizer and related method for improving linearity |
JPH0774635A (ja) * | 1993-07-02 | 1995-03-17 | Mitsubishi Electric Corp | アナログ・デジタル変換装置 |
US5589831A (en) * | 1995-01-30 | 1996-12-31 | Samsung Semiconductor, Inc. | Fully differential flash ADC based on the voltage follower amplifier structure |
US6437724B1 (en) * | 1999-11-05 | 2002-08-20 | Texas Instruments Incorporated | Fully differential flash A/D converter |
US6504499B1 (en) * | 2000-11-01 | 2003-01-07 | International Business Machines Corporation | Analog-to-digital converter having positively biased differential reference inputs |
US6518898B1 (en) * | 2001-07-23 | 2003-02-11 | Texas Instruments Incorporated | System and method of background offset cancellation for flash ADCs |
US6614379B2 (en) * | 2001-08-29 | 2003-09-02 | Texas Instruments, Incorporated | Precise differential voltage interpolation analog-to-digital converter having double interpolation using nonlinear resistors |
JP4692979B2 (ja) * | 2001-08-30 | 2011-06-01 | ルネサスエレクトロニクス株式会社 | Ad変換器 |
US6646585B2 (en) * | 2002-04-05 | 2003-11-11 | Ess Technology, Inc. | Flash analog-to-digital converter |
US6885236B2 (en) * | 2002-06-14 | 2005-04-26 | Broadcom Corporation | Reference ladder having improved feedback stability |
FR2843251A1 (fr) * | 2002-07-31 | 2004-02-06 | Koninkl Philips Electronics Nv | Convertisseur analogique-numerique comportant des echelles de resistances dynamiques. |
FR2843254A1 (fr) | 2002-08-01 | 2004-02-06 | Pierre Noel Guy Barre | Dispositif et procede de couplage entre un modem et un reseau de distribution electrique delimite. |
US6954165B2 (en) * | 2003-03-28 | 2005-10-11 | Ess Technology, Inc. | Voltage segmented digital to analog converter |
DE10342057B4 (de) * | 2003-09-11 | 2005-10-20 | Infineon Technologies Ag | Halbleiter-Schaltungsanordnung und Continuous-Time-Sigma-Delta-Modulatorschaltung |
FR2863120B1 (fr) * | 2003-12-02 | 2006-02-17 | Atmel Grenoble Sa | Convertisseur analogique-numerique rapide |
US7154421B2 (en) * | 2003-12-12 | 2006-12-26 | Telasic Communications, Inc. | DNL/INL trim techniques for comparator based analog to digital converters |
JP4607636B2 (ja) * | 2005-03-25 | 2011-01-05 | 株式会社東芝 | アナログ/ディジタル変換回路 |
US7554475B2 (en) * | 2005-03-31 | 2009-06-30 | Technion Research & Development Foundation Ltd. | Low-power inverted ladder digital-to-analog converter |
JP2007135099A (ja) * | 2005-11-11 | 2007-05-31 | Toshiba Corp | Ad変換装置及び映像表示装置 |
US7212144B1 (en) * | 2006-01-18 | 2007-05-01 | Marvell World Trade Ltd. | Flash ADC |
US7532142B1 (en) * | 2008-06-13 | 2009-05-12 | International Business Machines Corporation | Structures for systems and methods of generating an analog signal |
-
2007
- 2007-03-16 FR FR0701932A patent/FR2913833B1/fr active Active
-
2008
- 2008-03-13 US US12/530,521 patent/US7999713B2/en not_active Expired - Fee Related
- 2008-03-13 EP EP08717733A patent/EP2135355A1/fr not_active Withdrawn
- 2008-03-13 JP JP2009553145A patent/JP2010521850A/ja active Pending
- 2008-03-13 WO PCT/EP2008/052989 patent/WO2008113738A1/fr active Application Filing
Also Published As
Publication number | Publication date |
---|---|
JP2010521850A (ja) | 2010-06-24 |
EP2135355A1 (fr) | 2009-12-23 |
US7999713B2 (en) | 2011-08-16 |
US20100085232A1 (en) | 2010-04-08 |
FR2913833A1 (fr) | 2008-09-19 |
WO2008113738A1 (fr) | 2008-09-25 |
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Legal Events
Date | Code | Title | Description |
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PLFP | Fee payment |
Year of fee payment: 10 |
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CD | Change of name or company name |
Owner name: TELEDYNE E2V SEMICONDUCTORS SAS, FR Effective date: 20180907 |
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Year of fee payment: 14 |
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Year of fee payment: 15 |
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