FR2877164B1 - Dispositif de bascule en particulier du type a retention d'etat declenchee sur fronts - Google Patents

Dispositif de bascule en particulier du type a retention d'etat declenchee sur fronts

Info

Publication number
FR2877164B1
FR2877164B1 FR0411388A FR0411388A FR2877164B1 FR 2877164 B1 FR2877164 B1 FR 2877164B1 FR 0411388 A FR0411388 A FR 0411388A FR 0411388 A FR0411388 A FR 0411388A FR 2877164 B1 FR2877164 B1 FR 2877164B1
Authority
FR
France
Prior art keywords
fronts
device particularly
state retention
retention type
rocket device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0411388A
Other languages
English (en)
Other versions
FR2877164A1 (fr
Inventor
Sylvain Clerc
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
STMicroelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA filed Critical STMicroelectronics SA
Priority to FR0411388A priority Critical patent/FR2877164B1/fr
Priority to US11/258,826 priority patent/US7564282B2/en
Publication of FR2877164A1 publication Critical patent/FR2877164A1/fr
Application granted granted Critical
Publication of FR2877164B1 publication Critical patent/FR2877164B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356008—Bistable circuits ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits
    • H03K3/0375—Bistable circuits provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails
FR0411388A 2004-10-26 2004-10-26 Dispositif de bascule en particulier du type a retention d'etat declenchee sur fronts Expired - Fee Related FR2877164B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR0411388A FR2877164B1 (fr) 2004-10-26 2004-10-26 Dispositif de bascule en particulier du type a retention d'etat declenchee sur fronts
US11/258,826 US7564282B2 (en) 2004-10-26 2005-10-26 Bistable flip-flop having retention circuit for storing state in inactive mode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0411388A FR2877164B1 (fr) 2004-10-26 2004-10-26 Dispositif de bascule en particulier du type a retention d'etat declenchee sur fronts

Publications (2)

Publication Number Publication Date
FR2877164A1 FR2877164A1 (fr) 2006-04-28
FR2877164B1 true FR2877164B1 (fr) 2007-01-19

Family

ID=34951465

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0411388A Expired - Fee Related FR2877164B1 (fr) 2004-10-26 2004-10-26 Dispositif de bascule en particulier du type a retention d'etat declenchee sur fronts

Country Status (2)

Country Link
US (1) US7564282B2 (fr)
FR (1) FR2877164B1 (fr)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7131092B2 (en) * 2004-12-21 2006-10-31 Via Technologies, Inc. Clock gating circuit
US7609094B2 (en) * 2006-06-23 2009-10-27 Mediatek Inc. Input circuits and methods thereof
US7710177B2 (en) * 2007-09-12 2010-05-04 Freescale Semiconductor, Inc. Latch device having low-power data retention
CN101533608A (zh) * 2008-03-14 2009-09-16 精工爱普生株式会社 电泳显示装置、其驱动方法以及电子设备
JP2009244841A (ja) * 2008-03-14 2009-10-22 Seiko Epson Corp 電気泳動表示装置とその駆動方法、及び電子機器
RU2469470C1 (ru) * 2011-07-13 2012-12-10 Учреждение Российской академии наук Институт проблем информатики РАН (ИПИ РАН) Формирователь парафазного сигнала с высоким активным уровнем входа управления
RU2664004C1 (ru) * 2017-02-21 2018-08-14 Федеральное государственное учреждение "Федеральный исследовательский центр "Информатика и управление" Российской академии наук (ФИЦ ИУ РАН) Преобразователь унарного сигнала в парафазный сигнал с нулевым спейсером
RU2664013C1 (ru) * 2017-02-21 2018-08-14 Федеральное государственное учреждение "Федеральный исследовательский центр "Информатика и управление" Российской академии наук (ФИЦ ИУ РАН) Преобразователь унарного сигнала в парафазный сигнал с единичным спейсером
CN111061358B (zh) * 2018-10-15 2021-05-25 珠海格力电器股份有限公司 一种无时钟芯片唤醒电路、唤醒方法、芯片

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4495629A (en) * 1983-01-25 1985-01-22 Storage Technology Partners CMOS scannable latch
US4569067A (en) * 1983-08-04 1986-02-04 Motorola, Inc. Dual master shift register bit
AU2204695A (en) * 1994-04-28 1995-11-29 Apple Computer, Inc. Scannable d-flip-flop with system independent clocking
US6242948B1 (en) * 1997-11-19 2001-06-05 Mitsubishi Denki Kabushiki Kaisha Semiconductor integrated circuit device
JP2002202347A (ja) * 2000-12-28 2002-07-19 Nec Corp スキャンフリップフロップ回路
US6587384B2 (en) * 2001-04-21 2003-07-01 Hewlett-Packard Development Company, L.P. Multi-function serial I/O circuit
US6492854B1 (en) * 2001-08-30 2002-12-10 Hewlett Packard Company Power efficient and high performance flip-flop
KR100519787B1 (ko) * 2002-11-07 2005-10-10 삼성전자주식회사 슬립 모드에서 데이터 보존이 가능한 ｍｔｃｍｏｓ플립플롭 회로
US6803799B1 (en) * 2003-05-30 2004-10-12 Maxim Integrated Products, Inc. Low power flip flop

Also Published As

Publication number Publication date
US20060109040A1 (en) 2006-05-25
FR2877164A1 (fr) 2006-04-28
US7564282B2 (en) 2009-07-21

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20070629