FR2784478B1 - Architecture de verrou pour grand systeme - Google Patents

Architecture de verrou pour grand systeme

Info

Publication number
FR2784478B1
FR2784478B1 FR9812651A FR9812651A FR2784478B1 FR 2784478 B1 FR2784478 B1 FR 2784478B1 FR 9812651 A FR9812651 A FR 9812651A FR 9812651 A FR9812651 A FR 9812651A FR 2784478 B1 FR2784478 B1 FR 2784478B1
Authority
FR
France
Prior art keywords
large system
lock architecture
architecture
lock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9812651A
Other languages
English (en)
Other versions
FR2784478A1 (fr
Inventor
Jean Dominique Sorace
Nasr Eddine Walehiane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SA
Original Assignee
Bull SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SA filed Critical Bull SA
Priority to FR9812651A priority Critical patent/FR2784478B1/fr
Priority to US09/411,231 priority patent/US6477597B1/en
Publication of FR2784478A1 publication Critical patent/FR2784478A1/fr
Application granted granted Critical
Publication of FR2784478B1 publication Critical patent/FR2784478B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
FR9812651A 1998-10-09 1998-10-09 Architecture de verrou pour grand systeme Expired - Fee Related FR2784478B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9812651A FR2784478B1 (fr) 1998-10-09 1998-10-09 Architecture de verrou pour grand systeme
US09/411,231 US6477597B1 (en) 1998-10-09 1999-10-04 Lock architecture for large scale system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9812651A FR2784478B1 (fr) 1998-10-09 1998-10-09 Architecture de verrou pour grand systeme

Publications (2)

Publication Number Publication Date
FR2784478A1 FR2784478A1 (fr) 2000-04-14
FR2784478B1 true FR2784478B1 (fr) 2000-11-17

Family

ID=9531360

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9812651A Expired - Fee Related FR2784478B1 (fr) 1998-10-09 1998-10-09 Architecture de verrou pour grand systeme

Country Status (2)

Country Link
US (1) US6477597B1 (fr)
FR (1) FR2784478B1 (fr)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6823511B1 (en) * 2000-01-10 2004-11-23 International Business Machines Corporation Reader-writer lock for multiprocessor systems
US6938114B2 (en) * 2001-03-01 2005-08-30 International Business Machines Corporation Method and apparatus for managing access to a service processor
US20020133530A1 (en) * 2001-03-15 2002-09-19 Maarten Koning Method for resource control including resource stealing
US7159220B2 (en) * 2001-09-28 2007-01-02 Intel Corporation Flexible acceleration of java thread synchronization on multiprocessor computers
US7430569B2 (en) * 2002-11-27 2008-09-30 Sap Ag Computerized replication of data objects
US7464091B2 (en) * 2002-11-27 2008-12-09 Sap Ag Method and software for processing data objects in business applications
US7225302B2 (en) * 2002-11-27 2007-05-29 Sap Ag Method and software application for avoiding data loss
US7409412B2 (en) 2002-11-27 2008-08-05 Sap Ag Data element and structure for data processing
US20050081204A1 (en) * 2003-09-25 2005-04-14 International Business Machines Corporation Method and system for dynamically bounded spinning threads on a contested mutex
US7383368B2 (en) * 2003-09-25 2008-06-03 Dell Products L.P. Method and system for autonomically adaptive mutexes by considering acquisition cost value
US7856636B2 (en) * 2005-05-10 2010-12-21 Hewlett-Packard Development Company, L.P. Systems and methods of sharing processing resources in a multi-threading environment
US8914565B2 (en) * 2007-06-08 2014-12-16 Sap Ag Locking or loading an object node
US8521963B1 (en) * 2009-09-21 2013-08-27 Tilera Corporation Managing cache coherence

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4435766A (en) * 1981-06-16 1984-03-06 International Business Machines Corporation Nested resource control using locking and unlocking routines with use counter for plural processes
US4574350A (en) * 1982-05-19 1986-03-04 At&T Bell Laboratories Shared resource locking apparatus
US5261108A (en) * 1988-10-08 1993-11-09 Nec Corporation Multiprocessor communications register providing complete access in a full access mode, and mapped access in a partial access mode
US5548728A (en) * 1994-11-04 1996-08-20 Canon Information Systems, Inc. System for reducing bus contention using counter of outstanding acknowledgement in sending processor and issuing of acknowledgement signal by receiving processor to indicate available space in shared memory
US6178481B1 (en) * 1995-12-18 2001-01-23 Texas Instruments Incorporated Microprocessor circuits and systems with life spanned storage circuit for storing non-cacheable data
KR100470555B1 (ko) * 1997-01-23 2005-03-07 선 마이크로시스템즈 인코포레이티드 컴퓨터 자원의 로크방법 및 장치
US5983015A (en) * 1997-10-31 1999-11-09 Oracle Corporation Latch-free sequence generation for high concurrency systems

Also Published As

Publication number Publication date
US6477597B1 (en) 2002-11-05
FR2784478A1 (fr) 2000-04-14

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20160630