FR2759195B1 - Circuit de detection de changement d'adresse - Google Patents

Circuit de detection de changement d'adresse

Info

Publication number
FR2759195B1
FR2759195B1 FR9701232A FR9701232A FR2759195B1 FR 2759195 B1 FR2759195 B1 FR 2759195B1 FR 9701232 A FR9701232 A FR 9701232A FR 9701232 A FR9701232 A FR 9701232A FR 2759195 B1 FR2759195 B1 FR 2759195B1
Authority
FR
France
Prior art keywords
change
detection circuit
address detection
address
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR9701232A
Other languages
English (en)
Other versions
FR2759195A1 (fr
Inventor
Alessandro Brigati
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Original Assignee
SGS Thomson Microelectronics SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SA filed Critical SGS Thomson Microelectronics SA
Priority to FR9701232A priority Critical patent/FR2759195B1/fr
Priority to US09/013,966 priority patent/US6104644A/en
Publication of FR2759195A1 publication Critical patent/FR2759195A1/fr
Application granted granted Critical
Publication of FR2759195B1 publication Critical patent/FR2759195B1/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Read Only Memory (AREA)
FR9701232A 1997-02-04 1997-02-04 Circuit de detection de changement d'adresse Expired - Fee Related FR2759195B1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR9701232A FR2759195B1 (fr) 1997-02-04 1997-02-04 Circuit de detection de changement d'adresse
US09/013,966 US6104644A (en) 1997-02-04 1998-01-27 Circuit for the detection of changes of address

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9701232A FR2759195B1 (fr) 1997-02-04 1997-02-04 Circuit de detection de changement d'adresse

Publications (2)

Publication Number Publication Date
FR2759195A1 FR2759195A1 (fr) 1998-08-07
FR2759195B1 true FR2759195B1 (fr) 1999-03-19

Family

ID=9503300

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9701232A Expired - Fee Related FR2759195B1 (fr) 1997-02-04 1997-02-04 Circuit de detection de changement d'adresse

Country Status (2)

Country Link
US (1) US6104644A (fr)
FR (1) FR2759195B1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19951818C2 (de) * 1999-10-27 2001-11-29 Micronas Gmbh Elektrisch lösch- und programmierbare nichtflüchtige Speicheranordnung
JP4520755B2 (ja) * 2004-02-26 2010-08-11 株式会社日立製作所 データ移行方法およびデータ移行装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2595314B2 (ja) * 1988-06-30 1997-04-02 三菱電機株式会社 誤書き込み防止機能を備えたｉｃカ―ド
DE3918475A1 (de) * 1989-06-06 1990-12-13 Siemens Ag Schaltungsanordnung zur durchfuehrung des seiten- oder zeilengebundenen zugriffs (page-mode) auf die speicherzellen eines dynamischen ram-bausteins (dram)
JPH03260993A (ja) * 1990-03-09 1991-11-20 Nec Corp 情報処理装置
US5682344A (en) * 1995-09-11 1997-10-28 Micron Technology, Inc. Destructive read protection using address blocking technique

Also Published As

Publication number Publication date
FR2759195A1 (fr) 1998-08-07
US6104644A (en) 2000-08-15

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Legal Events

Date Code Title Description
ST Notification of lapse