FR2674724A1 - Method of fabricating an electronic circuit moulded in two or three dimensions - Google Patents

Method of fabricating an electronic circuit moulded in two or three dimensions Download PDF

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Publication number
FR2674724A1
FR2674724A1 FR9103929A FR9103929A FR2674724A1 FR 2674724 A1 FR2674724 A1 FR 2674724A1 FR 9103929 A FR9103929 A FR 9103929A FR 9103929 A FR9103929 A FR 9103929A FR 2674724 A1 FR2674724 A1 FR 2674724A1
Authority
FR
France
Prior art keywords
dimensions
electronic circuit
moulded
fabricating
stamping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR9103929A
Other languages
French (fr)
Inventor
Le Coent Fernand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to FR9103929A priority Critical patent/FR2674724A1/en
Publication of FR2674724A1 publication Critical patent/FR2674724A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0014—Shaping of the substrate, e.g. by moulding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
    • H05K3/041—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by using a die for cutting the conductive material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09045—Locally raised area or protrusion of insulating substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09118—Moulded substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/0108—Male die used for patterning, punching or transferring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/107—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by filling grooves in the support with conductive material

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

The method is designed to obtain moulded circuits obtained by stamping on a part 2 by direct pressure of an etched die 1 or by pressure of a material overmoulded at 4. Application to the fabrication of electronic circuits.

Description

La présente invention concerne un procédé de fabrication de circuit électronique moulé en deux ou trois dimensions utilisant ltestampage par pressage ou surmoulage. The present invention relates to a method of manufacturing an electronic circuit molded in two or three dimensions using stamping by pressing or overmolding.

L'invention vise en particulier la fabrication de circuits imprimés utilisés en électronique en vue d'obtenir un produit de haute définition et de bonne qualité. The invention relates in particular to the manufacture of printed circuits used in electronics with a view to obtaining a high definition and good quality product.

Par exemple, le système permet avantageusement d'obtenir des circuits imprimés sur différents niveaux. For example, the system advantageously makes it possible to obtain printed circuits on different levels.

Des procédés ou dispositifs répondant plus ou moins partiellement aux objectifs précités ont déjà été développés. Processes or devices which more or less partially meet the above-mentioned objectives have already been developed.

Ces procédés présentent plusieurs inconvénients et notamment une définition moins grande.These methods have several drawbacks and in particular a lesser definition.

Un autre inconvénient des procédés développés ou en cours de développement est lié au fait que les circuits obtenus nécessitent de nombreuses opérations couteuses et utilisant des produits polluants. Another drawback of the processes developed or under development is linked to the fact that the circuits obtained require numerous costly operations and using polluting products.

Au contraire le procédé conforme à l'invention permet d'obtenir des circuits imprimés moulés en deux ou trois dimensions avec une grande définition et une densité maximum. On the contrary, the process according to the invention makes it possible to obtain printed circuits molded in two or three dimensions with a high definition and a maximum density.

D'autres caractéristiques et avantages de l'invention ressortiront encore de la description qui va suivre. Other characteristics and advantages of the invention will emerge from the description which follows.

Sur dessins annexés donnés à titre d'exemples non limitatifs
La Fig 1 est une vue en coupe d'un circuit électronique
en deux dimensions.In the accompanying drawings given by way of nonlimiting examples
Fig 1 is a sectional view of an electronic circuit
in two dimensions.

La Fig 2 est une coupe d'un circuit électronique en
trois dimensions.Fig 2 is a section of an electronic circuit in
three dimensions.

Le procédé conforme à l'invention dont une représentation schématique d'ensemble est fournie à la figure 1, comprend essentiellement en 1 une matrice d'estampage qui viendra graver une pièce 2 métallisée en 3, par différents procédés. La face arrière peut également être métallisée, ce qui assurera son blindage EMI ou SMI. The method according to the invention, an overall schematic representation of which is provided in FIG. 1, essentially comprises at 1 a stamping die which will engrave a part 2 metallized at 3, by different methods. The rear face can also be metallized, which will ensure its EMI or SMI shielding.

La pression d'estampage pourra être exercée suivant la flèche F1 par la matrice, elle pourra également être obtenue par la pression d'injection ou de compression d'une matière sumoulée 4 suivant une poussée F2 les déplacements pourront être combinés. Le matriçage pourra se faire sur la troisième dimension tels que pentes ou bossage 5. The stamping pressure can be exerted along arrow F1 by the matrix, it can also be obtained by the injection or compression pressure of a sumoulée material 4 following a thrust F2 displacements can be combined. The stamping can be done on the third dimension such as slopes or boss 5.

Le principe mis en oeuvre dans le cadre de l'invention repose sur la ductibilité de la matière métallisée à estamper.  The principle implemented in the context of the invention is based on the ductility of the metallized material to be stamped.

Claims (3)

REVENDICATIONS 1 - Procédé de fabrication de circuits électroniques moulés en1 - Process for manufacturing electronic circuits molded in deux ou trois dimensions obtenus par estampage d'une matrice two or three dimensions obtained by stamping a matrix 1 sur une pièce en 2 métallisée par différents procédés en 3 1 on a part in 2 metallized by different methods in 3 soit par une pression directe de la matrice F1 sur le substrat either by direct pressure of the matrix F1 on the substrate ou en combinant la pression F2 de la matière injectée ou or by combining the pressure F2 of the injected material or compressée. compressed. 2 - Procédé selon la revendication 1, caractérisé en ce que le2 - Method according to claim 1, characterized in that the matriçage se fait sur une pièce en 3 dimensions par exemple stamping is done on a 3-dimensional part for example sur une pente ou un bossage. on a slope or a boss. 3 - Procédé selon la revendication 1 ou la renvendication 2,3 - Method according to claim 1 or claim 2, caractérisé en ce que la face arrière de la pièce est également characterized in that the rear face of the part is also métallisée en 3 ce qui assurera son blindage EMI ou FMI.  metallized in 3 which will ensure its EMI or FMI shielding.
FR9103929A 1991-03-27 1991-03-27 Method of fabricating an electronic circuit moulded in two or three dimensions Withdrawn FR2674724A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR9103929A FR2674724A1 (en) 1991-03-27 1991-03-27 Method of fabricating an electronic circuit moulded in two or three dimensions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9103929A FR2674724A1 (en) 1991-03-27 1991-03-27 Method of fabricating an electronic circuit moulded in two or three dimensions

Publications (1)

Publication Number Publication Date
FR2674724A1 true FR2674724A1 (en) 1992-10-02

Family

ID=9411337

Family Applications (1)

Application Number Title Priority Date Filing Date
FR9103929A Withdrawn FR2674724A1 (en) 1991-03-27 1991-03-27 Method of fabricating an electronic circuit moulded in two or three dimensions

Country Status (1)

Country Link
FR (1) FR2674724A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998004106A1 (en) * 1996-07-18 1998-01-29 Droz Francois Method for making printed circuits and resulting printed circuit
WO1998004105A1 (en) * 1996-07-18 1998-01-29 Droz Francois Method for making printed circuits and resulting printed circuit
WO2009033842A1 (en) * 2007-09-06 2009-03-19 Robert Bosch Gmbh Method for the hot embossing of at least one conductor track onto a substrate and substrate comprising at least one conductor track

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1998004106A1 (en) * 1996-07-18 1998-01-29 Droz Francois Method for making printed circuits and resulting printed circuit
WO1998004105A1 (en) * 1996-07-18 1998-01-29 Droz Francois Method for making printed circuits and resulting printed circuit
US6176010B1 (en) 1996-07-18 2001-01-23 Nagraid S.A. Method for making printed circuits and resulting printed circuit
WO2009033842A1 (en) * 2007-09-06 2009-03-19 Robert Bosch Gmbh Method for the hot embossing of at least one conductor track onto a substrate and substrate comprising at least one conductor track
CN101796895B (en) * 2007-09-06 2013-03-13 罗伯特.博世有限公司 Method for the hot embossing of at least one conductor track onto a substrate and substrate comprising at least one conductor track
US8549743B2 (en) 2007-09-06 2013-10-08 Robert Bosch Gmbh Method for hot embossing at least one conductive track onto a substrate

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