FR2554255B1 - ELECTRONIC DEVICE CONNECTED IN PARALLEL ON A BUS LINE AND ARRANGEMENT COMPRISING A PLURALITY OF SUCH DEVICES - Google Patents

ELECTRONIC DEVICE CONNECTED IN PARALLEL ON A BUS LINE AND ARRANGEMENT COMPRISING A PLURALITY OF SUCH DEVICES

Info

Publication number
FR2554255B1
FR2554255B1 FR8317079A FR8317079A FR2554255B1 FR 2554255 B1 FR2554255 B1 FR 2554255B1 FR 8317079 A FR8317079 A FR 8317079A FR 8317079 A FR8317079 A FR 8317079A FR 2554255 B1 FR2554255 B1 FR 2554255B1
Authority
FR
France
Prior art keywords
arrangement
devices
parallel
electronic device
device connected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8317079A
Other languages
French (fr)
Other versions
FR2554255A1 (en
Inventor
Jean Waignier
Bernard Vaillant
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Airbus Group SAS
Original Assignee
Airbus Group SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Airbus Group SAS filed Critical Airbus Group SAS
Priority to FR8317079A priority Critical patent/FR2554255B1/en
Publication of FR2554255A1 publication Critical patent/FR2554255A1/en
Application granted granted Critical
Publication of FR2554255B1 publication Critical patent/FR2554255B1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
FR8317079A 1983-10-26 1983-10-26 ELECTRONIC DEVICE CONNECTED IN PARALLEL ON A BUS LINE AND ARRANGEMENT COMPRISING A PLURALITY OF SUCH DEVICES Expired FR2554255B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR8317079A FR2554255B1 (en) 1983-10-26 1983-10-26 ELECTRONIC DEVICE CONNECTED IN PARALLEL ON A BUS LINE AND ARRANGEMENT COMPRISING A PLURALITY OF SUCH DEVICES

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8317079A FR2554255B1 (en) 1983-10-26 1983-10-26 ELECTRONIC DEVICE CONNECTED IN PARALLEL ON A BUS LINE AND ARRANGEMENT COMPRISING A PLURALITY OF SUCH DEVICES

Publications (2)

Publication Number Publication Date
FR2554255A1 FR2554255A1 (en) 1985-05-03
FR2554255B1 true FR2554255B1 (en) 1985-12-27

Family

ID=9293550

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8317079A Expired FR2554255B1 (en) 1983-10-26 1983-10-26 ELECTRONIC DEVICE CONNECTED IN PARALLEL ON A BUS LINE AND ARRANGEMENT COMPRISING A PLURALITY OF SUCH DEVICES

Country Status (1)

Country Link
FR (1) FR2554255B1 (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT314225B (en) * 1969-05-02 1974-03-25 Internat Business Maschines Co Modular electronic data processing system
US4815034A (en) * 1981-03-18 1989-03-21 Mackey Timothy I Dynamic memory address system for I/O devices

Also Published As

Publication number Publication date
FR2554255A1 (en) 1985-05-03

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Legal Events

Date Code Title Description
ST Notification of lapse