FR2454242A1 - TDM switching circuit - has control and buffer memory in which address depends on same contents of memory - Google Patents

Abstract

A TDM switching circuit comprises a number of incoming multiplex routes converted in a super-multiplexer into an incoming super-multiplex route, an outgoing super-multiplex route converted by a super-demultiplexer into a number of outgoing multiplex routes, and a buffer memory whose write input is connected to the incoming super-multiplex route and whose read output is connected to the outgoing super-multiplex route. The words present in the time gaps of the incoming super-multiplex route are written sequentially in the information memory of the buffer memory. The buffer memory is addressable by its content and has a circular memory aassociated with the information memory locations in addition to a fixed address memory addressing the components of the outgoing super-multiplex route, and comparators associated with respective information memory locations and address memory locations. Each comparator compares the arbitrary addresses written in the address memory locations with the fixed address of the component routes of the outgoing super-multiplex route and controls the reading of the word associated with the arbitrary address when identity occurs.