FR2440657A1 - Perfectionnement aux reseaux logiques programmables a fonctions multiples - Google Patents
Perfectionnement aux reseaux logiques programmables a fonctions multiplesInfo
- Publication number
- FR2440657A1 FR2440657A1 FR7831281A FR7831281A FR2440657A1 FR 2440657 A1 FR2440657 A1 FR 2440657A1 FR 7831281 A FR7831281 A FR 7831281A FR 7831281 A FR7831281 A FR 7831281A FR 2440657 A1 FR2440657 A1 FR 2440657A1
- Authority
- FR
- France
- Prior art keywords
- programmable logic
- improvement
- omem
- amem
- regi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
- H03K19/17716—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays with synchronous operation, i.e. using clock signals, e.g. of I/O or coupling register
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Abstract
RESEAU LOGIQUE PROGRAMMABLE. CE DISPOSITIF COMPORTE, DEUX MEMOIRES EFFACABLES AMEM ET OMEM DONT LES RANGEES SONT LUES SEQUENTIELLEMENT ET CYCLIQUEMENT A L'AIDE D'UN COMPTEUR SCAN. LES MOTS LUS DANS AMEM SONT COMPARES AU MOT D'ENTREE DANS UN DISPOSITIF COMPAR DONT LA SORTIE COMMANDE L'OUVERTURE D'UN REGISTRE-PORTE REGI PLACE EN SORTIE DE LA MEMOIRE OMEM. LE CONTENU DE REGI EST CHARGE DANS LE REGISTRE DE SORTIE Q0, Q1, Q2. LA FONCTION DU RESEAU LOGIQUE AINSI OBTENU, PEUT ETRE MODIFIEE PAR SIMPLE CHANGEMENT DES CONTENUS DES MEMOIRES EFFACABLES. CIRCUITS LOGIQUES.
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7831281A FR2440657A1 (fr) | 1978-10-31 | 1978-10-31 | Perfectionnement aux reseaux logiques programmables a fonctions multiples |
JP12018879A JPS5561145A (en) | 1978-10-31 | 1979-09-20 | Programmable logic array |
DE19792940653 DE2940653A1 (de) | 1978-10-31 | 1979-10-06 | Programmierbare logische anordnung |
US06/083,146 US4348737A (en) | 1978-10-31 | 1979-10-09 | Multiple-function programmable logic arrays |
GB7937563A GB2034090B (en) | 1978-10-31 | 1979-10-30 | Electrical apparatus for performing logical operations |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7831281A FR2440657A1 (fr) | 1978-10-31 | 1978-10-31 | Perfectionnement aux reseaux logiques programmables a fonctions multiples |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2440657A1 true FR2440657A1 (fr) | 1980-05-30 |
FR2440657B1 FR2440657B1 (fr) | 1982-09-17 |
Family
ID=9214495
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7831281A Granted FR2440657A1 (fr) | 1978-10-31 | 1978-10-31 | Perfectionnement aux reseaux logiques programmables a fonctions multiples |
Country Status (5)
Country | Link |
---|---|
US (1) | US4348737A (fr) |
JP (1) | JPS5561145A (fr) |
DE (1) | DE2940653A1 (fr) |
FR (1) | FR2440657A1 (fr) |
GB (1) | GB2034090B (fr) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4431928A (en) * | 1981-06-22 | 1984-02-14 | Hewlett-Packard Company | Symmetrical programmable logic array |
JPS5919367A (ja) * | 1982-07-26 | 1984-01-31 | Toshiba Corp | メモリ付ゲ−トアレイ |
US4661922A (en) * | 1982-12-08 | 1987-04-28 | American Telephone And Telegraph Company | Programmed logic array with two-level control timing |
USRE34363E (en) * | 1984-03-12 | 1993-08-31 | Xilinx, Inc. | Configurable electrical circuit having configurable logic elements and configurable interconnects |
US4625130A (en) * | 1984-05-30 | 1986-11-25 | Burroughs Corporation | Mask signal generator |
US4642487A (en) * | 1984-09-26 | 1987-02-10 | Xilinx, Inc. | Special interconnect for configurable logic array |
US4766532A (en) * | 1985-04-30 | 1988-08-23 | International Business Machines Corporation | Sequential array logic |
US4703206A (en) * | 1985-11-19 | 1987-10-27 | Signetics Corporation | Field-programmable logic device with programmable foldback to control number of logic levels |
US5042004A (en) * | 1986-03-06 | 1991-08-20 | Advanced Micro Devices, Inc. | Programmable logic device with subroutine stack and random access memory |
US5367208A (en) * | 1986-09-19 | 1994-11-22 | Actel Corporation | Reconfigurable programmable interconnect architecture |
US5451887A (en) * | 1986-09-19 | 1995-09-19 | Actel Corporation | Programmable logic module and architecture for field programmable gate array device |
JPH01108373U (fr) * | 1988-01-14 | 1989-07-21 | ||
US5081375A (en) * | 1989-01-19 | 1992-01-14 | National Semiconductor Corp. | Method for operating a multiple page programmable logic device |
US4972105A (en) * | 1989-09-22 | 1990-11-20 | The U.S. Government As Represented By The Director, National Security Agency | Programmable configurable logic memory |
US5055712A (en) * | 1990-04-05 | 1991-10-08 | National Semiconductor Corp. | Register file with programmable control, decode and/or data manipulation |
US5302865A (en) * | 1993-02-16 | 1994-04-12 | Intel Corporation | High-speed comparator logic for wide compares in programmable logic devices |
KR0120579B1 (ko) * | 1994-07-14 | 1997-10-30 | 김주용 | 리 프로그램가능한 프로그램어블 로직 어래이 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2310040A1 (fr) * | 1975-04-29 | 1976-11-26 | Siemens Ag | Circuit logique integre programmable |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3983538A (en) * | 1974-05-01 | 1976-09-28 | International Business Machines Corporation | Universal LSI array logic modules with integral storage array and variable autonomous sequencing |
DE2455178C2 (de) * | 1974-11-21 | 1982-12-23 | Siemens AG, 1000 Berlin und 8000 München | Integrierte, programmierbare Logikanordnung |
US4153943A (en) * | 1977-08-12 | 1979-05-08 | Honeywell Inc. | High speed I/O for content addressable type memories |
-
1978
- 1978-10-31 FR FR7831281A patent/FR2440657A1/fr active Granted
-
1979
- 1979-09-20 JP JP12018879A patent/JPS5561145A/ja active Granted
- 1979-10-06 DE DE19792940653 patent/DE2940653A1/de not_active Withdrawn
- 1979-10-09 US US06/083,146 patent/US4348737A/en not_active Expired - Lifetime
- 1979-10-30 GB GB7937563A patent/GB2034090B/en not_active Expired
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2310040A1 (fr) * | 1975-04-29 | 1976-11-26 | Siemens Ag | Circuit logique integre programmable |
Non-Patent Citations (3)
Title |
---|
EXBK/75 * |
EXBK/76 * |
EXBK/78 * |
Also Published As
Publication number | Publication date |
---|---|
FR2440657B1 (fr) | 1982-09-17 |
GB2034090B (en) | 1982-07-07 |
GB2034090A (en) | 1980-05-29 |
JPS5561145A (en) | 1980-05-08 |
JPS6234182B2 (fr) | 1987-07-24 |
US4348737A (en) | 1982-09-07 |
DE2940653A1 (de) | 1980-05-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |