FR2420824A1 - PERMANENT PROGRAMMABLE METAL-OXIDE-SEMICONDUCTOR MEMORY - Google Patents

PERMANENT PROGRAMMABLE METAL-OXIDE-SEMICONDUCTOR MEMORY

Info

Publication number
FR2420824A1
FR2420824A1 FR7906983A FR7906983A FR2420824A1 FR 2420824 A1 FR2420824 A1 FR 2420824A1 FR 7906983 A FR7906983 A FR 7906983A FR 7906983 A FR7906983 A FR 7906983A FR 2420824 A1 FR2420824 A1 FR 2420824A1
Authority
FR
France
Prior art keywords
oxide
semiconductor memory
programmable metal
permanent programmable
programmed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7906983A
Other languages
French (fr)
Other versions
FR2420824B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/890,557 external-priority patent/US4198693A/en
Priority claimed from US05/890,556 external-priority patent/US4384399A/en
Priority claimed from US05/890,555 external-priority patent/US4290184A/en
Priority claimed from US05900549 external-priority patent/US4230504B1/en
Priority claimed from US05/907,236 external-priority patent/US4385432A/en
Priority claimed from US06/001,571 external-priority patent/US4294001A/en
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of FR2420824A1 publication Critical patent/FR2420824A1/en
Application granted granted Critical
Publication of FR2420824B1 publication Critical patent/FR2420824B1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7827—Vertical transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/126—Virtual ground arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/36—Gate programmed, e.g. different gate material or no gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/38—Doping programmed, e.g. mask ROM
    • H10B20/383—Channel doping programmed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/40—ROM only having the source region and drain region on different levels, e.g. vertical channel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)

Abstract

L'invention concerne une mémoire permanente programmable à métal-oxyde-semi-conducteur, ou MOS. La mémoire est programmée à une phase tardive de la fabrication, juste avant ou après que le niveau du contact métallique et des interconnexions a été déposé et mis en forme. Chaque transistor MOS de la matrice est programmé à << 1 >> ou à << 0 >> par une implantation d'ions à travers les grilles et la couche d'oxyde de grille, en utilisant une couche photosensible ou une couche d'oxyde de protection comme un masque. L'invention s'applique notamment aux mémoires de calculateur.A permanent programmable metal-oxide-semiconductor memory, or MOS, is provided. The memory is programmed at a late stage of manufacture, just before or after the level of the metal contact and interconnects has been deposited and shaped. Each MOS transistor in the array is programmed to "1" or "0" by implantation of ions through the gates and the gate oxide layer, using a photosensitive layer or an oxide layer. protective oxide like a mask. The invention applies in particular to computer memories.

FR7906983A 1978-03-20 1979-03-20 PERMANENT METAL-OXIDE-SEMICONDUCTOR MEMORY Expired FR2420824B1 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US05/890,557 US4198693A (en) 1978-03-20 1978-03-20 VMOS Read only memory
US05/890,556 US4384399A (en) 1978-03-20 1978-03-20 Method of making a metal programmable MOS read only memory device
US05/890,555 US4290184A (en) 1978-03-20 1978-03-20 Method of making post-metal programmable MOS read only memory
US05900549 US4230504B1 (en) 1978-04-27 1978-04-27 Method of making implant programmable N-channel rom
US05/907,236 US4385432A (en) 1978-05-18 1978-05-18 Closely-spaced double level conductors for MOS read only
US06/001,571 US4294001A (en) 1979-01-08 1979-01-08 Method of making implant programmable metal gate MOS read only memory

Publications (2)

Publication Number Publication Date
FR2420824A1 true FR2420824A1 (en) 1979-10-19
FR2420824B1 FR2420824B1 (en) 1987-08-14

Family

ID=27555391

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7906983A Expired FR2420824B1 (en) 1978-03-20 1979-03-20 PERMANENT METAL-OXIDE-SEMICONDUCTOR MEMORY

Country Status (4)

Country Link
JP (1) JPS54130887A (en)
DE (1) DE2909197A1 (en)
FR (1) FR2420824B1 (en)
GB (1) GB2017406B (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL61671A (en) * 1979-12-13 1984-04-30 Energy Conversion Devices Inc Diode and rom or eeprom devices using it
US4336647A (en) * 1979-12-21 1982-06-29 Texas Instruments Incorporated Method of making implant programmable N-channel read only memory
JPS56150860A (en) * 1980-04-24 1981-11-21 Fujitsu Ltd Manufacture of semiconductor memory device
JPS583192A (en) * 1981-06-30 1983-01-08 Fujitsu Ltd Read only memory
GB2102623B (en) * 1981-06-30 1985-04-11 Tokyo Shibaura Electric Co Method of manufacturing a semiconductors memory device
JPS5830154A (en) * 1981-08-17 1983-02-22 Toshiba Corp Fixed memory semiconductor device and manufacture thereof
EP0109853A3 (en) * 1982-11-23 1985-06-26 American Microsystems, Incorporated Semiconductor memory devices and methods for making the same
EP0109854A3 (en) * 1982-11-23 1985-08-07 American Microsystems, Incorporated Semiconductor memory devices and methods for making the same
JPS6396953A (en) * 1986-10-13 1988-04-27 Sharp Corp Semiconductor device
DE19514834C1 (en) * 1995-04-21 1997-01-09 Siemens Ag Read-only memory cell arrangement and method for its production

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3775191A (en) * 1971-06-28 1973-11-27 Bell Canada Northern Electric Modification of channel regions in insulated gate field effect transistors
US3914855A (en) * 1974-05-09 1975-10-28 Bell Telephone Labor Inc Methods for making MOS read-only memories
US4059826A (en) * 1975-12-29 1977-11-22 Texas Instruments Incorporated Semiconductor memory array with field effect transistors programmable by alteration of threshold voltage

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3775191A (en) * 1971-06-28 1973-11-27 Bell Canada Northern Electric Modification of channel regions in insulated gate field effect transistors
US3914855A (en) * 1974-05-09 1975-10-28 Bell Telephone Labor Inc Methods for making MOS read-only memories
US4059826A (en) * 1975-12-29 1977-11-22 Texas Instruments Incorporated Semiconductor memory array with field effect transistors programmable by alteration of threshold voltage

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN, vol.18, no.10, mars 1976, NEW YORK (US) *

Also Published As

Publication number Publication date
GB2017406A (en) 1979-10-03
FR2420824B1 (en) 1987-08-14
GB2017406B (en) 1983-02-02
DE2909197A1 (en) 1979-10-04
JPS54130887A (en) 1979-10-11

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