FR2357979A1 - MEMORY FOR COMPUTER - Google Patents
MEMORY FOR COMPUTERInfo
- Publication number
- FR2357979A1 FR2357979A1 FR7720656A FR7720656A FR2357979A1 FR 2357979 A1 FR2357979 A1 FR 2357979A1 FR 7720656 A FR7720656 A FR 7720656A FR 7720656 A FR7720656 A FR 7720656A FR 2357979 A1 FR2357979 A1 FR 2357979A1
- Authority
- FR
- France
- Prior art keywords
- memory
- output
- inputs
- counters
- memory units
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Executing Machine-Instructions (AREA)
- Complex Calculations (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Cette mémoire comporte deux compteurs 17, 23, dont les entrées d'information 30, sont les entrées de la mémoire. La sortie de l'un des compteurs 17 est raccordée à l'entrée d'adresse 18 de l'une des unités de mémoire 1, la sortie de l'autre compteur 23 est recordée à l'entrée d'adresse 21 d'une autre unite de mémoire 2, à travers un commutateur 20. L'une des entrées de commande 24, 25 du commutateur 20 est raccordée à une horloge 27. Les entrées d'information 6, 7 des unités de mémoire 1, 2 sont raccordées entre elles et au groupe 8 de conducteurs d'information d'entrée; la sortie de chacune des unités de mémoire 1, 2 est connectée par un groupe correspondant 11, 12 d'éléments logiques NON-ET à un groupe 13, 14 de conducteurs d'informations de sortie. Les entrées de commande 3, 4, 24, 25, 26, 28, 29 des compteurs 17, 23, du commutateur 20, des unités de mémoire 1, 2 des groupes 11, 12 d'éléments logiques NON-ET ainsi que l'horloge 27, sont raccordés à une unité de commande 5.This memory comprises two counters 17, 23, of which the information inputs 30, are the inputs of the memory. The output of one of the counters 17 is connected to the address input 18 of one of the memory units 1, the output of the other counter 23 is recorded at the address input 21 of a another memory unit 2, through a switch 20. One of the control inputs 24, 25 of the switch 20 is connected to a clock 27. The information inputs 6, 7 of the memory units 1, 2 are connected between them and group 8 of input information conductors; the output of each of the memory units 1, 2 is connected by a corresponding group 11, 12 of NAND logic elements to a group 13, 14 of output information leads. The control inputs 3, 4, 24, 25, 26, 28, 29 of counters 17, 23, switch 20, memory units 1, 2 of groups 11, 12 of NAND logic elements as well as the clock 27, are connected to a control unit 5.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SU762379700A SU613402A1 (en) | 1976-07-07 | 1976-07-07 | Storage |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2357979A1 true FR2357979A1 (en) | 1978-02-03 |
FR2357979B1 FR2357979B1 (en) | 1981-11-27 |
Family
ID=20668233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7720656A Granted FR2357979A1 (en) | 1976-07-07 | 1977-07-05 | MEMORY FOR COMPUTER |
Country Status (10)
Country | Link |
---|---|
JP (1) | JPS5317036A (en) |
BG (1) | BG29547A1 (en) |
DD (1) | DD132695A1 (en) |
DE (1) | DE2730794A1 (en) |
FR (1) | FR2357979A1 (en) |
GB (1) | GB1537419A (en) |
IN (1) | IN147070B (en) |
PL (1) | PL109526B1 (en) |
RO (1) | RO75686A (en) |
SU (1) | SU613402A1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0052669A1 (en) * | 1980-11-26 | 1982-06-02 | Ibm Deutschland Gmbh | Multiple-address highly integrated semi-conductor memory |
EP0622802A1 (en) * | 1993-04-26 | 1994-11-02 | Nec Corporation | Semiconductor memory device |
EP0713221A1 (en) * | 1994-11-18 | 1996-05-22 | STMicroelectronics S.r.l. | Synchronization device for output stages, particularly for electronic memories |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3651476A (en) * | 1970-04-16 | 1972-03-21 | Ibm | Processor with improved controls for selecting an operand from a local storage unit, an alu output register or both |
US3737866A (en) * | 1971-07-27 | 1973-06-05 | Data General Corp | Data storage and retrieval system |
-
1976
- 1976-07-07 SU SU762379700A patent/SU613402A1/en active
-
1977
- 1977-06-10 IN IN865/CAL/77A patent/IN147070B/en unknown
- 1977-06-23 GB GB2642677A patent/GB1537419A/en not_active Expired
- 1977-07-04 RO RO7790919A patent/RO75686A/en unknown
- 1977-07-04 PL PL19936877A patent/PL109526B1/en unknown
- 1977-07-05 FR FR7720656A patent/FR2357979A1/en active Granted
- 1977-07-05 DD DD19989077A patent/DD132695A1/en unknown
- 1977-07-07 BG BG7736829A patent/BG29547A1/en unknown
- 1977-07-07 JP JP8049477A patent/JPS5317036A/en active Pending
- 1977-07-07 DE DE19772730794 patent/DE2730794A1/en not_active Ceased
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3651476A (en) * | 1970-04-16 | 1972-03-21 | Ibm | Processor with improved controls for selecting an operand from a local storage unit, an alu output register or both |
US3737866A (en) * | 1971-07-27 | 1973-06-05 | Data General Corp | Data storage and retrieval system |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0052669A1 (en) * | 1980-11-26 | 1982-06-02 | Ibm Deutschland Gmbh | Multiple-address highly integrated semi-conductor memory |
EP0622802A1 (en) * | 1993-04-26 | 1994-11-02 | Nec Corporation | Semiconductor memory device |
US5436863A (en) * | 1993-04-26 | 1995-07-25 | Nec Corporation | Semiconductor memory device |
EP0713221A1 (en) * | 1994-11-18 | 1996-05-22 | STMicroelectronics S.r.l. | Synchronization device for output stages, particularly for electronic memories |
US5633834A (en) * | 1994-11-18 | 1997-05-27 | Sgs-Thomson Microelectronics S.R.L. | Synchronization device for output stages, particularly for electronic memories |
Also Published As
Publication number | Publication date |
---|---|
PL109526B1 (en) | 1980-06-30 |
PL199368A1 (en) | 1978-02-13 |
RO75686A (en) | 1981-02-28 |
BG29547A1 (en) | 1980-12-12 |
DD132695A1 (en) | 1978-10-18 |
DE2730794A1 (en) | 1978-01-19 |
GB1537419A (en) | 1978-12-29 |
SU613402A1 (en) | 1978-06-30 |
JPS5317036A (en) | 1978-02-16 |
FR2357979B1 (en) | 1981-11-27 |
IN147070B (en) | 1979-11-03 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |