FR2315736B1 - - Google Patents
Info
- Publication number
- FR2315736B1 FR2315736B1 FR7519907A FR7519907A FR2315736B1 FR 2315736 B1 FR2315736 B1 FR 2315736B1 FR 7519907 A FR7519907 A FR 7519907A FR 7519907 A FR7519907 A FR 7519907A FR 2315736 B1 FR2315736 B1 FR 2315736B1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1604—Error detection or correction of the data by redundancy in hardware where the fault affects the clock signals of a processing unit and the redundancy is at or within the level of clock signal generation hardware
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Quality & Reliability (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7519907A FR2315736A1 (en) | 1975-06-25 | 1975-06-25 | Transmission system for periodic signals - includes master clock circuit using two main oscillators and auxiliary oscillators |
| AU14990/76A AU505604B2 (en) | 1975-06-25 | 1976-06-17 | Clock pulse generator |
| BE2055141A BE843383A (en) | 1975-06-25 | 1976-06-25 | PERIODIC SIGNAL TRANSMISSION SYSTEM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR7519907A FR2315736A1 (en) | 1975-06-25 | 1975-06-25 | Transmission system for periodic signals - includes master clock circuit using two main oscillators and auxiliary oscillators |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2315736A1 FR2315736A1 (en) | 1977-01-21 |
| FR2315736B1 true FR2315736B1 (en) | 1979-04-13 |
Family
ID=9157014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7519907A Granted FR2315736A1 (en) | 1975-06-25 | 1975-06-25 | Transmission system for periodic signals - includes master clock circuit using two main oscillators and auxiliary oscillators |
Country Status (3)
| Country | Link |
|---|---|
| AU (1) | AU505604B2 (en) |
| BE (1) | BE843383A (en) |
| FR (1) | FR2315736A1 (en) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| NL7707260A (en) * | 1977-06-30 | 1979-01-03 | Bell Telephone Mfg | MOTHER CLOCK DEVICE. |
| FR2427747A1 (en) * | 1978-05-31 | 1979-12-28 | Materiel Telephonique | RECEIVER OF CLOCK SIGNALS AND AUXILIARY SIGNALS TRANSMITTED SIMULTANEOUSLY |
| US4475049A (en) * | 1981-05-07 | 1984-10-02 | Smith Robert E | Redundant serial communication circuit |
| FR2506478A1 (en) * | 1981-05-20 | 1982-11-26 | Telephonie Ind Commerciale | DEVICE FOR INCREASING THE SECURITY OF OPERATION OF A DUPLICATED CLOCK |
| FR2508253A1 (en) * | 1981-06-22 | 1982-12-24 | Telephonie Ind Commerciale | Clock signal generating and synchronising circuit - has counter summing data pulses from clock signal with reset pulse half period out of phase |
| FR2513469B1 (en) * | 1981-09-24 | 1987-12-11 | Thomson Csf Mat Tel | DEVICE FOR QUICK AND AUTOMATIC SELECTION OF A SIGNAL AMONG N |
| FR2577087B1 (en) * | 1985-02-07 | 1987-03-06 | Thomson Csf Mat Tel | TRIPLICATED CLOCK DELIVERY DEVICE, EACH CLOCK SIGNAL HAVING A SYNCHRONIZATION SIGNAL |
| FR2577089B1 (en) * | 1985-02-07 | 1987-03-06 | Thomson Csf Mat Tel | DEVICE FOR TRANSMITTING A CLOCK SIGNAL ACCOMPANIED BY A SYNCHRONIZATION SIGNAL |
| DE3871425D1 (en) * | 1987-04-13 | 1992-07-02 | Siemens Ag | INTEGRATED CIRCUIT ARRANGEMENT FOR MONITORING AN INCORPORATED OSCILLATOR. |
-
1975
- 1975-06-25 FR FR7519907A patent/FR2315736A1/en active Granted
-
1976
- 1976-06-17 AU AU14990/76A patent/AU505604B2/en not_active Expired
- 1976-06-25 BE BE2055141A patent/BE843383A/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| FR2315736A1 (en) | 1977-01-21 |
| AU505604B2 (en) | 1979-11-29 |
| BE843383A (en) | 1976-12-27 |
| AU1499076A (en) | 1977-12-22 |