FR2301869A1 - Division system for binary numbers - uses register cells to store divisor and multiplicand and operates on parts of operands of greatest weight - Google Patents
Division system for binary numbers - uses register cells to store divisor and multiplicand and operates on parts of operands of greatest weightInfo
- Publication number
- FR2301869A1 FR2301869A1 FR7505160A FR7505160A FR2301869A1 FR 2301869 A1 FR2301869 A1 FR 2301869A1 FR 7505160 A FR7505160 A FR 7505160A FR 7505160 A FR7505160 A FR 7505160A FR 2301869 A1 FR2301869 A1 FR 2301869A1
- Authority
- FR
- France
- Prior art keywords
- multiplicand
- operands
- parts
- operates
- greatest weight
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
- G06F7/537—Reduction of the number of iteration steps or stages, e.g. using the Sweeny-Robertson-Tocher [SRT] algorithm
- G06F7/5375—Non restoring calculation, where each digit is either negative, zero or positive, e.g. SRT
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Abstract
The system is for dividing binary members and uses a register which stores the divisor and the multiplicand. The parts of the operands of greatest weight are acted on successively in each partial operation in order to estimate the partial quotients in advance. A logic value is associated with each possible combination of the register cell contents and converted into a first signal, with these signals stored in a permanent memory. The contents of the latter can be transferred to a selection network addressed by the output signals from the rest of the cells to obtain the first signal corresponding to the actual contents of the cells. A sign signal indicates the sign of the partial operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7505160A FR2301869A1 (en) | 1975-02-19 | 1975-02-19 | Division system for binary numbers - uses register cells to store divisor and multiplicand and operates on parts of operands of greatest weight |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7505160A FR2301869A1 (en) | 1975-02-19 | 1975-02-19 | Division system for binary numbers - uses register cells to store divisor and multiplicand and operates on parts of operands of greatest weight |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2301869A1 true FR2301869A1 (en) | 1976-09-17 |
FR2301869B3 FR2301869B3 (en) | 1977-10-28 |
Family
ID=9151429
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7505160A Granted FR2301869A1 (en) | 1975-02-19 | 1975-02-19 | Division system for binary numbers - uses register cells to store divisor and multiplicand and operates on parts of operands of greatest weight |
Country Status (1)
Country | Link |
---|---|
FR (1) | FR2301869A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0452099A2 (en) * | 1990-04-10 | 1991-10-16 | Matsushita Electric Industrial Co., Ltd. | Divider unit |
-
1975
- 1975-02-19 FR FR7505160A patent/FR2301869A1/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0452099A2 (en) * | 1990-04-10 | 1991-10-16 | Matsushita Electric Industrial Co., Ltd. | Divider unit |
EP0452099A3 (en) * | 1990-04-10 | 1993-06-09 | Matsushita Electric Industrial Co., Ltd. | Divider unit |
Also Published As
Publication number | Publication date |
---|---|
FR2301869B3 (en) | 1977-10-28 |
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