FR2289963A1 - LOGICAL DEVICE FOR MULTIPLICATION OF DIGITAL OPERANDS WITH SIGN - Google Patents

LOGICAL DEVICE FOR MULTIPLICATION OF DIGITAL OPERANDS WITH SIGN

Info

Publication number
FR2289963A1
FR2289963A1 FR7533544A FR7533544A FR2289963A1 FR 2289963 A1 FR2289963 A1 FR 2289963A1 FR 7533544 A FR7533544 A FR 7533544A FR 7533544 A FR7533544 A FR 7533544A FR 2289963 A1 FR2289963 A1 FR 2289963A1
Authority
FR
France
Prior art keywords
multiplication
sign
logical device
digital operands
operands
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7533544A
Other languages
French (fr)
Other versions
FR2289963B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US520542A external-priority patent/US3914590A/en
Priority claimed from US05/526,373 external-priority patent/US3947670A/en
Application filed by General Electric Co filed Critical General Electric Co
Publication of FR2289963A1 publication Critical patent/FR2289963A1/en
Application granted granted Critical
Publication of FR2289963B1 publication Critical patent/FR2289963B1/fr
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/4806Computations with complex numbers
    • G06F7/4812Complex multiplication
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52Multiplying; Dividing
    • G06F7/523Multiplying only
    • G06F7/525Multiplying only in serial-serial fashion, i.e. both operands being entered serially
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3812Devices capable of handling different types of numbers
    • G06F2207/3816Accepting numbers of variable word length
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942Significance control
    • G06F7/49947Rounding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Complex Calculations (AREA)
FR7533544A 1974-11-04 1975-11-03 LOGICAL DEVICE FOR MULTIPLICATION OF DIGITAL OPERANDS WITH SIGN Granted FR2289963A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US520542A US3914590A (en) 1974-11-04 1974-11-04 Serial two{3 s complementer
US05/526,373 US3947670A (en) 1974-11-22 1974-11-22 Signed multiplication logic

Publications (2)

Publication Number Publication Date
FR2289963A1 true FR2289963A1 (en) 1976-05-28
FR2289963B1 FR2289963B1 (en) 1981-04-17

Family

ID=27060176

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7533544A Granted FR2289963A1 (en) 1974-11-04 1975-11-03 LOGICAL DEVICE FOR MULTIPLICATION OF DIGITAL OPERANDS WITH SIGN

Country Status (5)

Country Link
JP (1) JPS5911939B2 (en)
DE (1) DE2549032A1 (en)
FR (1) FR2289963A1 (en)
GB (1) GB1523889A (en)
IT (1) IT1044100B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5949640A (en) * 1982-09-16 1984-03-22 Toshiba Corp Multiplying circuit
JPS5965540U (en) * 1982-10-25 1984-05-01 富士電機株式会社 Inverter device
JP2555926B2 (en) * 1993-04-28 1996-11-20 日本電気株式会社 Intermediate frequency amplifier circuit
US10534840B1 (en) * 2018-08-08 2020-01-14 Sandisk Technologies Llc Multiplication using non-volatile memory cells

Also Published As

Publication number Publication date
GB1523889A (en) 1978-09-06
JPS5168744A (en) 1976-06-14
DE2549032A1 (en) 1976-05-20
JPS5911939B2 (en) 1984-03-19
IT1044100B (en) 1980-03-20
FR2289963B1 (en) 1981-04-17

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Legal Events

Date Code Title Description
ST Notification of lapse