FR2235427A1 - Connecting cct. for satellite data processors - has minimum number of programme interruptions in main processor - Google Patents

Connecting cct. for satellite data processors - has minimum number of programme interruptions in main processor

Info

Publication number
FR2235427A1
FR2235427A1 FR7416718A FR7416718A FR2235427A1 FR 2235427 A1 FR2235427 A1 FR 2235427A1 FR 7416718 A FR7416718 A FR 7416718A FR 7416718 A FR7416718 A FR 7416718A FR 2235427 A1 FR2235427 A1 FR 2235427A1
Authority
FR
France
Prior art keywords
cct
main processor
interruptions
programme
minimum number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7416718A
Other languages
French (fr)
Other versions
FR2235427B1 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of FR2235427A1 publication Critical patent/FR2235427A1/en
Application granted granted Critical
Publication of FR2235427B1 publication Critical patent/FR2235427B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Radio Relay Systems (AREA)
  • Multi Processors (AREA)

Abstract

A connecting cct. is for data processing systems with central processor acting as satellite stations pref. for systems with several processors controlled by instructions from a main processor. The main processor also transmits a control sensor instruction through a data channel to the inputs of an instruction decoder and an address comparator in the connecting cct. The decoder establishes that the satellite station is being controlled by the sensor instruction and energises a control and clock cct., an address register and a register to read data into a memory in the satellite station.
FR7416718A 1973-06-28 1974-05-07 Connecting cct. for satellite data processors - has minimum number of programme interruptions in main processor Granted FR2235427A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US37444873A 1973-06-28 1973-06-28

Publications (2)

Publication Number Publication Date
FR2235427A1 true FR2235427A1 (en) 1975-01-24
FR2235427B1 FR2235427B1 (en) 1976-06-25

Family

ID=23476862

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7416718A Granted FR2235427A1 (en) 1973-06-28 1974-05-07 Connecting cct. for satellite data processors - has minimum number of programme interruptions in main processor

Country Status (4)

Country Link
JP (1) JPS5023952A (en)
DE (1) DE2430693A1 (en)
FR (1) FR2235427A1 (en)
IT (1) IT1015013B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2406853A1 (en) * 1977-10-20 1979-05-18 Ibm DISTRIBUTED CONTROL DATA PROCESSING SYSTEM
EP0026648A2 (en) * 1979-09-26 1981-04-08 Sperry Corporation Digital data transfer apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3462741A (en) * 1966-07-25 1969-08-19 Ibm Automatic control of peripheral processors
US3702462A (en) * 1967-10-26 1972-11-07 Delaware Sds Inc Computer input-output system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3462741A (en) * 1966-07-25 1969-08-19 Ibm Automatic control of peripheral processors
US3702462A (en) * 1967-10-26 1972-11-07 Delaware Sds Inc Computer input-output system

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
UE US "IBM TECHNICAL DISCLOSURE BULLETIN", VOL. 16, NO. 11, AVRIL 1974, PAGES 3699-3700. ARTICLE: "EXTENSION TO COMMAND RETRY" DUGAN .) *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2406853A1 (en) * 1977-10-20 1979-05-18 Ibm DISTRIBUTED CONTROL DATA PROCESSING SYSTEM
EP0026648A2 (en) * 1979-09-26 1981-04-08 Sperry Corporation Digital data transfer apparatus
EP0026648A3 (en) * 1979-09-26 1981-04-22 Sperry Corporation Digital data transfer apparatus

Also Published As

Publication number Publication date
IT1015013B (en) 1977-05-10
JPS5023952A (en) 1975-03-14
DE2430693A1 (en) 1975-01-16
FR2235427B1 (en) 1976-06-25

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Legal Events

Date Code Title Description
ST Notification of lapse