FR1485017A - Dispositif à semi-conducteur et procédé de fabrication - Google Patents

Dispositif à semi-conducteur et procédé de fabrication

Info

Publication number
FR1485017A
FR1485017A FR67257A FR67257A FR1485017A FR 1485017 A FR1485017 A FR 1485017A FR 67257 A FR67257 A FR 67257A FR 67257 A FR67257 A FR 67257A FR 1485017 A FR1485017 A FR 1485017A
Authority
FR
France
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR67257A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens and Halske AG
Siemens AG
Original Assignee
Siemens and Halske AG
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens and Halske AG, Siemens AG filed Critical Siemens and Halske AG
Priority to FR67257A priority Critical patent/FR1485017A/fr
Application granted granted Critical
Publication of FR1485017A publication Critical patent/FR1485017A/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/764Air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H01L21/76289Lateral isolation by air gap

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
FR67257A 1965-06-29 1966-06-28 Dispositif à semi-conducteur et procédé de fabrication Expired FR1485017A (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR67257A FR1485017A (fr) 1965-06-29 1966-06-28 Dispositif à semi-conducteur et procédé de fabrication

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DES0097877 1965-06-29
FR67257A FR1485017A (fr) 1965-06-29 1966-06-28 Dispositif à semi-conducteur et procédé de fabrication

Publications (1)

Publication Number Publication Date
FR1485017A true FR1485017A (fr) 1967-06-16

Family

ID=25998136

Family Applications (1)

Application Number Title Priority Date Filing Date
FR67257A Expired FR1485017A (fr) 1965-06-29 1966-06-28 Dispositif à semi-conducteur et procédé de fabrication

Country Status (1)

Country Link
FR (1) FR1485017A (fr)

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