ES8202968A1 - Dispositivo de control de direccion en un sistema de trata- miento de datos - Google Patents

Dispositivo de control de direccion en un sistema de trata- miento de datos

Info

Publication number
ES8202968A1
ES8202968A1 ES500467A ES500467A ES8202968A1 ES 8202968 A1 ES8202968 A1 ES 8202968A1 ES 500467 A ES500467 A ES 500467A ES 500467 A ES500467 A ES 500467A ES 8202968 A1 ES8202968 A1 ES 8202968A1
Authority
ES
Spain
Prior art keywords
gpr
std
address
data
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES500467A
Other languages
English (en)
Other versions
ES500467A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES8202968A1 publication Critical patent/ES8202968A1/es
Publication of ES500467A0 publication Critical patent/ES500467A0/es
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466—Key-lock mechanism
    • G06F12/1475—Key-lock mechanism in a virtual system, e.g. with translation means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G06F12/0623—Address space extension for memory modules
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

DISPOSITIVO DE CONTROL DE DIRECCION EN UN SISTEMA DE TRATAMIENTO DE DATOS. CONSISTE EN LA OBTENCION DE UN CONTROL PRECISO SOBRE EL GRADO DE AISLAMIENTO O COMPATIBILIDAD ENTRE SUBCONJUNTOS DE ESPACIOS DE DIRECCION EN UN SISTEMA RELACIONADO CON UN PROGRAMA EJECUTABLE. EL CONTROL DE COMPARTIBILIDAD SE OBTIENEN EN UN ORDENADOR POR MEDIO DE UN METODO DE DISPOSICION CONSTRUCTIVA SINGULAR QUE ES COMPATIBLE CON LA DISPOSICION CONSTRUCTIVA NORMAL DEL SISTEMA IBM/370.
ES500467A 1980-03-19 1981-03-18 Dispositivo de control de direccion en un sistema de trata- miento de datos Granted ES500467A0 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/131,570 US4355355A (en) 1980-03-19 1980-03-19 Address generating mechanism for multiple virtual spaces

Publications (2)

Publication Number Publication Date
ES8202968A1 true ES8202968A1 (es) 1982-03-01
ES500467A0 ES500467A0 (es) 1982-03-01

Family

ID=22450031

Family Applications (1)

Application Number Title Priority Date Filing Date
ES500467A Granted ES500467A0 (es) 1980-03-19 1981-03-18 Dispositivo de control de direccion en un sistema de trata- miento de datos

Country Status (6)

Country Link
US (1) US4355355A (es)
EP (1) EP0036085B1 (es)
JP (1) JPS6022377B2 (es)
CA (1) CA1153824A (es)
DE (1) DE3176834D1 (es)
ES (1) ES500467A0 (es)

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US4677546A (en) * 1984-08-17 1987-06-30 Signetics Guarded regions for controlling memory access
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US4763244A (en) * 1986-01-15 1988-08-09 Motorola, Inc. Paged memory management unit capable of selectively supporting multiple address spaces
US4682283A (en) * 1986-02-06 1987-07-21 Rockwell International Corporation Address range comparison system using multiplexer for detection of range identifier bits stored in dedicated RAM's
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JPS6376034A (ja) * 1986-09-19 1988-04-06 Hitachi Ltd 多重アドレス空間制御方式
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JPS63231550A (ja) * 1987-03-19 1988-09-27 Hitachi Ltd 多重仮想空間制御方式
JPS63278145A (ja) * 1987-05-11 1988-11-15 Nec Corp パラメ−タ対応検査方式
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US5023773A (en) * 1988-02-10 1991-06-11 International Business Machines Corporation Authorization for selective program access to data in multiple address spaces
US4945480A (en) * 1988-02-10 1990-07-31 International Business Machines Corporation Data domain switching on program address space switching and return
US5008811A (en) * 1988-02-10 1991-04-16 International Business Machines Corp. Control mechanism for zero-origin data spaces
US5220669A (en) * 1988-02-10 1993-06-15 International Business Machines Corporation Linkage mechanism for program isolation
US4979098A (en) * 1988-02-10 1990-12-18 International Business Machines Corporation Multiple address space token designation, protection controls, designation translation and lookaside
US5134696A (en) * 1988-07-28 1992-07-28 International Business Machines Corp. Virtual lookaside facility
JPH0290349A (ja) * 1988-09-28 1990-03-29 Hitachi Ltd 仮想記憶システムのアドレス空間制御装置
US5226132A (en) * 1988-09-30 1993-07-06 Hitachi, Ltd. Multiple virtual addressing using/comparing translation pairs of addresses comprising a space address and an origin address (sto) while using space registers as storage devices for a data processing system
US5159677A (en) * 1988-11-21 1992-10-27 International Business Machines Corp. Method and system for storing data in and retrieving data from a non-main storage virtual data space
JPH02202652A (ja) * 1989-02-01 1990-08-10 Hitachi Ltd 多重仮想記憶管理方式
US5175828A (en) * 1989-02-13 1992-12-29 Hewlett-Packard Company Method and apparatus for dynamically linking subprogram to main program using tabled procedure name comparison
JPH0650480B2 (ja) * 1989-05-02 1994-06-29 株式会社日立製作所 多重仮想記憶システムおよびアドレス制御装置
DE4019961C2 (de) * 1989-06-23 1994-11-24 Hitachi Ltd Steuerung für den Zugriff auf einen Adreßumsetzungsspeicher in einem Prozessorsystem
JP2768503B2 (ja) * 1989-07-25 1998-06-25 富士通株式会社 仮想記憶アドレス空間アクセス制御方式
JP2825550B2 (ja) * 1989-09-21 1998-11-18 株式会社日立製作所 多重仮想空間アドレス制御方法および計算機システム
JPH0679296B2 (ja) * 1989-09-22 1994-10-05 株式会社日立製作所 多重仮想アドレス空間アクセス方法およびデータ処理装置
US5237668A (en) * 1989-10-20 1993-08-17 International Business Machines Corporation Process using virtual addressing in a non-privileged instruction to control the copying of a page of data in or between multiple media
US5317706A (en) * 1989-11-15 1994-05-31 Ncr Corporation Memory expansion method and apparatus in a virtual memory system
US5469556A (en) * 1989-12-12 1995-11-21 Harris Corporation Resource access security system for controlling access to resources of a data processing system
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US5423013A (en) * 1991-09-04 1995-06-06 International Business Machines Corporation System for addressing a very large memory with real or virtual addresses using address mode registers
US5390312A (en) * 1991-09-24 1995-02-14 International Business Machines Corporation Access look-aside facility
US5371890A (en) * 1991-10-30 1994-12-06 International Business Machines Corporation Problem state cross-memory communication using communication memory domains
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US5381537A (en) * 1991-12-06 1995-01-10 International Business Machines Corporation Large logical addressing method and means
CA2078913A1 (en) * 1991-12-12 1993-06-13 John J. Reilly Interprocessor communication system and method for multiprocessor circuitry
US5379392A (en) * 1991-12-17 1995-01-03 Unisys Corporation Method of and apparatus for rapidly loading addressing registers
US5325496A (en) * 1991-12-24 1994-06-28 Intel Corporation Selectable pointer validation in a computer system
US5361356A (en) * 1992-03-06 1994-11-01 International Business Machines Corporation Storage isolation with subspace-group facility
JP2788836B2 (ja) * 1992-05-15 1998-08-20 インターナショナル・ビジネス・マシーンズ・コーポレイション ディジタルコンピュータシステム
US5237616A (en) * 1992-09-21 1993-08-17 International Business Machines Corporation Secure computer system having privileged and unprivileged memories
US5548746A (en) * 1993-11-12 1996-08-20 International Business Machines Corporation Non-contiguous mapping of I/O addresses to use page protection of a process
US5802574A (en) * 1993-12-28 1998-09-01 Intel Corporation Method and apparatus for quickly modifying cache state
US5583806A (en) * 1994-10-17 1996-12-10 Advanced Micro Devices, Inc. Optimized binary adder for concurrently generating effective and intermediate addresses
US5734817A (en) * 1995-03-01 1998-03-31 Unisys Corporation Method for making a data base available to a user program during data base recovery
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US5761740A (en) * 1995-11-30 1998-06-02 Unisys Corporation Method of and apparatus for rapidly loading addressing registers
US5732404A (en) * 1996-03-29 1998-03-24 Unisys Corporation Flexible expansion of virtual memory addressing
US6356991B1 (en) * 1997-12-31 2002-03-12 Unisys Corporation Programmable address translation system
JP3476376B2 (ja) * 1998-12-16 2003-12-10 富士通株式会社 仮想記憶アドレス空間アクセス制御方法とそのための装置
US6289435B1 (en) * 1999-05-17 2001-09-11 Creative Technology Ltd. Re-use of special purposed registers as general purpose registers
US6691306B1 (en) * 2000-12-22 2004-02-10 Lsi Logic Corporation Use of limited program space of general purpose processor for unlimited sequence of translated instructions

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US4037215A (en) * 1976-04-30 1977-07-19 International Business Machines Corporation Key controlled address relocation translation system
US4035779A (en) * 1976-04-30 1977-07-12 International Business Machines Corporation Supervisor address key control system
US4050060A (en) * 1976-04-30 1977-09-20 International Business Machines Corporation Equate operand address space control system
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US4084227A (en) * 1976-09-24 1978-04-11 Sperry Rand Corporation Virtual address translator
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Also Published As

Publication number Publication date
EP0036085B1 (en) 1988-08-03
CA1153824A (en) 1983-09-13
JPS56140576A (en) 1981-11-02
US4355355A (en) 1982-10-19
DE3176834D1 (en) 1988-09-08
EP0036085A3 (en) 1983-09-14
JPS6022377B2 (ja) 1985-06-01
EP0036085A2 (en) 1981-09-23
ES500467A0 (es) 1982-03-01

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 20010301