ES436302A1 - Data processing methods and apparatus - Google Patents

Data processing methods and apparatus

Info

Publication number
ES436302A1
ES436302A1 ES436302A ES436302A ES436302A1 ES 436302 A1 ES436302 A1 ES 436302A1 ES 436302 A ES436302 A ES 436302A ES 436302 A ES436302 A ES 436302A ES 436302 A1 ES436302 A1 ES 436302A1
Authority
ES
Spain
Prior art keywords
instruction
register
data processing
microprogram
sections
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES436302A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nixdorf Computer AG
Original Assignee
Nixdorf Computer AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nixdorf Computer AG filed Critical Nixdorf Computer AG
Publication of ES436302A1 publication Critical patent/ES436302A1/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/264—Microinstruction selection based on results of processing
    • G06F9/265—Microinstruction selection based on results of processing by address selection on input of storage

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)

Abstract

Arrangement of circuits for addressing a microprogram of data processing facilities, by reading instruction words from an instruction memory, controlled step by step by a register of instruction addresses, and evaluation of instruction words in relation to the program routines to be carried out within the microprogram, using instruction words with individual groups of functions, functionally independent of each other, and an instruction register with register sections and outputs of divided sections is arranged after the instruction memory according to the number of groups of functions, characterized in that the outputs (A, B, C, D, E) of the sections are led to a multiplexer (14), whose multiplex output provides a part of a micro-address to be entered in a register (15) of micro-addresses, the multiplexer (14) being controlled by control signals of a link logic (20), which is activated by microprogram block addresses and status signals of the data processing installation. (Machine-translation by Google Translate, not legally binding)
ES436302A 1974-04-24 1975-04-04 Data processing methods and apparatus Expired ES436302A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19742419837 DE2419837B2 (en) 1974-04-24 1974-04-24 CIRCUIT ARRANGEMENT FOR ADDRESSING A MICROPROGRAM IN DATA PROCESSING DEVICES AND METHODS FOR EXECUTING JUMP COMMANDS

Publications (1)

Publication Number Publication Date
ES436302A1 true ES436302A1 (en) 1977-04-01

Family

ID=5913819

Family Applications (1)

Application Number Title Priority Date Filing Date
ES436302A Expired ES436302A1 (en) 1974-04-24 1975-04-04 Data processing methods and apparatus

Country Status (11)

Country Link
JP (1) JPS50147635A (en)
AT (1) AT351303B (en)
CA (1) CA1024263A (en)
CH (1) CH593517A5 (en)
DE (1) DE2419837B2 (en)
ES (1) ES436302A1 (en)
FR (1) FR2269146B1 (en)
GB (1) GB1499187A (en)
IT (1) IT1033334B (en)
NL (1) NL7504627A (en)
SE (1) SE409916B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT350306B (en) * 1977-01-24 1979-05-25 Dethloff Juergen TEXT PROCESSING SYSTEM
IN150275B (en) * 1977-10-25 1982-08-28 Digital Equipment Corp
JPS57149769A (en) * 1981-03-11 1982-09-16 Mitsubishi Electric Corp Manufacture of reverse direction operation npn transistor
DE3133742C2 (en) * 1981-08-26 1985-11-21 Otto 7750 Konstanz Müller Central unit of a micro-programmed digital multi-bit computer system

Also Published As

Publication number Publication date
FR2269146A1 (en) 1975-11-21
SE7504700L (en) 1975-10-27
NL7504627A (en) 1975-10-28
DE2419837A1 (en) 1975-10-30
AT351303B (en) 1979-07-25
CH593517A5 (en) 1977-12-15
SE409916B (en) 1979-09-10
JPS50147635A (en) 1975-11-26
IT1033334B (en) 1979-07-10
DE2419837B2 (en) 1976-12-02
ATA309275A (en) 1978-12-15
CA1024263A (en) 1978-01-10
GB1499187A (en) 1978-01-25
FR2269146B1 (en) 1977-04-15

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