ES364110A1 - Improvements in or relating to centrally controlled exchange systems - Google Patents

Improvements in or relating to centrally controlled exchange systems

Info

Publication number
ES364110A1
ES364110A1 ES364110A ES364110A ES364110A1 ES 364110 A1 ES364110 A1 ES 364110A1 ES 364110 A ES364110 A ES 364110A ES 364110 A ES364110 A ES 364110A ES 364110 A1 ES364110 A1 ES 364110A1
Authority
ES
Spain
Prior art keywords
row
state
matrix
group
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES364110A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of ES364110A1 publication Critical patent/ES364110A1/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q3/00Selecting arrangements
    • H04Q3/42Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54575Software application
    • H04Q3/54591Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

Scanning for line conditions proceeds over subscribers' line circuit groups (such as TG1) and other exchange circuits (such as own and other exchange relay sets HUe and AUe, and operators' relay sets VPl), each group of line circuits and each other exchange circuit having an associated row of a scanning matrix store SpMa, one element of each row indicating the state of the group of line circuits or the state of the other exchange circuit, a row scanner AE1 examining the state elements of each row of the matrix in synchronism with a scan of the corresponding line circuit groups and other circuits, a column scanner AE2 automatically ensuring that the columns containing the state elements are selected during such scanning. The matrix SpMa may consist of a number of planes so as to provide a multi-bit storage capacity for each element of the matrix ferrite cores being employed as storage elements. The line circuit groups TG have a common intermediate store TZS, comprised of ferrite cores, on which is set up in parallel the states of the individual subscriber lines. An OR-function establishes a group state if any one or more of the lines is in the active state. The corresponding scanning matrix row has an element for each line of the group and an additional element, in column n, to indicate the group state, as last scanned. The first column of each row corresponding to another exchange circuit (Hlle Alle, VPl) records the circuit state. For each scanning position of the row scanner AE1 the state data from the last scan as recorded in the matrix is read out to register ZR2 while the corresponding current data from the circuits themselves is recorded in the register ZR1. A logic circuit ZO determines from a comparison of current and last look data what, if any, action is required by the central control circuit ZeSt, such action being implemented and the matrix store brought up to date before the scanner proceeds to the next row. If the group state data indicates activity requiring attention in a line circuit group, the scanner Ae2 steps over the elements of the intermediate store TZS and the corresponding elements in the associated matrix row so that the states of the individual lines are compared with the last look data in ZO with ZeSt reacting accordingly. The scanner Ae2 has a section 5 said to be employed for route finding.
ES364110A 1968-03-07 1969-02-26 Improvements in or relating to centrally controlled exchange systems Expired ES364110A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DES0114451 1968-03-07

Publications (1)

Publication Number Publication Date
ES364110A1 true ES364110A1 (en) 1970-12-16

Family

ID=7533189

Family Applications (1)

Application Number Title Priority Date Filing Date
ES364110A Expired ES364110A1 (en) 1968-03-07 1969-02-26 Improvements in or relating to centrally controlled exchange systems

Country Status (10)

Country Link
AT (1) AT294929B (en)
BE (1) BE729558A (en)
CH (1) CH488362A (en)
DE (1) DE1562232C2 (en)
ES (1) ES364110A1 (en)
FR (1) FR2003382A1 (en)
GB (1) GB1222794A (en)
NL (1) NL6903154A (en)
SE (1) SE339031B (en)
YU (1) YU32005B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4028498A (en) * 1974-10-07 1977-06-07 Solid State Systems, Inc. Private automatic branch exchange system and apparatus
DE2912764C3 (en) * 1979-03-30 1981-12-24 Siemens AG, 1000 Berlin und 8000 München Method for centrally controlled telecommunications switching systems, in particular telephone branch exchange switching systems, with switching stations
GB2608686B (en) 2021-05-28 2024-02-14 Caillau Mounting assembly comprising two end pieces held fitted by a belt

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE639638A (en) * 1962-11-07

Also Published As

Publication number Publication date
AT294929B (en) 1971-11-15
CH488362A (en) 1970-03-31
SE339031B (en) 1971-09-27
GB1222794A (en) 1971-02-17
BE729558A (en) 1969-09-08
FR2003382A1 (en) 1969-11-07
DE1562232B1 (en) 1970-08-20
YU32005B (en) 1974-02-28
NL6903154A (en) 1969-09-09
DE1562232C2 (en) 1974-01-10
YU50869A (en) 1973-08-31

Similar Documents

Publication Publication Date Title
US3303288A (en) Register-sender arrangement
CA1123939A (en) Time-division switching system for multirate data
US3597548A (en) Time division multiplex switching system
CA1096479A (en) Time-division switching system
US3737873A (en) Data processor with cyclic sequential access to multiplexed logic and memory
GB1255468A (en) Priority resolution network for input/output exchanges
GB1580057A (en) Information handling apparatus
GB1404780A (en) Telecommunication system
US3458658A (en) Nonblocking switching system with reduced number of contacts
ES364110A1 (en) Improvements in or relating to centrally controlled exchange systems
GB1398519A (en) Time division multiplex telecommunications systems
GB1203541A (en) Improvements in or relating to data-processing systems
US3560655A (en) Telephone service request scan and dial pulse scan device
US3090836A (en) Data-storage and data-processing devices
US4032721A (en) Stored program logic system using a common exchange circuit
US3806657A (en) Merging time slot interchanger for time division switching networks
US3238306A (en) Availability memory for telecommunication switching links
US3511937A (en) Free path finding device in a switching network
US3739354A (en) Variable capacity memory
US3324246A (en) Crosstalk reduction in a time division multiplex switching system
US3689701A (en) Multisignaller associated with a time division multiplex switching center
US3311706A (en) Multiple module time division multiplex communication system utilizing highlow speed conversion
US3350696A (en) Selection system for electrical circuits or equipments
US3479466A (en) Communication system with control signal delay means
KR970005826B1 (en) A method and apparatus for switching data information through a digital selector