ES2571225T3 - Circuito electrónico de escasa complejidad protegido por enmascaramiento personalizado - Google Patents

Circuito electrónico de escasa complejidad protegido por enmascaramiento personalizado

Info

Publication number
ES2571225T3
ES2571225T3 ES10773354T ES10773354T ES2571225T3 ES 2571225 T3 ES2571225 T3 ES 2571225T3 ES 10773354 T ES10773354 T ES 10773354T ES 10773354 T ES10773354 T ES 10773354T ES 2571225 T3 ES2571225 T3 ES 2571225T3
Authority
ES
Spain
Prior art keywords
masks
masking
treatments
electronic circuit
low complexity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
ES10773354T
Other languages
English (en)
Inventor
Sylvain Guilley
Jean-Luc Danger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telecom ParisTech
Original Assignee
Telecom ParisTech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telecom ParisTech filed Critical Telecom ParisTech
Application granted granted Critical
Publication of ES2571225T3 publication Critical patent/ES2571225T3/es
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/002—Countermeasures against attacks on cryptographic mechanisms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/04—Masking or blinding
    • H04L2209/046—Masking or blinding of operations, operands or results of the operations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)

Abstract

Circuito de criptografía protegido por enmascaramiento, incluyendo dicho circuito unos medios para cifrar unas palabras binarias con la ayuda de al menos una clave kr c, unos medios para aplicar unos tratamientos (216) lineales y unos tratamientos (226) no lineales a dichas palabras, unos medios para enmascarar dichas palabras, donde las palabras binarias son desenmascaradas (214) aguas arriba de los tratamientos no lineales utilizando una máscara kr i y son enmascaradas (215) aguas abajo de los tratamientos no lineales utilizando una máscara kr+1 i, estando dicho circuito caracterizado porque las máscaras kr i y kr+1 i forman parte de un conjunto de máscaras propias para cada instancia del circuito, siendo las máscaras kr i unas máscaras secundarias deducidas de máscaras ki primarias, tales que kr+1 i >= P(kr i) y k0 i >= ki, correspondiendo la función P(x) a una función de permutación de los elementos de x.
ES10773354T 2009-11-13 2010-11-08 Circuito electrónico de escasa complejidad protegido por enmascaramiento personalizado Active ES2571225T3 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0958030A FR2952773B1 (fr) 2009-11-13 2009-11-13 Circuit electronique de faible complexite protege par masquage personnalise
PCT/EP2010/067064 WO2011057991A1 (fr) 2009-11-13 2010-11-08 Circuit electronique de faible complexite protege par masquage personnalise

Publications (1)

Publication Number Publication Date
ES2571225T3 true ES2571225T3 (es) 2016-05-24

Family

ID=42244180

Family Applications (1)

Application Number Title Priority Date Filing Date
ES10773354T Active ES2571225T3 (es) 2009-11-13 2010-11-08 Circuito electrónico de escasa complejidad protegido por enmascaramiento personalizado

Country Status (9)

Country Link
US (1) US9197412B2 (es)
EP (1) EP2499773B1 (es)
JP (1) JP5987250B2 (es)
KR (1) KR101783495B1 (es)
CN (1) CN102648600B (es)
CA (1) CA2780719C (es)
ES (1) ES2571225T3 (es)
FR (1) FR2952773B1 (es)
WO (1) WO2011057991A1 (es)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8958550B2 (en) * 2011-09-13 2015-02-17 Combined Conditional Access Development & Support. LLC (CCAD) Encryption operation with real data rounds, dummy data rounds, and delay periods
JP5612007B2 (ja) * 2012-03-15 2014-10-22 株式会社東芝 暗号化鍵生成装置
JP6089668B2 (ja) * 2012-12-13 2017-03-08 日本電気株式会社 暗号化処理回路及び復号処理回路とその方法並びにそのプログラム
WO2015059845A1 (ja) * 2013-10-24 2015-04-30 日本電気株式会社 暗号化処理回路及び復号処理回路並びにその方法
US11303436B2 (en) 2016-06-23 2022-04-12 Cryptography Research, Inc. Cryptographic operations employing non-linear share encoding for protecting from external monitoring attacks
US10530567B2 (en) * 2016-10-05 2020-01-07 Megachips Corporation Encryption device and memory device
DE102017002153A1 (de) * 2017-03-06 2018-09-06 Giesecke+Devrient Mobile Security Gmbh Übergang von einer booleschen Maskierung zu einer arithmetischen Maskierung
EP3422176A1 (en) * 2017-06-28 2019-01-02 Gemalto Sa Method for securing a cryptographic process with sbox against high-order side-channel attacks
US11562101B2 (en) * 2017-11-13 2023-01-24 Intel Corporation On-device bitstream validation
US11201730B2 (en) * 2019-03-26 2021-12-14 International Business Machines Corporation Generating a protected key for selective use
US11372983B2 (en) 2019-03-26 2022-06-28 International Business Machines Corporation Employing a protected key in performing operations
FR3096206A1 (fr) * 2019-05-17 2020-11-20 Stmicroelectronics (Grenoble 2) Sas Dispositif de protection de donnees masquees et procede associe
US11700111B2 (en) * 2019-06-26 2023-07-11 Cryptography Research, Inc. Platform neutral data encryption standard (DES) cryptographic operation
CN113343175B (zh) * 2021-05-31 2022-05-27 中国电子科技集团公司第三十研究所 一种自动化搜索spn型轻量级分组密码活跃s盒的快速方法

Family Cites Families (20)

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Publication number Priority date Publication date Assignee Title
US5652796A (en) * 1994-06-21 1997-07-29 Pitney Bowes Inc. Data encryption control system
US6205249B1 (en) * 1998-04-02 2001-03-20 Scott A. Moskowitz Multiple transform utilization and applications for secure digital watermarking
IL139935A (en) * 1998-06-03 2005-06-19 Cryptography Res Inc Des and other cryptographic processes with leak minimization for smartcards and other cryptosystems
JP3600454B2 (ja) * 1998-08-20 2004-12-15 株式会社東芝 暗号化・復号装置、暗号化・復号方法、およびそのプログラム記憶媒体
US6578061B1 (en) * 1999-01-19 2003-06-10 Nippon Telegraph And Telephone Corporation Method and apparatus for data permutation/division and recording medium with data permutation/division program recorded thereon
US7142670B2 (en) * 2001-08-14 2006-11-28 International Business Machines Corporation Space-efficient, side-channel attack resistant table lookups
US20040170121A1 (en) * 2003-02-28 2004-09-02 Samsung Electronics Co., Ltd. Apparatus and method for transmitting header information in an ultra wide band communication system
US7899190B2 (en) * 2004-04-16 2011-03-01 Research In Motion Limited Security countermeasures for power analysis attacks
US7848514B2 (en) * 2004-05-24 2010-12-07 Research In Motion Limited Table masking for resistance to power analysis attacks
FR2873523B1 (fr) * 2004-07-22 2007-08-10 Sagem Procede et dispositif d'execution d'un calcul cryptographique
EP1724961B1 (en) * 2005-05-10 2007-09-26 Research In Motion Limited Key Masking for Cryptographic Processes using a Combination of Random Mask Values
JP4986206B2 (ja) * 2006-02-22 2012-07-25 株式会社日立製作所 暗号処理方法及び暗号処理装置
US7720225B2 (en) * 2006-03-07 2010-05-18 Research In Motion Limited Table splitting for cryptographic processes
JP4936996B2 (ja) * 2007-05-24 2012-05-23 株式会社東芝 非線形データ変換器、暗号化装置、および復号装置
WO2008146482A1 (ja) * 2007-05-30 2008-12-04 Panasonic Corporation 暗号化装置、復号化装置、暗号化方法及び集積回路
CA2688592C (en) * 2007-10-01 2014-04-15 Research In Motion Limited Substitution table masking for cryptographic processes
US7995749B2 (en) * 2007-10-30 2011-08-09 Harris Corporation Cryptographic system configured for extending a repetition period of a random sequence
WO2009074728A1 (fr) * 2007-12-13 2009-06-18 Oberthur Technologies Procede de traitement cryptographique de donnees, notamment a l'aide d'une boite s, dispositif et programme associes
DE102008033962B4 (de) * 2008-07-21 2011-11-24 Siemens Aktiengesellschaft Verfahren und Prozessor-Einrichtung zum Implementieren einer Charakteristik-2-Multiplikation
FR2952256B1 (fr) * 2009-11-04 2011-12-16 St Microelectronics Rousset Protection d'une cle de chiffrement contre des attaques unidirectionnelles

Also Published As

Publication number Publication date
KR20120109501A (ko) 2012-10-08
FR2952773A1 (fr) 2011-05-20
WO2011057991A1 (fr) 2011-05-19
EP2499773A1 (fr) 2012-09-19
US20130129081A1 (en) 2013-05-23
CN102648600A (zh) 2012-08-22
FR2952773B1 (fr) 2012-07-20
JP2013511057A (ja) 2013-03-28
CA2780719C (en) 2019-08-20
EP2499773B1 (fr) 2016-02-17
CN102648600B (zh) 2014-12-24
US9197412B2 (en) 2015-11-24
CA2780719A1 (en) 2011-05-19
KR101783495B1 (ko) 2017-09-29
JP5987250B2 (ja) 2016-09-07

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