ES2119707B1 - Circuito interfaz de linea para banda ancha. - Google Patents

Circuito interfaz de linea para banda ancha.

Info

Publication number
ES2119707B1
ES2119707B1 ES09602435A ES9602435A ES2119707B1 ES 2119707 B1 ES2119707 B1 ES 2119707B1 ES 09602435 A ES09602435 A ES 09602435A ES 9602435 A ES9602435 A ES 9602435A ES 2119707 B1 ES2119707 B1 ES 2119707B1
Authority
ES
Spain
Prior art keywords
block
interface circuit
line interface
wide band
generation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES09602435A
Other languages
English (en)
Other versions
ES2119707A1 (es
Inventor
De Quesada Juan Ignacio Solana
Torres Jose Gonzalez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonica SA
Original Assignee
Telefonica de Espana SA
Telefonica Nacional de Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonica de Espana SA, Telefonica Nacional de Espana SA filed Critical Telefonica de Espana SA
Priority to ES09602435A priority Critical patent/ES2119707B1/es
Priority to UY24727A priority patent/UY24727A1/es
Priority to EP97500164A priority patent/EP0843434A3/en
Priority to MXPA/A/1997/007576A priority patent/MXPA97007576A/es
Priority to MA24823A priority patent/MA24365A1/fr
Priority to ARP970104559A priority patent/AR011508A1/es
Priority to CO97059328A priority patent/CO4600719A1/es
Priority to US08/958,334 priority patent/US6134247A/en
Priority to PE1997000963A priority patent/PE3299A1/es
Priority to BR9705355A priority patent/BR9705355A/pt
Publication of ES2119707A1 publication Critical patent/ES2119707A1/es
Application granted granted Critical
Publication of ES2119707B1 publication Critical patent/ES2119707B1/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1605—Fixed allocated frame structures
    • H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/04—Distributors combined with modulators or demodulators
    • H04J3/047—Distributors with transistors or integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Communication Control (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

CIRCUITO INTERFAZ DE LINEA PARA BANDA ANCHA, QUE CONSISTE EN UN MODULO DE TRANSMISION Y EN UN MODULO DE RECEPCION, ESTANDO FORMADO EL MODULO DE TRANSMISION POR UN BLOQUE CONVERSOR DE FORMATO PARALELO A SERIE (11), QUE RECIBE DATOS DE UN BLOQUE DE GENERACION DE RELOJ DE TRANSMISION (12), ESTANDO INTERCONECTADOS LOS BLOQUES DE GENERACION DE PARIDAD (13), EL BLOQUE ALEATORIZADOR (15) Y EL BLOQUE MULTIPLEXOR (14), MIENTRAS QUE EL MODULO RECEPTOR ESTA CONSTITUIDO A PARTIR DE UN BLOQUE CONVERSOR DE FORMATO SERIE A PARALELO (33), QUE RECIBE DATOS DE UN BLOQUE DE GENERACION DE RELOJ DE RECEPCION (34) Y ENVIA DATOS A UN BLOQUE DEMULTIPLEXOR (36) Y A UN BLOQUE DE VERIFICACION DE PARIDAD (32), ASI COMO A UN BLOQUE DESALEATORIZADOR (37) QUE SE CONECTA AL BLOQUE DEMULTIPLEXOR (36).
ES09602435A 1996-11-19 1996-11-19 Circuito interfaz de linea para banda ancha. Expired - Lifetime ES2119707B1 (es)

Priority Applications (10)

Application Number Priority Date Filing Date Title
ES09602435A ES2119707B1 (es) 1996-11-19 1996-11-19 Circuito interfaz de linea para banda ancha.
UY24727A UY24727A1 (es) 1996-11-19 1997-09-26 Circuito interfaz de linea para banda ancha
EP97500164A EP0843434A3 (en) 1996-11-19 1997-10-01 Line interface circuit for wideband transmission
MXPA/A/1997/007576A MXPA97007576A (es) 1996-11-19 1997-10-02 Circuito interfaz de linea para banda ancha
MA24823A MA24365A1 (fr) 1996-11-19 1997-10-02 Circuit interface de ligne pour bande large
ARP970104559A AR011508A1 (es) 1996-11-19 1997-10-03 Circuito interfaz de linea para banda ancha
CO97059328A CO4600719A1 (es) 1996-11-19 1997-10-09 Circuito interfaz de linea para banda ancha
US08/958,334 US6134247A (en) 1996-11-19 1997-10-27 Broadband line interface circuit
PE1997000963A PE3299A1 (es) 1996-11-19 1997-10-29 Circuito interfaz de linea para banda ancha
BR9705355A BR9705355A (pt) 1996-11-19 1997-11-05 Circuito interface de linhas para banda ampla

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ES09602435A ES2119707B1 (es) 1996-11-19 1996-11-19 Circuito interfaz de linea para banda ancha.

Publications (2)

Publication Number Publication Date
ES2119707A1 ES2119707A1 (es) 1998-10-01
ES2119707B1 true ES2119707B1 (es) 1999-06-16

Family

ID=8296723

Family Applications (1)

Application Number Title Priority Date Filing Date
ES09602435A Expired - Lifetime ES2119707B1 (es) 1996-11-19 1996-11-19 Circuito interfaz de linea para banda ancha.

Country Status (9)

Country Link
US (1) US6134247A (es)
EP (1) EP0843434A3 (es)
AR (1) AR011508A1 (es)
BR (1) BR9705355A (es)
CO (1) CO4600719A1 (es)
ES (1) ES2119707B1 (es)
MA (1) MA24365A1 (es)
PE (1) PE3299A1 (es)
UY (1) UY24727A1 (es)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6578153B1 (en) * 2000-03-16 2003-06-10 Fujitsu Network Communications, Inc. System and method for communications link calibration using a training packet
EP1278321A1 (en) * 2001-07-17 2003-01-22 Alcatel Different type payload transport interface for line applications at high frequency
CN100346328C (zh) * 2001-11-21 2007-10-31 美商内数位科技公司 基站所用于传送数据的方法
US7069464B2 (en) * 2001-11-21 2006-06-27 Interdigital Technology Corporation Hybrid parallel/serial bus interface
US20050002728A1 (en) * 2003-07-01 2005-01-06 Isaac Weiser Plastic connector for connecting parts and method therefor
US7768306B2 (en) * 2006-09-20 2010-08-03 Mediatek Inc. Low to high voltage conversion output driver

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4377843A (en) * 1979-04-19 1983-03-22 Wescom Switching, Inc. Data distribution interface
US4907186A (en) * 1987-02-09 1990-03-06 The United States Of America As Represented By The Secretary Of Commerce Data direct ingest system
EP0289400A3 (en) * 1987-04-30 1990-01-24 Fairchild Weston Systems Inc. High speed asynchronous data multiplexer/demultiplexer
US4827477A (en) * 1987-05-15 1989-05-02 Grumman Aerospace Corporation Bus interface unit
US5040170A (en) * 1988-12-09 1991-08-13 Transwitch Corporation System for cross-connecting high speed digital signals
EP0660555A3 (en) * 1989-01-09 1995-09-13 Fujitsu Ltd Device for multiplexing and demultiplexing digital signals.
US5185736A (en) * 1989-05-12 1993-02-09 Alcatel Na Network Systems Corp. Synchronous optical transmission system
FI83007C (fi) * 1989-10-05 1991-05-10 Nokia Data Systems Digitalt dataoeverfoeringssystem.
DE3934248A1 (de) * 1989-10-13 1991-04-18 Standard Elektrik Lorenz Ag Multiplexer und demultiplexer, insbesondere fuer nachrichtenuebertragungs-netze mit einer synchronen hierarchie der digitalsignale
US5189410A (en) * 1989-12-28 1993-02-23 Fujitsu Limited Digital cross connect system
JP2682334B2 (ja) * 1992-05-29 1997-11-26 日本電気株式会社 画像信号の符号化伝送方法
US5384774A (en) * 1993-01-11 1995-01-24 At&T Corp. Asynchronous transfer mode (ATM) payload synchronizer
KR100295729B1 (ko) * 1995-04-15 2001-08-07 포만 제프리 엘 동기형디지털계층/동기형광통신망인터페이스

Also Published As

Publication number Publication date
PE3299A1 (es) 1999-02-03
US6134247A (en) 2000-10-17
ES2119707A1 (es) 1998-10-01
UY24727A1 (es) 1998-03-17
MA24365A1 (fr) 1998-07-01
BR9705355A (pt) 1999-01-19
CO4600719A1 (es) 1998-05-08
EP0843434A2 (en) 1998-05-20
EP0843434A3 (en) 2001-03-28
MX9707576A (es) 1998-06-28
AR011508A1 (es) 2000-08-30

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