EP3841668A1 - Controlling a limiter adapted for selectively suppressing an audio signal - Google Patents
Controlling a limiter adapted for selectively suppressing an audio signalInfo
- Publication number
- EP3841668A1 EP3841668A1 EP18930864.6A EP18930864A EP3841668A1 EP 3841668 A1 EP3841668 A1 EP 3841668A1 EP 18930864 A EP18930864 A EP 18930864A EP 3841668 A1 EP3841668 A1 EP 3841668A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- audio
- signal
- audio processing
- limiter
- frequency response
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005236 sound signal Effects 0.000 title claims abstract description 60
- 238000012545 processing Methods 0.000 claims abstract description 195
- 230000004044 response Effects 0.000 claims abstract description 77
- 238000012360 testing method Methods 0.000 claims abstract description 63
- 230000001629 suppression Effects 0.000 claims abstract description 31
- 238000000034 method Methods 0.000 claims description 26
- 238000004590 computer program Methods 0.000 claims description 25
- 230000033228 biological regulation Effects 0.000 claims description 16
- 230000003044 adaptive effect Effects 0.000 description 16
- 230000006870 function Effects 0.000 description 13
- 238000010586 diagram Methods 0.000 description 10
- 238000013459 approach Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 230000003595 spectral effect Effects 0.000 description 3
- 238000007430 reference method Methods 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000008672 reprogramming Effects 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G7/00—Volume compression or expansion in amplifiers
- H03G7/002—Volume compression or expansion in amplifiers in untuned or low-frequency amplifiers, e.g. audio amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G3/00—Gain control in amplifiers or frequency changers
- H03G3/02—Manually-operated control
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G5/00—Tone control or bandwidth control in amplifiers
- H03G5/16—Automatic control
- H03G5/165—Equalizers; Volume or gain control in limited frequency bands
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G7/00—Volume compression or expansion in amplifiers
- H03G7/007—Volume compression or expansion in amplifiers of digital or coded signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G7/00—Volume compression or expansion in amplifiers
- H03G7/06—Volume compression or expansion in amplifiers having semiconductor devices
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03G—CONTROL OF AMPLIFICATION
- H03G9/00—Combinations of two or more types of control, e.g. gain control and tone control
- H03G9/02—Combinations of two or more types of control, e.g. gain control and tone control in untuned amplifiers
- H03G9/025—Combinations of two or more types of control, e.g. gain control and tone control in untuned amplifiers frequency-dependent volume compression or expansion, e.g. multiple-band systems
Definitions
- the proposed technology generally relates to audio processing, and more particularly to a method for controlling a limiter adapted for attenuating an audio signal, and a controller configured to control a limiter adapted for selectively suppressing an audio signal, an audio limiter system comprising such a controller, an audio processing system comprising such a controller, as well as a corresponding overall audio system and a computer program and computer-program product.
- PMPs personal music players
- EU regulation EN 50332 [2], [3], [4] states how loud personal music players (PMP) can be and still play on a safe listening level for users.
- the regulation specifies that a test file is to be used (HD 438.1 S2), and that the user settings should be set in such a way as to maximize the playout level.
- the power spectral density of the test signal is shown in FIG. 2.
- the regulation contains limits [5], [6] and test procedures for both when players are sold together with headphones (100 dB(A) SPL) [2] as well as a limit for when the device is used with any headphone (150 mV max RMS output in 3.5 mm socket over a 32 ohm resistive load per channel) [3].
- the adaptive gain of such a limiter takes a parameter, typically called threshold, that can be tuned such that the playout level of the test file complies with the regulation while still being as loud as possible.
- the threshold needs to be set such that the worst- case user settings are still safe.
- Yet another object is to provide an audio processing system comprising such a controller. Still another object is to provide a corresponding overall audio system.
- a method for controlling a limiter adapted for attenuating a first signal in the form of an audio signal processed by an audio processing chain comprising a number, N 3 1 , of audio processing blocks located in the signal path to the limiter.
- Each of the N 3 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the method comprises:
- a controller configured to control a limiter adapted for selectively suppressing a first signal in the form of an audio signal processed by an audio processing chain comprising a number, N > 1 , of audio processing blocks located in the signal path to the limiter.
- Each of the N > 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the controller is configured to determine a control parameter for limiting the maximum suppression of the audio signal based on frequency response estimates of the audio processing block(s) given the user settings currently in use when processing the audio signal, and a representation of the frequency response of a second signal in the form of a test signal as processed by the audio processing chain. Further, the controller is configured to determine a maximum suppression that can be applied by the limiter at least partly based on the control parameter
- an audio limiter system comprising a limiter adapted for selectively attenuating an audio signal processed by an audio processing chain comprising a number, N > 1 , of audio processing blocks located in the signal path to the limiter. Each of the N 3 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the audio limiter system further comprises a controller according to the second aspect.
- an audio processing system comprising an audio processing chain followed by a limiter adapted for selectively attenuating an audio signal processed by the audio processing chain.
- the audio processing chain comprises a number, N > 1 , of audio processing blocks located in the signal path to the limiter, and each of the N > 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the audio processing system further comprises a controller according to the second aspect.
- an audio system comprising an audio processing system according to the fourth aspect.
- a computer program for controlling, when executed by a processor, a limiter adapted for selectively suppressing a first signal in the form of an audio signal processed by an audio processing chain comprising a number, N > 1 , of audio processing blocks located in the signal path to the limiter.
- Each of the N > 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the computer program comprises instructions, which when executed by the processor, cause the processor to:
- a computer-program product comprising a computer-readable medium having stored thereon such a computer program.
- the proposed technology enables to control the audio limiter in such a way that it considers not the worst-case settings, but rather the actual settings that the user currently has.
- Fig. 1 is a schematic block diagram illustrating a simplified example of an audio system.
- Fig. 2 is a schematic diagram illustrating an example of the Power spectral density of the particular test signal HD 438.1 S2.
- Fig. 3 is a schematic diagram illustrating an example of an audio processing system according to an embodiment.
- Fig. 4 is a schematic flow diagram illustrating an example of a method for controlling a limiter adapted for attenuating an audio signal according to an embodiment.
- Fig. 5 is a schematic block diagram illustrating an example of a controller, based on a processor-memory implementation according to an embodiment.
- Fig. 6 is a schematic diagram illustrating an example of a computer-implementation according to an embodiment.
- the audio system 100 basically comprises an audio processing system 200 and a sound generating system 300.
- the audio processing system 200 is configured to process one or more audio input signals which may relate to one or more audio channels.
- the filtered audio signals are forwarded to the sound generating system 300 for producing sound.
- a basic idea is to provide a controller configured to control a limiter adapted for selectively suppressing a first signal in the form of an audio signal processed by an audio processing chain comprising a number, N > 1 , of audio processing blocks located in the signal path to the limiter.
- Each of the N > 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the controller is preferably configured to determine a control parameter for limiting the maximum suppression of the audio signal based on frequency response estimates of the audio processing block(s) given the user settings currently in use when processing the audio signal, and a representation of the frequency response of a second signal in the form of a test signal as processed by the audio processing chain. Further, the controller is configured to determine a maximum suppression that can be applied by the limiter at least partly based on the control parameter.
- Fig. 3 is a schematic diagram illustrating an example of an audio processing system according to an embodiment.
- the audio processing system 200 comprises an audio processing chain 210 having a number, N > 1 , of audio processing blocks located in the signal path to a limiter 220, as well as a controller 230 for controlling the limiter 220.
- the audio processing system 200 is configured to receive an audio input signal x, which is fed into the audio processing chain 210, and the output signal y of the audio processing chain 210 is fed into the limiter 220, which in turn is configured to provide an audio output signal z.
- additional function and/or processing blocks may be part of the audio processing system, e.g. in the signal path from audio input signal to audio output signal.
- the limiter 220 and the controller 230 may be regarded as a limiter system 250.
- the controller 230 may be configured to determine an estimate of the amount of power that is added by the N > 1 audio processing blocks to the test signal, should it be passed through the audio processing chain, based on the frequency response estimates of the audio processing block(s) given the user settings currently in use when processing the audio signal, and the representation of the frequency response of the test signal. The controller may then be configured to determine the control parameter for limiting the maximum suppression of the audio signal based on the determined estimate of the amount of power that is added to the test signal.
- the representation of the frequency response of the test signal may be a predetermined frequency response representation.
- the test signal is typically a standardized audio test signal.
- the standardized audio test signal may be a test signal according to the EU regulation EN 50332.
- the controller is configured to determine the control parameter for limiting the maximum suppression of the audio signal according to:
- the limiter is a Root Mean Square, RMS, limiter.
- an audio limiter system 250 comprising a limiter 220 adapted for selectively attenuating an audio signal processed by an audio processing chain comprising a number, N > 1 , of audio processing blocks located in the signal path to the limiter, wherein each of the N > 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the audio limiter system 250 further comprises a controller 230 as described herein.
- an audio processing system 200 comprising an audio processing chain 210 followed by a limiter 220 adapted for selectively attenuating an audio signal processed by the audio processing chain 210.
- the audio processing chain 210 comprises a number, N > 1 , of audio processing blocks located in the signal path to the limiter, wherein each of the N 3 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the audio processing system 200 further comprises a controller 230 as described herein.
- an overall audio system 100 comprising an audio processing system 200 as described herein.
- the audio system 100 may include a sound generating system using headphones or earphones.
- the audio system may be a personal music player.
- Fig. 4 is a schematic flow diagram illustrating an example of a method for controlling a limiter adapted for attenuating a first signal in the form of an audio signal according to an embodiment.
- the audio signal is processed by an audio processing chain comprising a number, N > 1 , of audio processing blocks located in the signal path to the limiter, and each of the N > 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- the method comprises:
- S1 determining an estimate of the amount of power that is added by the N > 1 audio processing blocks to a second signal in the form of a test signal, should it be passed through the audio processing chain, based on frequency response estimates of the audio processing block(s) given the user settings currently in use when processing the audio signal, and a representation of the frequency response of the test signal;
- S2 determining a control parameter for controlling the limiter based on the determined estimate of the amount of power that is added to the test signal;
- S3 determining a maximum suppression that can be applied by the limiter at least partly based on the control parameter.
- control parameter may be a control parameter for limiting the maximum suppression of the audio signal.
- the representation of the frequency response of the test signal may be a predetermined frequency response representation.
- the test signal may be a standardized audio test signal.
- the standardized audio test signal may be a test signal according to the EU regulation EN 50332.
- the amount of power that is added by the N 3 1 audio processing blocks is estimated by:
- DR - i3 ⁇ 4 S ⁇ ,ip ⁇ i «b ⁇ 3 ⁇ 4 1 i*rai 2 .
- Y[k] X[k]H 1 [k]H 2 [k] ⁇ H N [k]
- X[k] denotes the frequency response of the test signal
- the frequency responses of the N 3 1 audio processing blocks are represented by Hi[k], H 2 [k], .. H N [k].
- the method further comprises the step of obtaining, for each of the N 3 1 audio processing blocks, the frequency response estimate given the user settings currently in use when processing the audio signal.
- the limiter may be a Root Mean Square, RMS, limiter.
- spectral information from processing blocks in an audio processing chain to control an“adaptive gain” that sits after those processing blocks.
- the processing blocks are subject to user settings, and the user settings can affect the frequency response of each block.
- Each block reports a frequency response estimate for a discrete number of frequency bands, given the user settings that is currently in use. These frequency response estimates are used to form an estimate of the total frequency response from all processing blocks that lies before the adaptive gain.
- the total frequency response together with an estimate of the frequency content of the test signal, e.g. a test signal used for EN 50332, gives an estimate of how much additional power that is added to the test signal, should it be run through such a processing chain.
- This value can be used to limit the maximum suppression that is applied by the adaptive gain. This means that the adaptive gain is bounded not to suppress more than is needed by the known processing blocks, and more specifically, the user settings of those processing blocks. If the user settings are such that no additional power is added to the test signal, the adaptive gain backs off and does not suppress the signal.
- the invention enables control of the“adaptive gain” in a way such that it considers not the worst-case settings, but the actual settings that the user has. In this way, the playout level is maximized, while still being safe.
- the audio processing chain contains N processing blocks with known frequency responses that are parameterized using Hi[k], Ftejk], .... HN[k],
- DFTs discrete Fourier transforms
- the adaptive gain block measures the RMS level of the y signal where n is the number of time samples within a frame (a short time segment of the audio signal).
- the output is suppressed by an adaptive gain g s ⁇ 0: where all values are in dB.
- the threshold 0dB is tuned such that the audio output reaches the maximum allowed listening level RMSiimit:
- F( ⁇ B AP(JB + b(jB > where the constant bdB is included to account for imperfections in the frequency estimates, to give headroom so that the adaptive gain in fact makes the device fulfill the regulation.
- the constant should be small, typically between 0 and 1 dB.
- the adaptive gain is bounded to only suppresses up to the amount that is needed from the actual user settings of the processing blocks, as opposed to taking into account the worst-case settings that the user can have.
- the device contains an equalizer that lets the user boost certain frequency bands to obtain a certain preferred audio experience.
- the Sound Pressure Level SPL
- T which is the setting that creates the highest possible SPL
- the SPL at the headphones increases to 1 10 dB(A). Since this SPL is in violation of the regulation, the manufacturer needs to impose a limiter in the audio processing chain.
- the limiters threshold is set to tune the output to be maximum 100 dB(A) in all conditions, and it needs to be able to attenuate 10 dB to be able to pass the test with worst case user settings.
- the SPL at the headphone is measured to be 107 dB(A).
- the limiter will reduce the SPL to 100 dB(A), which it can do since it has a maximum attenuation of 10 dB.
- both the invention and the reference method would use the maximum suppression of 10 dB, resulting in 107 dB(A) SPL from the headphones.
- the audio processing e.g. as illustrated in Fig. 3, includes other, unknown blocks, 3 rd party blocks, and so forth, it is possible to take any of the following example approaches:
- embodiments may be implemented in hardware, or in software for execution by suitable processing circuitry, or a combination thereof.
- At least some of the steps, functions, procedures, modules and/or blocks described herein may be implemented in software such as a computer program for execution by suitable processing circuitry such as one or more processors or processing units.
- processing circuitry includes, but is not limited to, one or more microprocessors, one or more Digital Signal Processors (DSPs), one or more Central Processing Units (CPUs), video acceleration hardware, and/or any suitable programmable logic circuitry such as one or more Field Programmable Gate Arrays (FPGAs), or one or more Programmable Logic Controllers (PLCs).
- DSPs Digital Signal Processors
- CPUs Central Processing Units
- FPGAs Field Programmable Gate Arrays
- PLCs Programmable Logic Controllers
- Fig. 5 is a schematic block diagram illustrating an example of a controller, based on a processor-memory implementation according to an embodiment.
- the controller 230 comprises a processor 231 and a memory 232, the memory 232 comprising instructions executable by the processor 231 , whereby the processor is operative to implement the aspects of the proposed technology described herein.
- the controller 230 may also include an input/output (I/O) device 233 to enable input and/or output of relevant data such as input parameter(s) and/or resulting output parameter(s).
- I/O input/output
- Fig. 6 is a schematic diagram illustrating an example of a computer-implementation according to an embodiment.
- a computer program 425; 435 which is loaded into the memory 420 for execution by processing circuitry including one or more processors 410.
- the processor(s) 410 and memory 420 are interconnected to each other to enable normal software execution.
- An optional input/output device 440 may also be interconnected to the processor(s) 410 and/or the memory 420 to enable input and/or output of relevant data such as input parameter(s) and/or resulting output parameter(s).
- the term‘processor’ should be interpreted in a general sense as any system or device capable of executing program code or computer program instructions to perform a particular processing, determining or computing task.
- the processing circuitry including one or more processors 410 is thus configured to perform, when executing the computer program 425, well-defined processing tasks such as those described herein.
- the processing circuitry does not have to be dedicated to only execute the above- described steps, functions, procedure and/or blocks, but may also execute other tasks.
- the computer program 425; 435 comprises instructions, which when executed by the processor 410, cause the processor 410 to perform the tasks described herein. More specifically, there is provided a computer program 425; 435 for controlling, when executed by a processor 410, a limiter adapted for selectively suppressing a first signal in the form of an audio signal processed by an audio processing chain comprising a number, N 3 1 , of audio processing blocks located in the signal path to the limiter, wherein each of the N 3 1 audio processing blocks is subject to user settings that may affect the frequency response of the processing block.
- Such a computer program 425; 435 comprises instructions, which when executed by the processor, cause the processor 410 to:
- the proposed technology also provides a carrier comprising the computer program, wherein the carrier is one of an electronic signal, an optical signal, an electromagnetic signal, a magnetic signal, an electric signal, a radio signal, a microwave signal, or a computer-readable storage medium.
- the software or computer program 425; 435 may be realized as a computer program product, which is normally carried or stored on a non-transitory computer-readable medium 420; 430, in particular a non-volatile medium.
- the computer- readable medium may include one or more removable or non-removable memory devices including, but not limited to a Read-Only Memory (ROM), a Random Access Memory (RAM), a Compact Disc (CD), a Digital Versatile Disc (DVD), a Blu-ray disc, a Universal Serial Bus (USB) memory, a Hard Disk Drive (HDD) storage device, a flash memory, a magnetic tape, or any other conventional memory device.
- the computer program may thus be loaded into the operating memory of a computer or equivalent processing device for execution by the processing circuitry thereof.
- the procedural flows presented herein may be regarded as a computer flows, when performed by one or more processors.
- a corresponding apparatus may be defined as a group of function modules, where each step performed by the processor corresponds to a function module.
- the function modules are implemented as a computer program running on the processor.
- the computer program residing in memory may thus be organized as appropriate function modules configured to perform, when executed by the processor, at least part of the steps and/or tasks described herein.
- EN 50332-2 - Part 2 Matching of sets with headphones if either or both are offered separately, or are offered as one package equipment but with standardised connectors between the two allowing to combine components of different manufacturers or different design.
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- Engineering & Computer Science (AREA)
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- Circuit For Audible Band Transducer (AREA)
Abstract
Description
Claims
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/SE2018/050856 WO2020040676A1 (en) | 2018-08-24 | 2018-08-24 | Controlling a limiter adapted for selectively suppressing an audio signal |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3841668A1 true EP3841668A1 (en) | 2021-06-30 |
EP3841668A4 EP3841668A4 (en) | 2022-03-23 |
Family
ID=69592720
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP18930864.6A Pending EP3841668A4 (en) | 2018-08-24 | 2018-08-24 | Controlling a limiter adapted for selectively suppressing an audio signal |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP3841668A4 (en) |
WO (1) | WO2020040676A1 (en) |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7003123B2 (en) * | 2001-06-27 | 2006-02-21 | International Business Machines Corp. | Volume regulating and monitoring system |
US7013011B1 (en) * | 2001-12-28 | 2006-03-14 | Plantronics, Inc. | Audio limiting circuit |
WO2007106384A1 (en) * | 2006-03-10 | 2007-09-20 | Plantronics, Inc. | Music compatible headset amplifier with anti-startle feature |
US20080013751A1 (en) * | 2006-07-17 | 2008-01-17 | Per Hiselius | Volume dependent audio frequency gain profile |
WO2015128696A1 (en) * | 2014-02-27 | 2015-09-03 | Sony Corporation | Gain optimized equalizer |
US10708701B2 (en) * | 2015-10-28 | 2020-07-07 | Music Tribe Global Brands Ltd. | Sound level estimation |
US9980028B2 (en) * | 2016-06-22 | 2018-05-22 | Plantronics, Inc. | Sound exposure limiter |
JP6489082B2 (en) * | 2016-08-08 | 2019-03-27 | オンキヨー株式会社 | Equalizer device and equalizer program |
-
2018
- 2018-08-24 EP EP18930864.6A patent/EP3841668A4/en active Pending
- 2018-08-24 WO PCT/SE2018/050856 patent/WO2020040676A1/en unknown
Also Published As
Publication number | Publication date |
---|---|
WO2020040676A1 (en) | 2020-02-27 |
EP3841668A4 (en) | 2022-03-23 |
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