EP3835461A1

EP3835461A1 - Substrate carrier for metallic electroplating of substrates

Info

Publication number: EP3835461A1
Application number: EP19215901.0A
Authority: EP
Inventors: Agata Lachowicz; Jonas GEISSBÜHLER; Antonin FAES
Original assignee: Centre Suisse dElectronique et Microtechnique SA CSEM
Current assignee: Centre Suisse dElectronique et Microtechnique SA CSEM
Priority date: 2019-12-13
Filing date: 2019-12-13
Publication date: 2021-06-16

Abstract

Substrate carrier (1) for electroplating conductive substrates (9), comprising:
- a frame comprising a pair of subframes (3a, 3b) defining at least one emplacement (5) for receiving at least one substrate (9);
- a plurality of electrical contacts (7) attached to at least one of said subframes (3a, 3b), said electrical contacts (7) being arranged to support said substrate (9) in said emplacement and being adapted to be placed in electrical connection with a current source (14),
characterised in that at least some of said electrical contacts (7) comprise:
- a spring-loaded pin (7a) adapted to be in physical and electrical contact with said substrate (9);
- an elastic seal (7d) provided around said spring-loaded pin (7a), said elastic seal (7d) being arranged to seal a contact area between said pin (7a) and said substrate (9).

Description

Technical Field

The present invention relates to the metallic electroplating of substrates. More specifically, it relates to a substrate carrier suitable for, but not limited to, the plating of electrically-conductive tracks on photovoltaic cells, on printed circuit boards (PCB's), on semiconductor wafers, display devices or the like.

State of the art

When selectively electroplating electrically conductive substrates so as to form metallic connecting tracks thereupon, the substrate, which may for instance be a PCB, a semiconductor wafer, a display device or a solar cell in the process of being manufactured, is masked so as to cover areas which are not intended to receive metallic plating thereupon. This masking can be carried out by conventional means, such as applying a layer of resist material, exposing the resist material to UV or thermal radiation through a mask, and subsequent removal of the resist material in zones intended to be plated. Alternatively, a resist material can be selectively applied, e.g. by screen printing, CNC-controlled printing (such as inkjet printing) or similar, or a resist or self-assembling monolayer can be applied and then selectively removed e.g. by laser. If the substrate is not itself conductive, a conductive seed layer of e.g. silver or copper nanoparticles, PVD-deposited metal or similar may be provided at least in the exposed zones.
In order to provide contact zones to allow electrical contact between the substrate and a source of current in the plating apparatus, contacting zones are provided near to the edge of the substrate. These are then e.g. clamped by means of electrically-conductive clamps or clips (for instance as described in US8871076 and US7172184 ), or otherwise electrically contacted to a source of current, and the substrate is immersed in an electroplating bath. Application of electrical current then causes metallic plating such as copper plating to be applied to the exposed areas of the substrate, as is generally known.
After plating, the substrate is removed from the bath, and the resist material (or similar) is removed.
However, the contact zones and the clamps are exposed to the plating solution, and as a result are plated, typically irregularly due to the physical contact between the contact zones and the substrate preventing free circulation of plating solution. This plating consumes additional metal and is hence wasteful, and may impact the current distribution in the case of a solar cell, forming so-called "current thieves".
Furthermore, the clamps or other contacts are themselves plated, and require periodic cleaning to avoid particle formation and poor contact with the substrate.
An aim of the present invention is hence to at least partially overcome the above-mentioned drawbacks of the prior art.

Disclosure of the invention

This aim is attained by the substrate carrier for electroplating conductive substrates, as defined by claim 1. Such substrates may be inherently conductive, or may be rendered conductive by application of a conductive layer such as a seed layer being provided on their surface.
This substrate carrier comprises a frame having a pair of subframes which together define at least one emplacement for receiving at least one substrate, and a plurality of electrical contacts attached to at least one of said subframes. These electrical contacts are arranged to support said substrate in said emplacement and are adapted to be placed in direct or indirect electrical connection with a current source.
According to the invention, at least some, ideally all, of said electrical contacts comprise a spring-loaded pin adapted to be in physical and electrical contact with said substrate, and an elastic seal provided around said spring-loaded pin and arranged so as to seal a contact area between said pin and said substrate.
As a result, the electrical contact with the substrate is sealed from the plating bath solution when plating takes place, thereby preventing plating solution from being in contact with the pin. This latter hence cannot be plated, and remains clean, and the contact area between pin and substrate likewise is not plated. This economises plating solution, prevents undesired plating, and minimises the chance of "current thieves" being formed in the case of a solar cell. Furthermore, since such contacts do not leave any appreciable trace of undesired plating, they can also be used at points on the substrate which would normally be impossible due to the undesired plating caused by prior art contacts, such as remote from the edges of the substrates. In the case of particularly large substrates, this helps improve the current distribution during plating, improving its uniformity and deposition rate.
Advantageously, the elastic seal also serves to seal the pin to the subframe from which it protrudes. One seal can hence perform all sealing on the pin side of the subframe.
Advantageously, said pin is arranged slidably in a tube mounted in a corresponding subframe, a spring being provided in said tube and being arranged so as to urge said pin in the direction of said substrate, i.e. towards the other subframe.
In one embodiment, the tube protrudes from said subframe in a direction opposite to said pin, and a further seal may be provided around said tube on the side of said subframe opposite to said pin. In such a case, the tube may be electrically connectable to an electrical cable, or may be in electrical connection with an electrically conductive layer provided in the corresponding subframe.
Alternatively, the tube may be fully integrated within said subframe, in electrical connection with an electrically conductive layer provided therein.
Advantageously, each of said subframes comprises a plurality of said electrical contacts, each of said electrical contacts provided on a first of said subframes being preferably coaxial with an electrical contact provided on a second of said subframes, although this does not have to be the case.

Brief description of the drawings

Further details of the invention will become apparent upon reading the following description, in reference to the figures which illustrate:

Figure 1a: a schematic isometric view of a substrate carrier according to the invention;
Figure 1b: a large-scale view of the portion of the substrate carrier of figure 1a contained within circle A;
Figure 2: a schematic cross-sectional view of the portion of the substrate carrier indicated by the plane B on figure 1b;
Figure 3: two views of a variant of an electrical contact for use with a substrate carrier according to the invention;
Figure 4: a view similar to that of figure 2, illustrating the electrical contact arrangement of a further embodiment of the invention;
Figure 5: a schematic isometric view of a substrate carrier according to the invention incorporating the electrical contact arrangement of figure 4; and
Figure 6: a schematic isometric view of a substrate carrier according to the invention which is particularly suited to plating of relatively large-area substrates.

Embodiments of the invention

Figures 1a, 1b and 2 illustrate a first embodiment of a substrate carrier 1 for the electroplating of substrates.
This substrate carrier 1 comprises a frame 3 comprising a first subframe 3a attached to a second subframe 3b, e.g. by bolts, clamps, clips or similar. The subframes 3a, 3b are arranged substantially parallel to one another and define nine emplacements 5, in each of which a substrate 9 (see figure 2) is intended to be received. These substrates 9 are each supported in their respective emplacement 5 by a plurality of electrical contacts 7 as will be described further below. The substrate carrier 1 is intended to be placed in an electroplating solution in an electroplating bath, either suspended horizontally or vertically, and the substrates 9 may be e.g. solar cells of any type, printed circuit boards (PCB's), semiconductor wafers, display devices or the like.
In the illustrated embodiment, each subframe comprises a sandwich structure comprising two inwardly-facing, electrically-insulating layers 3a1, 3b1, and two outwardly-facing electrically-insulating layers 3a2, 3b2, with an electrically-conductive layer 3a3, 3b3, sandwiched therebetween. This electrically-conductive layer 3a3, 3b3 may for instance be a metallic layer of e.g. copper, extending at least from the electrical contacts 7 to one or more external contact points 13 arranged so as to be electrically connectable to a current source 14 as is generally known. The electrically-conductive layer 3a3, 3b3 may extend as a plane throughout the subframe 3a, 3b, or may merely be formed as one or more tracks within the structure. Alternatively, electrically-conductive wires can be provided within the subframe's structure, e.g. by being overmoulded.
In the illustrated embodiment, the inwardly-facing layers 3a1, 3b1 are thicker than the outwardly-facing layers 3a2, 3b2, and hence provide the majority of the structural integrity of the corresponding subframe 3a, 3b. However, this does not have to be the case, and the relative thickness of the various layers can be chosen at will.
The substrate 9 is either inherently electrically conductive, or is provided with an electrically conductive seed layer on one or other of its surfaces, and is provided with a plating mask 9c selectively applied on one or both surfaces thereof, so as to define areas which are not to receive plating, and areas in which the underlying substrate (or seed layer) are exposed, and will hence receive plating in the plating bath. The mask 9c may be, for instance, a lithographically-structured photoresist, an inkjet-printed polymer layer, a self-assembled monolayer structured by laser ablation or similar, as is generally known. If present, the seed layer may be provided over the entire surface of the substrate 9, or only in the areas not covered by plating mask 9c, i.e. selectively. In some cases when using a patterned seed layer, the mask 9c may be dispensed with.
The core of the present invention lies in the particular arrangement of the electrical contacts 7.
Each electrical contact comprises an electrically conductive pin 7a protruding from the inward-facing surface of the corresponding subframe 3a, 3c. The pin is slidingly mounted in a tube 7b, which is electrically conductive and is fixed to the corresponding subframe 3a, 3b. The tube 7b also houses a spring 7c in its interior, arranged so as to urge the pin in the direction of the substrate 9. Pin 7a is typically made of copper or stainless steel, although other materials are also possible.
An elastic tubular sealing element 7d is provided around the pin 7a, this sealing element 7d being of sufficient length such that when the substrate 9 is mounted in the substrate carrier 1, it is compressed between the corresponding subframe 3a, 3b and the surface of the substrate 9. As a result, the pin, the substrate 9 and the subframe 3a, 3b are sealed together around the pin 7a.
The sealing element 7d is electrically insulating, and prevents plating solution from coming into contact with the pin 7a. Suitable materials for the sealing element 7d are natural rubber, butyl rubber, silicone rubber, elastomers, or similar.
The pin 7a is in electrical connection with the electrically conductive layer 3a3, 3b3 at its proximal end, and its distal end is arranged to be in contact with an electrically-conductive portion of the substrate 9. As can be seen in figure 2, an opening in the plating mask 9c is provided such that the pin 7a can be in contact with the electrically-conductive portion 9a of the substrate 9. This opening is ideally slightly larger than the head of the pin 7a.
As a result, the pin 7a is in both physical and electrical contact with the substrate 9.
In order to protect the tube 7b from the plating solution, a further seal 7f is provided on the opposite side of the contact 7 to the pin 7a.
As illustrated, the electrical contacts 7 are arranged in pairs, with each electrical contact 7 of the first subframe 3a being coaxial with a corresponding electrical contact 7 of the second subframe 3a, although this does not have to be the case, since the electrical contacts 7 of each subframe 3a, 3b do not have to have any particular spatial relationship to those of the other subframe 3b, 3a. However, coaxial contacts 7 is advantageous in the case of particularly fragile substrates 9 in order to minimise the mechanical stress they induce therein.
Furthermore, In the case in which the substrate 9 is intended to be plated on one side only, only one electrical contact 7 need be provided, the subframe 3b on the unplated side being provided with electrically insulating supports (such as pins, studs, ridges or similar) in order to position the substrate 9 with respect to the subframe 3b.
In view of the foregoing, it is clear that the contact zone between the pin 7a and the substrate 7 will not be plated, which results in the pin remaining clean, undesired plating does not occur, and the disadvantages of the prior art are thereby overcome.
Furthermore, since the sealing element 7d is a separate part, it can easily be replaced.
Figure 3 represents a further variant in which the subframe 3a does not comprise an electrically conductive layer 3a3. In this variant, the subframes 3a, 3b can be monolithic and made of an electrically-insulating material such as a polymer, and the electrical connection between the pin 7a and the current source 14 is provided by an insulated cable 17 electrically connected to the tube 7b and sealed by means of a tubular seal 7f.
Figure 3 also illustrates the principle of compression of the seal 7d when the substrate 9 is mounted in the substrate carrier 1: on the left side of the figure, the seal 7d is uncompressed, whereas in the right side of the figure it is compressed so as to seal the subframe 3a to the plating mask 9c provided on the substrate 9, in order to prevent plating solution from being able to enter into contact with the pin 7a.
Figures 4 and 5 illustrate a further variant of a substrate carrier 1 according to the invention, which differs from that of figures 1a, 1b and 2 in that in which the tube 7b is fully integrated into the structure of the subframe 3a, 3b, namely into the inward-facing electrically-insulating layer 3a1, 3b1. As a result, no parts of the electrical contacts 7 protrude beyond the outwardly-facing insulating layer 3a2, 3b2, which makes storage easier and reduces the risk of damage.
It should be noted from figure 5 that the substrate carrier 1 is arranged to hold a single substrate 9, and indeed the substrate carrier 1 of the invention can be arranged to hold any number of substrates 9 of any desired shape (rectangular, circular, oval, polygonal, irregular, etc.).
Figure 6 illustrates a further variation of a substrate carrier, particularly adapted to (but not exclusively for) relatively large substrates 9, e.g. greater than 1 m² area. In this construction, electrical contacts 7 (which may be of any type described above) are provided not only near the edges of the substrates, but also at intermediate points on one or more bridges 3d extending across the subframes 3a, 3b of the substrate carrier 3 from one side to the other, or in a lattice pattern. The use of a greater number of contact points at intermediate locations on the surface of the substrate helps to obtain a good current distribution, a high deposition rate and excellent uniformity of plating even on such large substrates.
These bridges 3d should be of a size which is sufficiently rigid to support the substrate, but is not of so large an area that it impacts the access of plating ions in the plating solution to the areas of the substrate 9 situated underneath the bridges 3d. Since the insulated contacts of the invention do not leave any appreciable trace on the surface of the substrate 9 after plating, they can also be used at such intermediate points without causing the ill effects of excess undesired plating.
Furthermore, any number of electrical contacts 7 can be provided as desired, and their pins 9a can be of any convenient size and cross-section. Also, multiple seals can be provided around the pin 7a, arranged in any convenient manner.
Although the invention has been described with reference to specific embodiments, variations thereto are possible without departing from the scope of the invention as defined in the appended claims.

Claims

Substrate carrier (1) for electroplating conductive substrates (9), comprising:
- a frame comprising a pair of subframes (3a, 3b) defining at least one emplacement (5) for receiving at least one substrate (9);

- a plurality of electrical contacts (7) attached to at least one of said subframes (3a, 3b), said electrical contacts (7) being arranged to support said substrate (9) in said emplacement and being adapted to be placed in electrical connection with a current source (14),
characterised in that at least some of said electrical contacts (7) comprise:
- a spring-loaded pin (7a) adapted to be in physical and electrical contact with said substrate (9);

- an elastic seal (7d) provided around said spring-loaded pin (7a), said elastic seal (7d) being arranged to seal a contact area between said pin (7a) and said substrate (9).
Substrate carrier (1) according to claim 1, wherein said elastic seal (7d) is furthermore arranged to seal said pin (7a) to the corresponding subframe (3a, 3b).
Substrate carrier (1) according to any preceding claim, wherein said pin (7a) is arranged slidably in a tube (7b) mounted in a corresponding subframe (3a, 3b), a spring (7c) being provided in said tube (7b) and being arranged so as to urge said pin (7a) in the direction of said substrate (9c).
Substrate carrier (1) according to claim 3, wherein said tube (7b) protrudes from said subframe (7a, 7b) in a direction opposite to said pin (7a).
Substrate carrier (1) according to claim 4, wherein a further seal (7f) is provided around said tube (7b) on the side of said subframe (3a, 3b) opposite to said pin (7a).
Substrate carrier (1) according to claim 4, wherein said tube (7b) is electrically connected to an electrical cable (17).
Substrate carrier (1) according to claim 3, wherein said tube (7b) is fully integrated within said subframe (3a, 3b).
Substrate carrier (1) according to one of claims 3-7, wherein said subframe (3a, 3b) comprises an electrically conductive layer (3a3, 3b3) in electrical connection with said tube (7b).
Substrate carrier (1) according to any preceding claim, wherein each of said subframes (3a, 3b) comprises a plurality of said electrical contacts (7).
Substrate carrier (1) according to claim 9, wherein each of said electrical contacts (7) provided on a first of said subframes (3a) is coaxial with an electrical contact (7) provided on a second of said subframes (3b).