EP3440846B1 - Wireless microphone and/or in-ear monitoring system and method for controlling a wireless microphone and/or in-ear monitoring system - Google Patents

Wireless microphone and/or in-ear monitoring system and method for controlling a wireless microphone and/or in-ear monitoring system Download PDF

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Publication number
EP3440846B1
EP3440846B1 EP17716491.0A EP17716491A EP3440846B1 EP 3440846 B1 EP3440846 B1 EP 3440846B1 EP 17716491 A EP17716491 A EP 17716491A EP 3440846 B1 EP3440846 B1 EP 3440846B1
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Prior art keywords
master
slave
clock
phase
audio
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German (de)
French (fr)
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EP3440846A1 (en
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Sebastian Georgi
Jan Watermann
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Sennheiser Electronic GmbH and Co KG
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Sennheiser Electronic GmbH and Co KG
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R3/00—Circuits for transducers, loudspeakers or microphones
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R2420/00—Details of connection covered by H04R, not provided for in its groups
    • H04R2420/07—Applications of wireless loudspeakers or wireless microphones

Definitions

  • the present invention relates to a wireless microphone and / or in-ear monitoring system and a method for controlling a wireless microphone and / or in-ear monitoring system.
  • a so-called word clock is typically used as a base clock, which is required to enable audio data streams to be transmitted between digital audio devices.
  • a word clock is used to synchronize all devices or units involved in digital audio processing with regard to the sampling times of the processed audio signals.
  • the various digital audio devices that are to be synchronized by means of the word clock can represent, for example, AD converters, effect devices, mixing desks, DA converters, etc.
  • these audio devices have digital interfaces such as AES3 / SPDIF, AES10 / MADI. Based on the word clock synchronization, a continuous transfer of audio samples can be guaranteed, which prevents an empty or overflowing of a buffer.
  • a synchronous phase relationship of the audio signals can be achieved by the word clock synchronization.
  • the devices used in digital audio processing typically have an internal clock generator which provides a basic clock with which the digital samples of the audio data are processed.
  • a word clock is specified as the master clock and adopted as slaves by the devices involved.
  • the word clock master provides a signal via a cable which cyclically contains an excitation for each individual sampling time, and the slave device can use this signal to continuously adapt its own clock generator to the sampling clock coming from the word clock master.
  • the invention relates to the task of enabling synchronization of the word clock of different audio processing units in a wireless microphone and / or in-ear monitoring system.
  • a wireless microphone and / or in-ear monitor system which has at least one clock master for specifying a word clock and at least one clock slave which is to be synchronized with the word clock specified by the clock master.
  • a digital wireless transmission link is present between the clock master and the at least one clock slave, which digitally transmits both synchronization signals and audio signals.
  • the clock master has a clock reference in order to specify a first sample clock.
  • the clock master also has a synchronization interface for wireless transmission of a synchronization word.
  • the clock master has a first timer. A first phase of the first clock signal is detected after the first timer has expired and the first phase is transmitted wirelessly to the at least one clock slave.
  • the at least one first clock slave has a second timer.
  • a second phase of the second clock signal of the clock slave is recorded and compared with the wirelessly transmitted first phase.
  • the deviation between the first and second phases is used as an input variable as a control unit in the at least one clock slave.
  • the control unit adjusts an adjustable sample clock of the at least one clock slave in such a way that it corresponds to the first clock of the clock master.
  • a wireless microphone and / or in-ear monitoring system which has a wireless digital transmission.
  • the audio signal For the wireless digital transmission of an audio signal, the audio signal must be subjected to a digital / analog conversion.
  • the analog / digital conversion is carried out at fixed time intervals, based on a sample clock.
  • Another device that receives the audio signal sent over the wireless digital transmission link should use the same sample clock if possible.
  • the sample clock is generated in the further device itself, it can be based on tolerances of the electronic components used and / or temperature differences differ slightly from the sampling clock of the sending device.
  • a meaningful transmission of room-related multichannel signals can only function to a limited extent; acoustic room location is therefore very imprecise, sometimes impossible. Synchronization of the sample clock in frequency and in phase is therefore required.
  • the wireless microphone and / or in-ear monitoring system enables wireless word clock synchronization for synchronous analog / digital and digital / analog conversion in wireless audio devices such as wireless microphones and wireless in-ear monitoring systems.
  • Receiver can be used.
  • the advantage of a wireless word clock synchronization is present in particular in the case of a microphone and stereo-compatible microphone with several wireless microphones and / or wireless in-ear monitoring receivers. This also avoids a sample rate conversion, which is otherwise necessary to output several incoming channels (e.g. from several microphones) on a common sum channel.
  • the problem to be dealt with is based on the fact that when digitally recording, processing and outputting audio data, sample values are generated at certain points in time generated by the analog audio signals. This can be done with a frequency of 48 kHz, for example. If the devices run at different sampling rates, a sample rate conversion is necessary when the audio data is passed on to another device, in which sample values between the actual sampling times have to be estimated, which leads to artifacts which are noticeable as so-called "phase noise" do. The same problem occurs if several devices for digital audio processing nominally work at the same sampling rate, but each independently generate the nominal clock rate independently of one another.
  • the word clock synchronization described above is known for wired devices.
  • the sampling times ie the times at which a digital sample value is generated, processed or output for an analog audio signal. synchronized between all connected devices.
  • the well-known wired transmission of the word clock signal is based on the fact that the cable provides a delay-free, always available connection between the .Wordclock master and the respective word clock slave, via which the signal, which contains an excitation cyclically for each individual sampling time, provided.
  • the slave device can use this signal to continuously adapt its own clock generator to the sampling clock coming from the word clock master.
  • the invention relates to a method and associated devices that enable a word clock synchronization of the audio sampling times in a wireless transmission of digital audio data.
  • a wireless microphone and / or in-ear monitoring system is provided.
  • wireless microphones can wirelessly transmit an audio signal detected by them to a receiver.
  • an audio signal can be transmitted wirelessly to an in-ear monitoring unit, so that this audio signal can be output, for example, via an in-ear earphone to a wearer of the in-ear monitoring system.
  • At least one clock master TM and at least one clock slave TS are present in the wireless microphone and / or in-ear monitoring system.
  • the at least one clock slave must then adjust to the clock specified by the clock master, for example the word clock, both in terms of frequency and in terms of phase.
  • Fig. 1 shows a time course of signals that are used in a clock master and a clock slave according to a first embodiment for sampling time synchronization.
  • the master audio sample clock 100 of the clock master is shown over time t.
  • the master audio sample clock 100 itself can already be matched to a word clock signal from an external clock generator.
  • the master audio sample clock 100 is the master clock to which the audio sampling times of the slave device (s) are to be adapted.
  • a rising edge of the master audio sample clock 100 is assigned an audio sampling time, at which a sample value of an analog audio signal is to be determined, processed or output.
  • the master sampling times 101, 102 and 103 are shown.
  • the master device also contains a master fine clock, which drives a master phase counter.
  • Fig. 1 the counter reading 110 of the master phase counter is shown over the time t.
  • the counter reading 110 of the master phase counter is reset to zero by a reset command ResM.
  • the master phase counter counts up with the clock of the master fine clock on each tic of the master fine clock.
  • the counter reading 110 therefore indicates, with the temporal resolution of the master fine clock, how much time has elapsed since the last master sampling time.
  • the master fine clock has a clock frequency that is much larger than the audio sampling frequency.
  • a master fine clock with a frequency of 160 MHz can be used, so that the master phase counter approximately from one audio sampling time to the next audio sampling time (depending on the exact audio sampling rate desired) reached a value of 3333.
  • the counter reading 110 of the master phase counter here represents phase information about the phase of the master audio sample clock 100 that has passed since the last audio sample.
  • the clock of the master fine clock is selected so that there are at least 500 tics of the master fine clock in the time period from an audio sampling time to the immediately following audio sampling time, so that the counter reading 110 of the master phase counter is at least in each audio sampling step counts up to 500.
  • an audio sample clock and a phase detection are set up corresponding to the master device.
  • the slave audio sample clock 150 of the clock slave is shown over time t.
  • a slave audio sampling instant 151, 152, 153 is assigned to a rising edge of the slave audio sample clock 150.
  • the slave audio sample clock 150 is adjustable and it is the object of the present invention to set the slave audio sample clock 150 such that the slave audio sampling times 151, 152, 153 correspond to the master audio sampling times 101, 102, 103 correspond.
  • the slave device contains a slave fine clock, which drives a slave phase counter.
  • Fig. 1 the counter reading 160 of the slave phase counter is shown over the time t.
  • the counter state 160 of the slave phase counter is reset to zero by a reset command ResS at each slave sampling time, that is to say every time the slave audio sample clock 150 has a positive edge.
  • the slave phase counter then counts up with the clock of the slave fine clock on each tic of the slave fine clock.
  • the counter reading 160 thus indicates, with the temporal resolution of the slave fine clock, how much time has elapsed since the last slave sampling time.
  • the slave fine clock generator preferably has nominally the same clock frequency as the master fine clock generator.
  • the counter reading 160 of the slave phase counter here represents phase information about the phase of the slave audio sample clock 150 that has passed since the last slave audio sample.
  • Fig. 1 a state is shown in which the slave audio sampling times 151, 152, 153 do not yet correspond to the master audio sampling times 101, 102, 103.
  • the slave audio sample clock 150 is compared to the master audio sample clock 100 with the aid of a synchronization event that defines a synchronization time 130.
  • the synchronization event which defines the synchronization time 130, can preferably be obtained from the data synchronization between a transmitter and a receiver.
  • a separate data synchronization is provided for the wireless transmission of data between a transmitter and a receiver, which enables the bits contained to be transmitted correctly, but which is independent of the audio sampling rate.
  • times can be specified for wireless data transmission at which the data transmission protocol used in each case establishes a fixed temporal relationship between the master and the slave device. This can be, for example, a time slot in the context of a TDMA method in which a control code is transmitted.
  • such an event which creates a fixed temporal relationship between the master and the slave device, is used to cause the master device and the slave device to simultaneously display the current counter reading 110 of the master phase counter and the current one Counter reading 160 of the slave phase counter.
  • “simultaneously” means that the time offset of the acquisition of the counter value between the master and slave device corresponds at most to the duration of one tic of the master fine clock and thus also of the slave fine clock.
  • the master device detects the master phase 120 at time 130 by reading out the counter reading 110 of the master phase counter and the slave device detects the slave phase 170 at time 130 by reading out the counter reading 160 of the slave phase counter.
  • synchronization time 130 In addition to the generation of the synchronization time 130 on the basis of the data synchronization, another event can alternatively also be used to determine the synchronization time 130. It is only important that a fixed temporal relationship between the master and the slave device is guaranteed at this point in time, on which a simultaneous detection of the master phase 120 and the slave phase 170 (according to the explained definition of "simultaneously” ) can be carried out.
  • the detected value of the master phase 120 is transmitted wirelessly from the master device to the slave device. It does not matter whether this transmission has a specific temporal relationship to the synchronization time 130.
  • the slave device receives the measured value of the master phase 120 and compares it with the value of the slave phase 170 measured at the same time 130.
  • the result of this comparison is the control deviation of the phase of the slave audio sample clock 150 the desired phase of the master audio sample clock 100.
  • this comparison result is fed as a phase deviation to a controller in a "phase-locked loop" (PLL).
  • PLL phase-locked loop
  • the controller can influence the clock rate of the slave audio sample clock 150.
  • this clock rate is then influenced in such a way that after multiple execution of the control loop, the slave phase 170 corresponds to the master phase 120.
  • the regulation provides for a cyclical repetition of the entire measurement and processing of the master phase (120) and the slave phase (170).
  • the adjustment of the clock rate of the slave audio sample clock 150 to the clock rate of the master audio sample clock 100 results inevitably as a secondary result when regulating the phase deviation as a target variable.
  • a particular advantage of the described method according to the invention for matching the slave audio sample clock 150 to the master audio sample clock 100 is that the master fine clock and the slave fine clock are used only for a short time.
  • the fine clock generators each generate their own clock, and since they are separate Components - once in the master device and once in the slave device - do not run at exactly the same speed. Because the counter reading 110 of the master phase counter and the counter reading 160 of the slave phase counter are reset to zero at each audio sampling time, the time period during which a different speed of the two fine clocks has an effect on the phase measurement result, so short that there is a deviation of less than one tic of the fine clock between the measured master phase 120 and the measured slave phase 170 with the generally available clocks.
  • an audio sampling frequency of 48 kHz and a fine clock frequency of 160 MHz can be used, so that the phase counters reach a value of 3333 from one audio sampling time to the next audio sampling time. If the speed of the two fine clocks differ so much that a tic difference already occurs between the two fine clocks within this period, this would correspond to a clock accuracy of 300 ppm (parts per million), i.e. an error of 300 steps over a period of 1 Million tics. With standard clocks, an accuracy of approx. 20 ppm is currently common and 2.5 ppm is also available, for example.
  • the short-term use of the fine clocks according to the invention advantageously avoids the problems from separately running fine clocks.
  • the method according to the invention thus offers an advantage over an alternative approach that would otherwise be possible, in which an overall time period between the synchronization times 130 is determined with the aid of the fine clock and transmitted together with the amount of the sampling times that occurred during this time period.
  • Fig. 2 shows a block diagram of a master device TM and a slave device TS according to the first embodiment.
  • the master device TM contains a master audio sample clock generator ASPGM for generating the master audio sample clock 100.
  • the master device TM itself can have a word clock input WRDCLK and a master word clock synchronization unit WSUM have the master audio sample clock 100 itself can be adjusted to a word clock signal from an external clock.
  • the master audio sample clock 100 specifies the clock for a digital master audio input / output unit AIOM.
  • the AIOM master audio input / output unit serves as an external interface for the master device and can be used to receive and send digital audio data.
  • the master device TM also contains a master fine clock FPGM, which drives a master phase counter PCM.
  • the master phase counter PCM generates continuously the counter reading 110. At every sampling instant, that is to say every time the master audio sample clock 100 has a positive edge, the counter reading 110 of the master phase counter PCM is reset to zero by a reset command ResM. Thereafter, the master phase counter PCM counts up with the clock of the master fine clock FPGM on each tic of the master fine clock.
  • the counter reading 110 therefore indicates, with the temporal resolution of the master fine clock, how much time has elapsed since the last master sampling time.
  • the slave device TS contains a slave audio sample clock generator ASPGS for generating the slave audio sample clock 150.
  • the slave audio sample clock generator ASPGS is designed in such a way that its clock rate is within certain limits is adjustable.
  • the slave audio sample clock 150 specifies the clock for a digital slave audio input / output unit AIOS.
  • the slave audio input-output unit AIOS serves as an interface of the slave device to the outside and can be used to receive and send digital audio data. If the slave device TS is designed as a microphone, an A / D converter can be connected to the slave audio input / output unit AIOS and provide a digital audio signal as an input. If the slave device TS is designed as an in-ear monitoring system, a D / A converter can be connected to the slave audio input / output unit AIOS and a digital audio signal can be output as an output.
  • the slave device TS also contains a slave fine clock FPGS, which drives a slave phase counter PCS.
  • the slave phase counter PCS continuously generates the counter reading 160.
  • the counter reading 160 of the slave phase counter PCS is opened by a reset command ResS Zero reset.
  • the slave phase counter PCS counts up with the clock of the slave fine clock FPGS on each tic of the slave fine clock.
  • the counter reading 160 thus indicates, with the temporal resolution of the slave fine clock, how much time has elapsed since the last slave sampling time.
  • the slave audio sample clock 150 is compared to the master audio sample clock 100 with the aid of a synchronization event that defines a synchronization time 130.
  • a synchronization event can be generated by a phase measurement trigger PMT.
  • the phase measurement trigger PMT can synchronize the synchronization event from the data synchronization gain a transmitter and a receiver, in particular from the wireless transmission between the master device TM and the slave device TS.
  • the synchronization event can be transmitted wirelessly to a measurement trigger receiver MTR in the slave device TS via a phase measurement trigger transmitter PMTT, a fixed temporal relationship being generated between the master and the slave device.
  • the master device TM can contain a timer T1, which is started by the phase measurement trigger PMT.
  • the timer T1 can be clocked by the master fine clock FPGM.
  • the slave device TS can contain a timer T2, which is started when the measurement trigger receiver MTR receives the synchronization event.
  • the timer T2 can be clocked by the slave fine clock FPGS.
  • the two timers T1 and T2 can serve to take into account the transmission time that is required for the transmission of the synchronization event.
  • the two timers T1 and T2 are then controlled so that they both run simultaneously and thus generate the synchronization time 130 simultaneously in the master device TM and in the slave device TS.
  • "simultaneously" means that the time offset of the acquisition of the phase counter value between the master and slave device corresponds at most to the duration of one tic of the master fine clock FPGM and thus also of the slave fine clock FPGS.
  • the master device TM also contains a master phase value transducer PVM, which reads out the current counter reading 110 of the master phase counter PCM at the synchronization time 130 and stores it as the master phase 120.
  • the slave device TS accordingly contains a slave phase value pickup PVS, which reads out the current counter reading 160 of the slave phase counter PCS at synchronization time 130 and stores it as a slave phase 170.
  • the detected value of the master phase 120 is transmitted wirelessly from the master device TM to the slave device TS.
  • the master device TM contains a phase transmitter PT and the slave device a phase receiver PR. It does not matter whether this transmission has a specific temporal relationship to the synchronization time 130.
  • the slave device TS receives the measured value of the master phase 120 and compares it in a comparator C with the value of the slave phase 170 measured at the same time 130.
  • the result of this comparison is the control deviation of the phase of the slave audio Sample clocks 150 versus the desired Phase of the master audio sample clock 100.
  • this comparison result is fed as a phase deviation to a controller R in a "phase-locked loop" (PLL).
  • the controller R can influence the clock rate of the slave audio sample clock encoder ASPGS and thus of the slave audio sample clock 150 as a manipulated variable.
  • this clock rate is then influenced in such a way that after multiple execution of the control loop, the slave phase 170 corresponds to the master phase 120.
  • the adjustment of the clock rate of the slave audio sample clock 150 to the clock rate of the master audio sample clock 100 inevitably arises as a secondary result.
  • the master device TM also contains a master audio transmitter receiver ATRM, via which it can wirelessly send and / or receive digital audio data, the master audio sample clock 100 of the master audio sample clock transmitter ASPGM are assigned, and the slave device TS also contains a slave audio transmitter receiver ATRS, via which it can wirelessly send and / or receive digital audio data that corresponds to the slave audio sample clock 150 of the slave audio Sample clock encoder ASPGS are assigned.
  • the master audio transmitter receiver ATRM is connected to the master audio input output unit AIOM and the slave audio transmitter receiver ATRS is connected to the slave audio input output unit AIOS.
  • the master audio transmitter receiver ATRM, the phase transmitter PT and the phase measurement trigger transmitter PMTT can be combined in a common wireless transmission unit TRUM in the master device TM.
  • the slave audio transmitter receiver ATRS, the phase receiver PR and the measurement trigger receiver MTR can optionally be combined in a common wireless transmission unit TRUS in the slave device TS.
  • Fig. 3 shows a schematic representation of a time course of a word clock synchronization in a wireless microphone and / or in-ear monitoring system according to a second embodiment.
  • the second embodiment according to 3 and 4 largely corresponds to the first embodiment.
  • the second exemplary embodiment deals more closely with how the audio sample clocks are generated and a possible consideration of a known time period for transmitting a synchronization event is explained in more detail.
  • a clock master TM can transmit a synchronization word S over a bidirectional wireless transmission link, preferably at regular intervals.
  • the clock master TM can have a clock generator (for example 49.152 MHz).
  • the output of the clock generator can be divided with a clock divider (for example 1024) to a sample clock of for example 48 kHz.
  • the in Fig. 3 The temporal sequence shown shows the conditions in the steady state, ie the synchronization has already taken place, so that the sample clock of the slave has already been matched in frequency and phase to the sample clock of the master.
  • the synchronization process is described based on the steady state.
  • the clock master TM starts a first timer T1 when the synchronization word S is sent. After the first timer T has expired, the phase P1 of the sample clock S1 is measured. The measured phase P1 is transmitted to one or more clock slaves TS (e.g. via a broadcast channel BC). The clock slave TS receives the synchronization word S and starts a second timer T2. After the second timer T2 has elapsed, the phase P2 of the sample clock S2 of the clock slave TS is measured. When the clock slave TS receives the first phase P1 via the broadcast BC, the first and second phases P1, P2 are compared in a comparison unit C and the deviation determined by the comparison represents the control deviation of the adjustable clock generator of the clock slave TS. This process can can optionally be carried out when each synchronization word S is transmitted. Alternatively, this can also be carried out after a number of synchronization words S have been transmitted.
  • clock S1 can be provided in the master and clock S2 can be provided in the slave.
  • the timer T2 can run in the slave.
  • Fig. 3 is symbolically represented as the width of the block S. In practice, it is very short.
  • the setting of timers T1 and T2 in such a way that both timers run at the same time can only be done with a limited accuracy, since these timers are subject to certain slight fluctuations due to different clocks in the master and slave.
  • the time shown as the width of the block S likewise shows slight fluctuations. In practice, however, all of these three changes are extremely small, so that they have no significance for the control of the analog / digital converters in the master / slave compared to the clock fluctuations.
  • the shift of the sample clocks is orders of magnitude stronger, so that the slight time fluctuations of S, T1 and T2 are irrelevant in practice.
  • Fig. 4 shows a block diagram of a synchronization in a wireless microphone and / or in-ear monitoring system according to the second embodiment.
  • a clock slave TS has an adjustable clock generator (for example a VCXO with a clock divider D).
  • a clock generator can be implemented, for example, as a voltage control crystal oscillator VCXO or as a digitally controlled crystal oscillator DCXO.
  • the first and / or second timer T1, T2 is set so that it runs at the same time.
  • the phase measured by the clock master TM and transmitted to the clock slave TS coincides with the phase of the clock slave. If there is a deviation, then this deviation is to be regulated to zero by means of a controller R in the clock slave TS.
  • a control variable of the controller can be the control signal of the adjustable clock generator VCXO in the clock slave TS.
  • the clock master TM can have a digital / analog converter DAC, a clock divider D, an oscillator XO, a first sample-and-hold unit SHP1 for storing the first phase P1.
  • the first phase P1 can be broadcast via a data transmission interface DT.
  • the clock master TM can have an audio transmission interface A, which transmits the audio data picked up by the microphone M and processed by the analog / digital converter ADC from the clock slave TS to the clock master TM.
  • the clock master TM can have a synchronization interface SY.
  • the clock slave TS can for example be coupled to a microphone M and receives the output signal of the microphone M.
  • the output signal of the microphone can be digitized in an analog / digital converter DAC.
  • the clock slave TS has an adjustable oscillator VCXO, a clock division unit D, a second sample-and-hold unit SHP2, a comparison unit C, a second timer T2 and a controller R.
  • the clock master TM transmits the synchronization word RXS, which is received by the clock slave TS, via the synchronization interface SY.
  • the second timer T2 is started.
  • the second sample-and-hold unit SHP2 is used to store the second measured phase P2 of the clock slave TS. If data through the data transfer interface DT are transmitted, then the first and second phases P1, P2 are compared in the comparison unit C.
  • the output of the comparison unit C is an input signal of the control unit R.
  • the output signal of the control unit R controls an adjustable clock generator VCXO.
  • the output signal of the adjustable clock generator VCXO is divided by the clock divider unit D and fed to the analog / digital converter ADC, which uses this clock as a sampling clock for sampling the output signal of the microphone M.
  • the correspondingly digitized output signal of the microphone M is transmitted via the audio interface A to the clock master TM, which performs a digital / analog conversion in the digital / analog converter DAC and can then output the analog output signal to a loudspeaker L, for example.
  • the invention thus relates to a bidirectional wireless transmission link with regular time synchronization of at least one clock slave to the clock master.
  • a transmission process of the clock master and a reception process of the clock slave each start a timer in order to ensure the same measurement time on all devices.
  • the clock master measures a sample clock phase at the time of measurement, which is transmitted to all clock slaves.
  • a clock slave measures a sample clock phase at the time of measurement. This sample clock phase is compared with the received sample clock phase of the clock master.
  • a deviation is used to control an adjustable clock generator in the clock slave so that this deviation is regulated to zero.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Acoustics & Sound (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Transmitters (AREA)
  • Circuit For Audible Band Transducer (AREA)

Description

Die vorliegende Erfindung betrifft ein Drahtlos-Mikrofon- und/oder In-Ear-Monitoring-System und ein Verfahren zum Steuern eines Drahtlos-Mikrofon- und/oder In-Ear-Monitoring-Systems.The present invention relates to a wireless microphone and / or in-ear monitoring system and a method for controlling a wireless microphone and / or in-ear monitoring system.

Bei kabelgebundenen digitalen Audioverarbeitungssystemen wird typischerweise ein sog. Wordclock als ein Basistakt verwendet, welcher benötigt wird, um eine Übertragung von Audiodatenströmen zwischen digitalen Audiogeräten zu ermöglichen. Ein Wordclock wird verwendet, um alle an der digitalen Audioverarbeitung beteiligten Geräte oder Einheiten hinsichtlich der Abtastzeitpunkte der verarbeiteten Audiosignale zu synchronisieren. Die verschiedenen digitalen Audiogeräte, welche mittels des Wordclocks synchronisiert werden sollen, können beispielsweise AD-Wandler, Effektgeräte, Mischpulte, DA-Wandler etc. darstellen. Typischerweise verfügen diese Audiogeräte über digitale Schnittstellen wie beispielsweise AES3/SPDIF, AES10/MADI. Basierend auf der Wordclock-Synchronisation kann eine kontinuierliche Weitergabe von Audiosamples gewährleistet werden, wodurch ein Leerlaufen oder ein Überlaufen eines Puffers verhindert werden kann. Durch die Wordclock-Synchronisation kann eine synchrone Phasenlage der Audiosignale erreicht werden. Das bedeutet beispielsweise bei der Verwendung mehrerer Mikrofone, dass alle über den Wordclock synchronisierten Mikrofone jeweils gleichzeitig ein digitales Sample des jeweiligen Mikrofonsignals erzeugen. Die in einer digitalen Audioverarbeitung verwendeten Geräte weisen typischerweise einen internen Taktgenerator auf, der einen Basistakt zur Verfügung stellt, mit welchem die digitalen Abtastwerte der Audiodaten verarbeitet werden. Wenn jedoch mehrere digitale Audiogeräte vorhanden sind, so wird eine Wordclock als Masterclock vorgegeben und von den beteiligten Geräten als Slaves übernommen. Dazu wird von dem Wordclock-Master über ein Kabel ein Signal zur Verfügung gestellt, das zyklisch für jeden einzelnen Abtastzeitpunkt eine Anregung enthält, und das Slave Gerät kann den eigenen Taktgenerator anhand dieses Signals fortlaufend an den vom Wordclock-Master kommenden Abtastungstakt anpassen.In wired digital audio processing systems, a so-called word clock is typically used as a base clock, which is required to enable audio data streams to be transmitted between digital audio devices. A word clock is used to synchronize all devices or units involved in digital audio processing with regard to the sampling times of the processed audio signals. The various digital audio devices that are to be synchronized by means of the word clock can represent, for example, AD converters, effect devices, mixing desks, DA converters, etc. Typically, these audio devices have digital interfaces such as AES3 / SPDIF, AES10 / MADI. Based on the word clock synchronization, a continuous transfer of audio samples can be guaranteed, which prevents an empty or overflowing of a buffer. A synchronous phase relationship of the audio signals can be achieved by the word clock synchronization. When using several microphones, for example, this means that all microphones synchronized via the word clock each generate a digital sample of the respective microphone signal at the same time. The devices used in digital audio processing typically have an internal clock generator which provides a basic clock with which the digital samples of the audio data are processed. However, if there are several digital audio devices, a word clock is specified as the master clock and adopted as slaves by the devices involved. For this purpose, the word clock master provides a signal via a cable which cyclically contains an excitation for each individual sampling time, and the slave device can use this signal to continuously adapt its own clock generator to the sampling clock coming from the word clock master.

Eine derartige Wordclock-Synchronisation ist jedoch nur bei kabelgebundenen digitalen Audioverarbeitungsgeräten bekannt. Ein derartiges System wird im WO2015/038776 A1 offenbart.However, such a word clock synchronization is only known for wired digital audio processing devices. Such a system is used in WO2015 / 038776 A1 disclosed.

Die Erfindung betrifft die Aufgabe, eine Synchronisation der Wordclock verschiedener Audioverarbeitungseinheiten in einem Drahtlos-Mikrofon- und/oder In-Ear-Monitoring-System zu ermöglichen.The invention relates to the task of enabling synchronization of the word clock of different audio processing units in a wireless microphone and / or in-ear monitoring system.

Diese Aufgabe wird durch ein Drahtlos-Mikrofon- und/oder In-Ear-Monitoring-System nach Anspruch 1 sowie durch ein Verfahren zum Steuern eines Drahtlos-Mikrofon- und/oder In-Ear-Monitoring-System nach Anspruch 2 gelöst.This object is achieved by a wireless microphone and / or in-ear monitoring system according to claim 1 and by a method for controlling a wireless microphone and / or in-ear monitoring system according to claim 2.

Somit wird ein Drahtlos-Mikrofon- und/oder In Ear-Monitor-System vorgesehen, das wenigstens einen Taktmaster zum Vorgeben einer Wordclock und mindestens einen Taktslave aufweist, welcher auf die von dem Taktmaster vorgegebene Wordclock zu synchronisieren ist. Zwischen dem Taktmaster und dem mindestens einen Taktslave ist eine digitale Drahtlos-Übertragungsstrecke vorhanden, welche sowohl Synchronisationssignale als auch Audiosignale digital überträgt. Der Taktmaster weist eine Taktreferenz auf, um einen ersten Sampletakt vorzugeben. Der Taktmaster weist ferner eine Synchronisationsschnittstelle zur drahtlosen Übertragung eines Synchronisationswortes auf. Der Taktmaster weist einen ersten Timer auf. Eine erste Phase des ersten Taktsignals wird nach Ablauf des ersten Timers erfasst und die erste Phase wird drahtlos an den mindestens einen Taktslave übertragen. Der mindestens eine erste Taktslave weist einen zweiten Timer auf. Nach Ablauf des zweiten Timers wird eine zweite Phase des zweiten Taktsignals des Taktslaves erfasst und mit der drahtlos übertragenen ersten Phase verglichen. Die Abweichung zwischen der ersten und zweiten Phase wird als Eingangsgröße als ein Regeleinheit in dem mindestens einen Taktslave verwendet. Die Regeleinheit stellt einen einstellbaren Sampletakt des mindestens einen Taktslaves derart ein, dass sie dem ersten Takt des Taktmasters entspricht.A wireless microphone and / or in-ear monitor system is thus provided which has at least one clock master for specifying a word clock and at least one clock slave which is to be synchronized with the word clock specified by the clock master. A digital wireless transmission link is present between the clock master and the at least one clock slave, which digitally transmits both synchronization signals and audio signals. The clock master has a clock reference in order to specify a first sample clock. The clock master also has a synchronization interface for wireless transmission of a synchronization word. The clock master has a first timer. A first phase of the first clock signal is detected after the first timer has expired and the first phase is transmitted wirelessly to the at least one clock slave. The at least one first clock slave has a second timer. After the second timer has expired, a second phase of the second clock signal of the clock slave is recorded and compared with the wirelessly transmitted first phase. The deviation between the first and second phases is used as an input variable as a control unit in the at least one clock slave. The control unit adjusts an adjustable sample clock of the at least one clock slave in such a way that it corresponds to the first clock of the clock master.

Gemäß der Erfindung wird ein Drahtlos-Mikrofon- und/oder In-Ear-Monitoring System vorgesehen, welches eine drahtlose digitale Übertragung aufweist. Zur drahtlosen digitalen Übertragung eines Audiosignals muss das Audiosignal einer Digital/Analog-Wandlung unterzogen werden. Die Analog/Digital-Wandlung wird in festen Zeitabständen durchgeführt, basierend auf einem Sampletakt. Ein weiteres Gerät, welches das über die drahtlose digitale Übertragungsstrecke gesendete Audiosignal empfängt, sollte möglichst denselben Sampletakt benutzen. Wird der Sampletakt jedoch in dem weiteren Gerät selbst erzeugt, kann er auf Grund von Toleranzen der verwendeten elektronischen Bauteile und/oder Temperaturunterschiede von dem Sampletakt des sendenden Gerätes geringfügig abweichen. Eine sinnvolle Übertragung von raumbezogenen Mehrkanalsignalen (Stereo, Surroundsystemen [z.B. 5.1] kann dadurch nur eingeschränkt funktionieren; die akustische Raumortung wird dadurch sehr ungenau, manchmal unmöglich. Somit wird eine Synchronisation des Sampletaktes in Frequenz als auch in Phase benötigt.According to the invention, a wireless microphone and / or in-ear monitoring system is provided, which has a wireless digital transmission. For the wireless digital transmission of an audio signal, the audio signal must be subjected to a digital / analog conversion. The analog / digital conversion is carried out at fixed time intervals, based on a sample clock. Another device that receives the audio signal sent over the wireless digital transmission link should use the same sample clock if possible. However, if the sample clock is generated in the further device itself, it can be based on tolerances of the electronic components used and / or temperature differences differ slightly from the sampling clock of the sending device. A meaningful transmission of room-related multichannel signals (stereo, surround systems [eg 5.1]) can only function to a limited extent; acoustic room location is therefore very imprecise, sometimes impossible. Synchronization of the sample clock in frequency and in phase is therefore required.

Durch das erfindungsgemäße Drahtlos-Mikrofon- und/oder In-Ear-Monitoring-System kann eine drahtlose Wordclock-Synchronisation zur synchronen Analog/Digital- und Digital/Analog-Wandlung in drahtlosen Audiogeräten wie beispielsweise drahtlose Mikrofone und drahtlose In-Ear-Monitoring-Empfänger genutzt werden. Der Vorteil einer drahtlosen Wordclock-Synchronisation ist insbesondere bei einer Stereo- und Surroundtauglichen Mikrofonierung mit mehreren drahtlosen Mikrofonen und/oder drahtlosen In-Ear-Monitoring-Empfängern vorhanden. Ferner kann hierdurch eine Abtastratenumwandlung (sample rate conversion) vermieden werden, die sonst erforderlich ist, um mehrere ankommende Kanäle (z.B. von mehreren Mikrofonen) auf einem gemeinsamen Summenkanal auszugeben.The wireless microphone and / or in-ear monitoring system according to the invention enables wireless word clock synchronization for synchronous analog / digital and digital / analog conversion in wireless audio devices such as wireless microphones and wireless in-ear monitoring systems. Receiver can be used. The advantage of a wireless word clock synchronization is present in particular in the case of a microphone and stereo-compatible microphone with several wireless microphones and / or wireless in-ear monitoring receivers. This also avoids a sample rate conversion, which is otherwise necessary to output several incoming channels (e.g. from several microphones) on a common sum channel.

Weitere Ausgestaltungen der Erfindung sind Gegenstand der Unteransprüche.Further embodiments of the invention are the subject of the dependent claims.

Vorteile und Ausführungsbeispiele der Erfindung werden nachstehend unter Bezugnahme auf die Zeichnung näher erläutert.

Fig. 1
zeigt einen Zeitverlauf von Signalen, die bei einem Takt-Master und einem Takt-Slave gemäß einem ersten Ausführungsbeispiel zur Abtastzeitpunkt-Synchronisation verwendet werden,
Fig. 2
zeigt ein Blockschaltbild eines Master-Geräts und eines Slave-Geräts gemäß dem ersten Ausführungsbeispiel,
Fig. 3
zeigt eine schematische Darstellung eines zeitlichen Verlaufes einer Synchronisation in einem Drahtlos-Mikrofon- und/oder In-Ear-Monitoring System gemäß einem zweiten Ausführungsbeispiel, und
Fig. 4
zeigt ein Blockschaltbild einer Synchronisation in einem Drahtlos-Mikrofon- und/oder In-Ear-Monitoring System gemäß dem zweiten Ausführungsbeispiel.
Advantages and exemplary embodiments of the invention are explained in more detail below with reference to the drawing.
Fig. 1
FIG. 2 shows a time profile of signals that are used for a clock master and a clock slave according to a first exemplary embodiment for sampling time synchronization,
Fig. 2
1 shows a block diagram of a master device and a slave device according to the first exemplary embodiment,
Fig. 3
shows a schematic representation of a time course of a synchronization in a wireless microphone and / or in-ear monitoring system according to a second embodiment, and
Fig. 4
shows a block diagram of a synchronization in a wireless microphone and / or in-ear monitoring system according to the second embodiment.

Das zu bearbeitenden Problem beruht auf der Tatsache, dass bei einer digitalen Erfassung, Verarbeitung und Ausgabe von Audiodaten zu bestimmten Zeitpunkten Abtastwerte von den analogen Audiosignalen erzeugt werden. Dies kann z.B. mit einer Frequenz von 48 kHz erfolgen. Laufen die Geräte mit unterschiedlichen Abtastraten, so ist bei der Weitergabe der Audiodaten an ein anderes Gerät eine Sample-Rate-Konvertierung nötig, bei welcher Samplewerte zwischen den tatsächlichen Abtastzeitpunkten geschätzt werden müssen, was zu Artefakten führt, die sich als sogenanntes "Phasenrauschen" bemerkbar machen. Das gleiche Problem tritt auf, wenn mehrere Geräte zur digitalen Audioverarbeitung nominal zwar mit der gleichen Abtastrate arbeiten, jedoch die nominale Taktrate unabhängig voneinander jeweils selbst erzeugen. Bereits geringe Abweichungen der tatsächlichen Abtastraten führen dazu, dass über einen abgeschlossenen betrachteten Zeitraum eine unterschiedliche Anzahl von Abtastwerten zwischen den einzelnen Geräten erzeugt bzw. verarbeitet wird, sodass auch hier bei der Weitergabe an ein anderes Gerät eine Sample-Rate-Konvertierung erforderlich wird. Zur Abhilfe ist bei kabelgebundenen Geräten die oben beschriebene Wordclock-Synchronisation bekannt. Dabei werden die Abtastzeitpunkte, also die Zeitpunkte, zu denen jeweils ein digitaler Abtastwert zu einem analogen Audiosignal erzeugt, verarbeitet oder ausgegeben wird. zwischen allen entsprechend verbundenen Geräten synchronisiert. Die bekannte kabelgebundene Übertragung des Wordclock-Signals beruht darauf, dass über das Kabel eine verzögerungsfreie, jederzeit verfügbare Verbindung zwischen dem .Wordclock-Master und dem jeweiligen Wordclock-Slave besteht, über die das Signal, das zyklisch für jeden einzelnen Abtastzeitpunkt eine Anregung enthält, bereitgestellt wird. Das Slave-Gerät kann den eigenen Taktgenerator anhand dieses Signals somit fortlaufend an den vom Wordclock-Master kommenden Abtastungstakt anpassen.The problem to be dealt with is based on the fact that when digitally recording, processing and outputting audio data, sample values are generated at certain points in time generated by the analog audio signals. This can be done with a frequency of 48 kHz, for example. If the devices run at different sampling rates, a sample rate conversion is necessary when the audio data is passed on to another device, in which sample values between the actual sampling times have to be estimated, which leads to artifacts which are noticeable as so-called "phase noise" do. The same problem occurs if several devices for digital audio processing nominally work at the same sampling rate, but each independently generate the nominal clock rate independently of one another. Even small deviations in the actual sampling rates result in a different number of sampling values being generated or processed between the individual devices over a closed period of time, so that a sample rate conversion is also required here when the data are passed on to another device. To remedy this, the word clock synchronization described above is known for wired devices. The sampling times, ie the times at which a digital sample value is generated, processed or output for an analog audio signal. synchronized between all connected devices. The well-known wired transmission of the word clock signal is based on the fact that the cable provides a delay-free, always available connection between the .Wordclock master and the respective word clock slave, via which the signal, which contains an excitation cyclically for each individual sampling time, provided. The slave device can use this signal to continuously adapt its own clock generator to the sampling clock coming from the word clock master.

Eine solche verzögerungsfreie, jederzeit verfügbare Verbindung steht bei der drahtlosen Übertragung von digitalen Audiodaten jedoch nicht zur Verfügung, sodass eine Wordclock-Synchronisation der Audio-Abtastrate in der von kabelgebundenen Geräten her bekannten Weise hier nicht möglich ist. Für die drahtlose Übertragung von Daten ist stattdessen eine eigene Datensynchronisation zwischen Sender und Empfänger vorgesehen, die eine korrekte Übertragung der enthaltenen Bits ermöglicht. Diese Datensynchronisation ist jedoch unabhängig von der Audio-Abtastrate. Die Audiodaten werden deshalb häufig in Blöcken von mehreren Audio-Samples zusammengefasst, welche dann gemeinsam zu einem Zeitpunkt übertragen werden, der von dem drahtlosen Datenübertragungssystem festgelegt wird. Beispielsweise kann ein Zeitschlitzverfahren (Time Division Multiple Access, TDMA) für die drahtlose Datenübertragung verwendet werden, welches dann die Zeitpunkte festlegt, zu denen ein einzelnes Gerät Daten senden darf. Diese Zeitpunkte sind jedoch in keiner Weise mit den Audio-Abtast-Zeitpunkten synchronisiert.However, such a delay-free connection, which is available at all times, is not available for the wireless transmission of digital audio data, so that word clock synchronization of the audio sampling rate in the manner known from wired devices is not possible here. Instead, a separate data synchronization between transmitter and receiver is provided for the wireless transmission of data, which enables the bits contained to be transmitted correctly. However, this data synchronization is independent of the audio sampling rate. The audio data is therefore often combined in blocks of several audio samples, which are then transmitted together at a point in time which is determined by the wireless data transmission system. For example, a time division multiple access (TDMA) method can be used for wireless data transmission, which then defines the times at which a single device is allowed to send data. However, these instants are in no way synchronized with the audio sampling instants.

Die Erfindung bezieht sich auf ein Verfahren und zugehörige Geräte, die eine Wordclock-Synchronisation der Audio-Abtastzeitpunkte bei einer drahtlosen Übertragung von digitalen Audiodaten ermöglichen.The invention relates to a method and associated devices that enable a word clock synchronization of the audio sampling times in a wireless transmission of digital audio data.

Gemäß der Erfindung wird ein Drahtlos-Mikrofon- und/oder In-Ear-Monitoring-System vorgesehen. In dem System können beispielsweise Drahtlos-Mikrofone ein von ihnen erfasstes Audiosignal drahtlos an einen Empfänger übertragen. Zusätzlich oder alternativ dazu kann ein Audiosignal drahtlos an eine In-Ear-Monitoring-Einheit übertragen werden, damit dieses Audiosignal beispielsweise über einen In-Ear-Hörer an einen Träger des In-Ear-Monitoring-Systems ausgegeben werden kann.According to the invention, a wireless microphone and / or in-ear monitoring system is provided. In the system, for example, wireless microphones can wirelessly transmit an audio signal detected by them to a receiver. Additionally or alternatively, an audio signal can be transmitted wirelessly to an in-ear monitoring unit, so that this audio signal can be output, for example, via an in-ear earphone to a wearer of the in-ear monitoring system.

In dem Drahtlos-Mikrofon- und/oder In-Ear-Monitoring-System sind mindestens ein Taktmaster TM und mindestens ein Taktslave TS vorhanden. Der mindestens eine Taktslave muss sich dann auf den von dem Taktmaster vorgegebenen Takt, beispielsweise den Wordclock, sowohl hinsichtlich der Frequenz als auch hinsichtlich der Phase einstellen.At least one clock master TM and at least one clock slave TS are present in the wireless microphone and / or in-ear monitoring system. The at least one clock slave must then adjust to the clock specified by the clock master, for example the word clock, both in terms of frequency and in terms of phase.

Fig. 1 zeigt einen Zeitverlauf von Signalen, die bei einem Takt-Master und einem Takt-Slave gemäß einem ersten Ausführungsbeispiel zur Abtastzeitpunkt-Synchronisation verwendet werden. Oben in Fig. 1 ist der Master-Audio-Sample-Takt 100 des TaktMasters über der Zeit t dargestellt. Optional kann der Master-Audio-Sample-Takt 100 selbst bereits auf ein Wordclock-Signal eines externen Taktgebers abgeglichen sein. Für die folgende Betrachtung gilt der Master-Audio-Sample-Takt 100 aber als Master-Takt, auf den die Audio-Abtastzeitpunkte des/der Slave-Geräte angepasst werden sollen. Einer steigenden Flanke des Master-Audio-Sample-Takts 100 ist jeweils ein Audio-Abtastzeitpunkt zugeordnet, zu dem also jeweils ein Abtastwert eines analogen Audiosignals ermittelt, verarbeitet oder ausgegeben werden soll. In Fig. 1 sind die Master-Abtastzeitpunkte 101, 102 und 103 dargestellt. Fig. 1 shows a time course of signals that are used in a clock master and a clock slave according to a first embodiment for sampling time synchronization. Up in Fig. 1 the master audio sample clock 100 of the clock master is shown over time t. Optionally, the master audio sample clock 100 itself can already be matched to a word clock signal from an external clock generator. For the following consideration, the master audio sample clock 100 is the master clock to which the audio sampling times of the slave device (s) are to be adapted. A rising edge of the master audio sample clock 100 is assigned an audio sampling time, at which a sample value of an analog audio signal is to be determined, processed or output. In Fig. 1 the master sampling times 101, 102 and 103 are shown.

Das Master-Gerät enthält außerdem einen Master-Feintaktgeber, welcher einen Master-Phasenzähler antreibt. In Fig. 1 ist der Zählerstand 110 des Master-Phasenzählers über der Zeit t dargestellt. Zu jedem Abtastzeitpunkt, also jedes Mal, wenn der Master-Audio-Sample-Takt 100 eine positive Flanke aufweist, wird der Zählerstand 110 des Master-Phasenzählers durch einen Reset-Befehl ResM auf Null zurückgesetzt. Danach zählt der Master-Phasenzähler mit dem Takt des Master-Feintaktgebers auf jeden Tic des Master-Feintaktgebers in Einerschritten vorwärts. Der Zählerstand 110 gibt also mit der zeitlichen Auflösung des Master-Feintaktgebers an, wieviel Zeit seit dem letzten Master-Abtastzeitpunkt verstrichen ist. Der Master-Feintaktgeber hat dazu eine Taktfrequenz, die wesentlich größer ist als die Audio-Abtastfrequenz. Beispielsweise kann bei einer Audio-Abtastfrequenz von 48 kHz ein Master-Feintaktgeber mit einer Frequenz von 160 MHz verwendet werden, sodass der Master-Phasenzähler von einem Audio-Abtastzeitpunkt bis zum nächsten Audio-Abtastzeitpunkt (abhängig von der genauen gewünschten Audio-Abtastrate) etwa einen Wert von 3333 erreicht. Der Zählerstand 110 des Master-Phasenzählers stellt hierbei eine Phaseninformation über die seit dem letzten Audio-Sample vergangene Phase des Master-Audio-Sample-Takts 100 dar. Um eine für die Audio-Sample-Synchronisation geeignete zeitliche Auflösung der Phaseninformation zu erhalten, sollte der Takt des Master-Feintaktgebers so gewählt werden, dass in der Zeitspanne von einem Audio-Abtastzeitpunkt bis zu dem direkt folgenden Audio-Abtastzeitpunkt mindestens 500 Tics des Master-Feintaktgebers liegen, sodass der Zählerstand 110 des Master-Phasenzählers in jedem Audio-Abtastschritt mindestens bis 500 zählt.The master device also contains a master fine clock, which drives a master phase counter. In Fig. 1 the counter reading 110 of the master phase counter is shown over the time t. At each sampling instant, that is to say every time the master audio sample clock 100 has a positive edge, the counter reading 110 of the master phase counter is reset to zero by a reset command ResM. Thereafter, the master phase counter counts up with the clock of the master fine clock on each tic of the master fine clock. The counter reading 110 therefore indicates, with the temporal resolution of the master fine clock, how much time has elapsed since the last master sampling time. The master fine clock has a clock frequency that is much larger than the audio sampling frequency. For example, at an audio sampling frequency of 48 kHz, a master fine clock with a frequency of 160 MHz can be used, so that the master phase counter approximately from one audio sampling time to the next audio sampling time (depending on the exact audio sampling rate desired) reached a value of 3333. The counter reading 110 of the master phase counter here represents phase information about the phase of the master audio sample clock 100 that has passed since the last audio sample. In order to obtain a temporal resolution of the phase information that is suitable for the audio sample synchronization the clock of the master fine clock is selected so that there are at least 500 tics of the master fine clock in the time period from an audio sampling time to the immediately following audio sampling time, so that the counter reading 110 of the master phase counter is at least in each audio sampling step counts up to 500.

Im Slave-Gerät ist eine Audio-Sample-Taktung sowie eine Phasenerfassung entsprechend zu dem Master-Gerät aufgebaut. Unten in Fig. 1 ist der Slave-Audio-Sample-Takt 150 des Takt-Slaves über der Zeit t dargestellt. Einer steigenden Flanke des Slave-Audio-Sample-Takts 150 ist jeweils ein Slave-Audio-Abtastzeitpunkt 151, 152, 153 zugeordnet. Der Slave-Audio-Sample-Takt 150 ist einstellbar und es ist das Ziel der vorliegenden Erfindung, den Slave-Audio-Sample-Takt 150 so einzustellen, dass die Slave-Audio-Abtastzeitpunkte 151, 152, 153 den Master-Audio-Abtastzeitpunkten 101, 102, 103 entsprechen.In the slave device, an audio sample clock and a phase detection are set up corresponding to the master device. Down in Fig. 1 the slave audio sample clock 150 of the clock slave is shown over time t. A slave audio sampling instant 151, 152, 153 is assigned to a rising edge of the slave audio sample clock 150. The slave audio sample clock 150 is adjustable and it is the object of the present invention to set the slave audio sample clock 150 such that the slave audio sampling times 151, 152, 153 correspond to the master audio sampling times 101, 102, 103 correspond.

Das Slave-Gerät enthält einen Slave-Feintaktgeber, welcher einen Slave-Phasenzähler antreibt. In Fig. 1 ist der Zählerstand 160 des Slave-Phasenzählers über der Zeit t dargestellt. Im Slave-Gerät wird zu jedem Slave-Abtastzeitpunkt, also jedes Mal, wenn der Slave-Audio-Sample-Takt 150 eine positive Flanke aufweist, der Zählerstand 160 des Slave-Phasenzählers durch einen Reset-Befehl ResS auf Null zurückgesetzt. Danach zählt der Slave-Phasenzähler mit dem Takt des Slave-Feintaktgebers auf jeden Tic des Slave-Feintaktgebers in Einerschritten vorwärts. Der Zählerstand 160 gibt also mit der zeitlichen Auflösung des Slave-Feintaktgebers an, wieviel Zeit seit dem letzten Slave-Abtastzeitpunkt verstrichen ist. Der Slave-Feintaktgeber hat dazu vorzugsweise nominal die gleiche Taktfrequenz wie der Master-Feintaktgeber. Der Zählerstand 160 des Slave-Phasenzählers stellt hierbei eine Phaseninformation über die seit dem letzten Slave-Audio-Sample vergangene Phase des Slave-Audio-Sample-Takts 150 dar.The slave device contains a slave fine clock, which drives a slave phase counter. In Fig. 1 the counter reading 160 of the slave phase counter is shown over the time t. In the slave device, the counter state 160 of the slave phase counter is reset to zero by a reset command ResS at each slave sampling time, that is to say every time the slave audio sample clock 150 has a positive edge. The slave phase counter then counts up with the clock of the slave fine clock on each tic of the slave fine clock. The counter reading 160 thus indicates, with the temporal resolution of the slave fine clock, how much time has elapsed since the last slave sampling time. For this purpose, the slave fine clock generator preferably has nominally the same clock frequency as the master fine clock generator. The counter reading 160 of the slave phase counter here represents phase information about the phase of the slave audio sample clock 150 that has passed since the last slave audio sample.

In Fig. 1 ist ein Zustand dargestellt, in dem die Slave-Audio-Abtastzeitpunkte 151, 152, 153 den Master-Audio-Abtastzeitpunkten 101, 102, 103 noch nicht entsprechen.In Fig. 1 a state is shown in which the slave audio sampling times 151, 152, 153 do not yet correspond to the master audio sampling times 101, 102, 103.

Erfindungsgemäß erfolgt der Abgleich des Slave-Audio-Sample-Takts 150 auf den Master-Audio-Sample-Takt 100 mithilfe eines Synchronisationsereignisses, das einen Synchronisationszeitpunkt 130 festlegt.According to the invention, the slave audio sample clock 150 is compared to the master audio sample clock 100 with the aid of a synchronization event that defines a synchronization time 130.

Vorzugsweise kann das Synchronisationsereignis, das den Synchronisationszeitpunkt 130 festlegt, aus der Datensynchronisation zwischen einem Sender und einem Empfänger gewonnen werden. Wie bereits erläutert, ist für die drahtlose Übertragung von Daten zwischen einem Sender und einem Empfänger eine eigene Datensynchronisation vorgesehen, die eine korrekte Übertragung der enthaltenen Bits ermöglicht, die jedoch unabhängig von der Audio-Abtastrate ist. Auf jeden Fall lassen sich bei der drahtlosen Datenübertragung Zeitpunkte angeben, zu denen das jeweils verwendete Daten-Übertragungsprotokoll eine feste zeitliche Beziehung zwischen dem Master- und dem Slave-Gerät herstellt. Dies kann beispielsweise ein Zeitschlitz im Rahmen eines TDMA-Verfahrens sein, in dem ein Steuer-Code übertragen wird.The synchronization event, which defines the synchronization time 130, can preferably be obtained from the data synchronization between a transmitter and a receiver. As already explained, a separate data synchronization is provided for the wireless transmission of data between a transmitter and a receiver, which enables the bits contained to be transmitted correctly, but which is independent of the audio sampling rate. In any case, times can be specified for wireless data transmission at which the data transmission protocol used in each case establishes a fixed temporal relationship between the master and the slave device. This can be, for example, a time slot in the context of a TDMA method in which a control code is transmitted.

Erfindungsgemäß wird ein solches Ereignis, das eine feste zeitliche Beziehung zwischen dem Master- und dem Slave-Gerät erzeugt, verwendet, um das Master-Gerät und das Slave-Gerät dazu zu veranlassen, gleichzeitig den aktuellen Zählerstand 110 des Master-Phasenzählers und den aktuellen Zählerstand 160 des Slave-Phasenzählers zu erfassen. In diesem Zusammenhang bedeutet "gleichzeitig", dass der zeitliche Versatz der Erfassung des Zählerwerts zwischen Master- und Slave-Gerät maximal der Dauer von einem Tic des Master-Feintaktgebers und somit auch des Slave-Feintaktgebers entspricht. Das Master-Gerät erfasst zum Zeitpunkt 130 durch Auslesen des Zählerstands 110 des Master-Phasenzählers die Master-Phase 120 und das Slave-Gerät erfasst zum Zeitpunkt 130 durch Auslesen des Zählerstands 160 des Slave-Phasenzählers die Slave-Phase 170.According to the invention, such an event, which creates a fixed temporal relationship between the master and the slave device, is used to cause the master device and the slave device to simultaneously display the current counter reading 110 of the master phase counter and the current one Counter reading 160 of the slave phase counter. In this context, "simultaneously" means that the time offset of the acquisition of the counter value between the master and slave device corresponds at most to the duration of one tic of the master fine clock and thus also of the slave fine clock. The master device detects the master phase 120 at time 130 by reading out the counter reading 110 of the master phase counter and the slave device detects the slave phase 170 at time 130 by reading out the counter reading 160 of the slave phase counter.

Neben der Erzeugung des Synchronisationszeitpunktes 130 auf Basis der Datensynchronisation kann alternativ auch ein anderes Ereignis zur Festlegung des Synchronisationszeitpunktes 130 herangezogen werden. Wichtig ist nur, dass zu diesem Zeitpunkt eine feste zeitliche Beziehung zwischen dem Master- und dem Slave-Gerät gewährleistet ist, auf der sich eine gleichzeitige Erfassung der Master-Phase 120 und der Slave-Phase 170 (gemäß der erläuterten Definition von "gleichzeitig") durchführen lässt.In addition to the generation of the synchronization time 130 on the basis of the data synchronization, another event can alternatively also be used to determine the synchronization time 130. It is only important that a fixed temporal relationship between the master and the slave device is guaranteed at this point in time, on which a simultaneous detection of the master phase 120 and the slave phase 170 (according to the explained definition of "simultaneously" ) can be carried out.

Nach der Erfassung der Master-Phase 120 und der Slave-Phase 170 wird der erfasste Wert der Master-Phase 120 drahtlos von dem Master-Gerät an das Slave-Gerät übertragen. Es spielt dabei keine Rolle, ob diese Übertragung in einer bestimmten zeitlichen Beziehung zu dem Synchronisationszeitpunkt 130 steht.After the detection of the master phase 120 and the slave phase 170, the detected value of the master phase 120 is transmitted wirelessly from the master device to the slave device. It does not matter whether this transmission has a specific temporal relationship to the synchronization time 130.

Erfindungsgemäß empfängt das Slave-Gerät den gemessenen Wert der Master-Phase 120 und vergleicht ihn mit dem zum gleichen Zeitpunkt 130 gemessenen Wert der Slave-Phase 170. Das Ergebnis dieses Vergleichs ist die Regelabweichung der Phase des Slave-Audio-Sample-Takts 150 gegenüber der erwünschten Phase des Master-Audio-Sample-Takts 100. Entsprechend wird dieses Vergleichsergebnis als Phasenabweichung einem Regler in einer "Phase-Locked Loop" (PLL) zugeführt. Der Regler kann als Stellgröße die Taktrate des Slave-Audio-Sample-Takts 150 beeinflussen. In einer Phase-Locked Loop wird diese Taktrate sodann so beeinflusst, dass nach mehrfacher Ausführung des Regelkreises die Slave-Phase 170 der Masterphase 120 entspricht. Bei der Regelung wird eine zyklische Wiederholung der gesamten Messung und Verarbeitung der Master-Phase (120) und der Slave-Phase (170) vorgesehen. Die Angleichung der Taktrate des Slave-Audio-Sample-Takts 150 an die Taktrate des Master-Audio-Sample-Takts 100 ergibt sich bei der Regelung der Phasenabweichung als Zielgröße zwangsläufig als Nebenergebnis.According to the invention, the slave device receives the measured value of the master phase 120 and compares it with the value of the slave phase 170 measured at the same time 130. The result of this comparison is the control deviation of the phase of the slave audio sample clock 150 the desired phase of the master audio sample clock 100. Accordingly, this comparison result is fed as a phase deviation to a controller in a "phase-locked loop" (PLL). As a manipulated variable, the controller can influence the clock rate of the slave audio sample clock 150. In a phase-locked loop, this clock rate is then influenced in such a way that after multiple execution of the control loop, the slave phase 170 corresponds to the master phase 120. The regulation provides for a cyclical repetition of the entire measurement and processing of the master phase (120) and the slave phase (170). The adjustment of the clock rate of the slave audio sample clock 150 to the clock rate of the master audio sample clock 100 results inevitably as a secondary result when regulating the phase deviation as a target variable.

Als wichtiger Unterschied zu einer kabelgebundenen Wordclock-Synchronisation ist hervorzuheben, dass es nicht notwendig ist, innerhalb jedes einzelnen Abtastschrittes des Master-Audio-Sample-Takts 100 ein Synchronisationsereignis vorzusehen, das einen Synchronisationszeitpunkt 130 festlegt. Vielmehr genügt es, wenn gelegentlich ein solches Synchronisationsereignis auftritt. Beispielsweise können ca. 50 Abtastschrittes des Master-Audio-Sample-Takts 100 ablaufen, bevor ein neues Synchronisationsereignis stattfindet, das einen neuen Synchronisationszeitpunkt 130 festlegt. Dies kann beispielsweise mit der oben beschriebenen drahtlosen Übertragung von Audiodaten in Blöcken in Zusammenhang stehen. Es ist auch nicht notwendig, dass die die Synchronisationszeitpunkte 130 äquidistant zueinander liegen. Für die Phase-Locked Loop ist lediglich eine wiederkehrende Ausführung der gleichzeitigen Erfassung von der Master-Phase 120 und der Slave-Phase 170 und der anschließenden Verarbeitung in der PLL erforderlich.As an important difference to a wired word clock synchronization, it should be emphasized that it is not necessary to provide a synchronization event within each individual sampling step of the master audio sample clock 100 that specifies a synchronization time 130. Rather, it is sufficient if such a synchronization event occasionally occurs. For example, approximately 50 sampling steps of the master audio sample clock 100 can take place before a new synchronization event takes place, which defines a new synchronization time 130. This can be related, for example, to the wireless transmission of audio data in blocks described above. It is also not necessary for the synchronization times 130 to be equidistant from one another. For the phase-locked loop, all that is required is a recurring execution of the simultaneous acquisition of master phase 120 and slave phase 170 and the subsequent processing in the PLL.

Ein besonderer Vorteil des beschriebenen erfindungsgemäßen Verfahrens zum Abgleich des Slave-Audio-Sample-Takts 150 auf den Master-Audio-Sample-Takt 100 besteht in der nur kurzzeitigen Nutzung des Master-Feintaktgebers und des Slave-Feintaktgebers. Auch die Feintaktgeber erzeugen jeweils einen eigenen Takt, und da es sich um getrennte Bauteile - einmal im Master-Gerät und einmal im Slave-Gerät - handelt, laufen sie nicht mit exakt der gleichen Geschwindigkeit. Dadurch, dass der Zählerstand 110 des Master-Phasenzählers und der Zählerstand 160 des Slave-Phasenzählers bei jedem Audio-Abtastzeitpunkt auf Null zurückgesetzt werden, ist die Zeitspanne, während der eine voneinander abweichende Geschwindigkeit der beiden Feintaktgeber eine Auswirkung auf das Phasen-Messergebnis hat, so kurz, dass sich mit den allgemein verfügbaren Taktgebern eine Abweichung von weniger als einem Tic der Feintaktgeber zwischen der gemessenen Master-Phase 120 und der gemessenen Slave-Phase 170 ergibt. Gemäß dem oben genannten Beispiel kann eine Audio-Abtastfrequenz von 48 kHz und eine Feintaktgeber-Frequenz von 160 MHz verwendet werden, sodass die Phasenzähler von einem Audio-Abtastzeitpunkt bis zum nächsten Audio-Abtastzeitpunkt etwa einen Wert von 3333 erreichen. Würde die Geschwindigkeit der beiden Feintaktgeber so weit voneinander abweichen, dass innerhalb dieser Zeitspanne bereits ein Tic Unterschied zwischen den beiden Feintaktgebern auftritt, so entspräche dies einer Taktgenauigkeit von 300 ppm (parts per million), also einem Fehler von 300 Schritten während einer Dauer von 1 Million Tics. Bei Standard-Taktgebern ist derzeit eine Genauigkeit von ca. 20 ppm üblich und auch beispielsweise 2,5 ppm erhältlich. Durch die erfindungsgemäße kurzzeitige Nutzung der Feintaktgeber werden die Probleme aus getrennt laufenden Feintaktgebern also vorteilhaft umgangen. Damit bietet das erfindungsgemäße Verfahren einen Vorteil gegenüber einem sonst möglichen Alternativansatz, bei welchem eine Gesamtzeitspanne zwischen den Synchronisierungszeitpunkten 130 mithilfe der Feintaktgeber ermittelt und gemeinsam mit der Menge der in dieser Zeitspanne angefallenen Abtastzeitpunkte übertragen wird.A particular advantage of the described method according to the invention for matching the slave audio sample clock 150 to the master audio sample clock 100 is that the master fine clock and the slave fine clock are used only for a short time. The fine clock generators each generate their own clock, and since they are separate Components - once in the master device and once in the slave device - do not run at exactly the same speed. Because the counter reading 110 of the master phase counter and the counter reading 160 of the slave phase counter are reset to zero at each audio sampling time, the time period during which a different speed of the two fine clocks has an effect on the phase measurement result, so short that there is a deviation of less than one tic of the fine clock between the measured master phase 120 and the measured slave phase 170 with the generally available clocks. According to the above example, an audio sampling frequency of 48 kHz and a fine clock frequency of 160 MHz can be used, so that the phase counters reach a value of 3333 from one audio sampling time to the next audio sampling time. If the speed of the two fine clocks differ so much that a tic difference already occurs between the two fine clocks within this period, this would correspond to a clock accuracy of 300 ppm (parts per million), i.e. an error of 300 steps over a period of 1 Million tics. With standard clocks, an accuracy of approx. 20 ppm is currently common and 2.5 ppm is also available, for example. The short-term use of the fine clocks according to the invention advantageously avoids the problems from separately running fine clocks. The method according to the invention thus offers an advantage over an alternative approach that would otherwise be possible, in which an overall time period between the synchronization times 130 is determined with the aid of the fine clock and transmitted together with the amount of the sampling times that occurred during this time period.

Fig. 2 zeigt ein Blockschaltbild eines Master-Geräts TM und eines Slave-Geräts TS gemäß dem ersten Ausführungsbeispiel. Das Master-Gerät TM enthält einen Master-Audio-Sample-Takt-Geber ASPGM zur Erzeugung des Master-Audio-Sample-Takts 100. Optional kann das Master-Gerät TM selbst einen Wordclock-Eingang WRDCLK und eine Master-Wordclock-Synchronisationseinheit WSUM aufweisen über die der Master-Audio-Sample-Takt 100 selbst bereits auf ein Wordclock-Signal eines externen Taktgebers abgeglichen werden kann. Der Master-Audio-Sample-Takt 100 gibt den Takt für eine digitale Master-Audio-Input-Output Einheit AIOM vor. Die Master-Audio-Input-Output Einheit AIOM dient als Schnittstelle des Master-Geräts nach außen und kann zum Empfangen und Senden von digitale Audiodaten dienen. Fig. 2 shows a block diagram of a master device TM and a slave device TS according to the first embodiment. The master device TM contains a master audio sample clock generator ASPGM for generating the master audio sample clock 100. Optionally, the master device TM itself can have a word clock input WRDCLK and a master word clock synchronization unit WSUM have the master audio sample clock 100 itself can be adjusted to a word clock signal from an external clock. The master audio sample clock 100 specifies the clock for a digital master audio input / output unit AIOM. The AIOM master audio input / output unit serves as an external interface for the master device and can be used to receive and send digital audio data.

Das Master-Gerät TM enthält außerdem einen Master-Feintaktgeber FPGM, welcher einen Master-Phasenzähler PCM antreibt. Der Master-Phasenzähler PCM erzeugt fortlaufend den Zählerstand 110. Zu jedem Abtastzeitpunkt, also jedes Mal, wenn der Master-Audio-Sample-Takt 100 eine positive Flanke aufweist, wird der Zählerstand 110 des Master-Phasenzählers PCM durch einen Reset-Befehl ResM auf Null zurückgesetzt. Danach zählt der Master-Phasenzähler PCM mit dem Takt des Master-Feintaktgebers FPGM auf jeden Tic des Master-Feintaktgebers in Einerschritten vorwärts. Der Zählerstand 110 gibt also mit der zeitlichen Auflösung des Master-Feintaktgebers an, wieviel Zeit seit dem letzten Master-Abtastzeitpunkt verstrichen ist.The master device TM also contains a master fine clock FPGM, which drives a master phase counter PCM. The master phase counter PCM generates continuously the counter reading 110. At every sampling instant, that is to say every time the master audio sample clock 100 has a positive edge, the counter reading 110 of the master phase counter PCM is reset to zero by a reset command ResM. Thereafter, the master phase counter PCM counts up with the clock of the master fine clock FPGM on each tic of the master fine clock. The counter reading 110 therefore indicates, with the temporal resolution of the master fine clock, how much time has elapsed since the last master sampling time.

Im Slave-Gerät TS ist eine Audio-Sample-Taktung sowie eine Phasenerfassung entsprechend zu dem Master-Gerät TM aufgebaut. Das Slave-Gerät TS enthält einen Slave-Audio-Sample-Takt-Geber ASPGS zur Erzeugung des Slave-Audio-Sample-Takts 150. Der Slave-Audio-Sample-Takt-Geber ASPGS ist so ausgestaltet, dass seine Taktrate in gewissen Grenzen einstellbar ist. Der Slave-Audio-Sample-Takt 150 gibt den Takt für eine digitale Slave-Audio-Input-Output Einheit AIOS vor. Die Slave-Audio-Input-Output Einheit AIOS dient als Schnittstelle des Slave-Geräts nach außen und kann zum Empfangen und Senden von digitalen Audiodaten dienen. Sofern das Slave-Gerät TS als Mikrofon ausgestaltet ist, kann ein A/D-Wandler mit dem Slave-Audio-Input-Output Einheit AIOS verbunden werden und ein digitales Audiosignal als Eingang zur Verfügung stellen. Sofern das Slave-Gerät TS als In-Ear-Monitoring System ausgestaltet ist, kann ein D/A-Wandler mit dem Slave-Audio-Input-Output Einheit AIOS verbunden werden und ein digitales Audiosignal als Ausgang ausgegeben werden.In the slave device TS, an audio sample clocking and a phase detection are set up corresponding to the master device TM. The slave device TS contains a slave audio sample clock generator ASPGS for generating the slave audio sample clock 150. The slave audio sample clock generator ASPGS is designed in such a way that its clock rate is within certain limits is adjustable. The slave audio sample clock 150 specifies the clock for a digital slave audio input / output unit AIOS. The slave audio input-output unit AIOS serves as an interface of the slave device to the outside and can be used to receive and send digital audio data. If the slave device TS is designed as a microphone, an A / D converter can be connected to the slave audio input / output unit AIOS and provide a digital audio signal as an input. If the slave device TS is designed as an in-ear monitoring system, a D / A converter can be connected to the slave audio input / output unit AIOS and a digital audio signal can be output as an output.

Das Slave-Gerät TS enthält außerdem einen Slave-Feintaktgeber FPGS, welcher einen Slave-Phasenzähler PCS antreibt. Der Slave-Phasenzähler PCS erzeugt fortlaufend den Zählerstand 160. Zu jedem Abtastzeitpunkt, also jedes Mal, wenn der Slave-Audio-Sample-Takt 150 eine positive Flanke aufweist, wird der Zählerstand 160 des Slave-Phasenzählers PCS durch einen Reset-Befehl ResS auf Null zurückgesetzt. Danach zählt der Slave-Phasenzähler PCS mit dem Takt des Slave-Feintaktgebers FPGS auf jeden Tic des Slave-Feintaktgebers in Einerschritten vorwärts. Der Zählerstand 160 gibt also mit der zeitlichen Auflösung des Slave-Feintaktgebers an, wieviel Zeit seit dem letzten Slave-Abtastzeitpunkt verstrichen ist.The slave device TS also contains a slave fine clock FPGS, which drives a slave phase counter PCS. The slave phase counter PCS continuously generates the counter reading 160. At every sampling instant, that is to say every time the slave audio sample clock 150 has a positive edge, the counter reading 160 of the slave phase counter PCS is opened by a reset command ResS Zero reset. Thereafter, the slave phase counter PCS counts up with the clock of the slave fine clock FPGS on each tic of the slave fine clock. The counter reading 160 thus indicates, with the temporal resolution of the slave fine clock, how much time has elapsed since the last slave sampling time.

Erfindungsgemäß erfolgt der Abgleich des Slave-Audio-Sample-Takts 150 auf den Master-Audio-Sample-Takt 100 mithilfe eines Synchronisationsereignisses, das einen Synchronisationszeitpunkt 130 festlegt. Ein solches Synchronisationsereignis kann von einem Phasen-Mess-Trigger PMT erzeugt werden. Vorzugsweise kann der Phasen-Mess-Trigger PMT das Synchronisationsereignis aus der Datensynchronisation zwischen einem Sender und einem Empfänger, also insbesondere aus der drahtlosen Übertragung zwischen dem Master-Gerät TM und dem Slave-Gerät TS gewinnen. Über einen Phasen-Mess-Trigger-Transmitter PMTT kann das Synchronisationsereignis drahtlos an einen Mess-Trigger-Receiver MTR im Slave-Gerät TS übertragen werden, wobei eine feste zeitliche Beziehung zwischen dem Master- und dem Slave-Gerät erzeugt wird. Optional kann das Master-Gerät TM einen Timer T1 enthalten, der von dem Phasen-Mess-Trigger PMT gestartet wird. Der Timer T1 kann von dem Master-Feintaktgeber FPGM getaktet sein. Entsprechend kann das Slave-Gerät TS einen Timer T2 enthalten, der gestartet wird, wenn der Mess-Trigger-Receiver MTR das Synchronisationsereignis empfängt. Der Timer T2 kann von dem Slave-Feintaktgeber FPGS getaktet sein. Die beiden Timer T1 und T2 können dazu dienen, die Übertragungszeit, die zur Übertragung des Synchronisationsereignisses erforderlich ist, zu berücksichtigen. Die beiden Timer T1 und T2 werden dann so angesteuert, dass sie beide gleichzeitig ablaufen und damit den Synchronisationszeitpunkt 130 gleichzeitig im Master-Gerät TM und im Slave-Gerät TS erzeugen. In diesem Zusammenhang bedeutet "gleichzeitig", dass der zeitliche Versatz der Erfassung des Phasen-Zählerwerts zwischen Master- und Slave-Gerät maximal der Dauer von einem Tic des Master-Feintaktgebers FPGM und somit auch des Slave-Feintaktgebers FPGS entspricht.According to the invention, the slave audio sample clock 150 is compared to the master audio sample clock 100 with the aid of a synchronization event that defines a synchronization time 130. Such a synchronization event can be generated by a phase measurement trigger PMT. Preferably, the phase measurement trigger PMT can synchronize the synchronization event from the data synchronization gain a transmitter and a receiver, in particular from the wireless transmission between the master device TM and the slave device TS. The synchronization event can be transmitted wirelessly to a measurement trigger receiver MTR in the slave device TS via a phase measurement trigger transmitter PMTT, a fixed temporal relationship being generated between the master and the slave device. Optionally, the master device TM can contain a timer T1, which is started by the phase measurement trigger PMT. The timer T1 can be clocked by the master fine clock FPGM. Correspondingly, the slave device TS can contain a timer T2, which is started when the measurement trigger receiver MTR receives the synchronization event. The timer T2 can be clocked by the slave fine clock FPGS. The two timers T1 and T2 can serve to take into account the transmission time that is required for the transmission of the synchronization event. The two timers T1 and T2 are then controlled so that they both run simultaneously and thus generate the synchronization time 130 simultaneously in the master device TM and in the slave device TS. In this context, "simultaneously" means that the time offset of the acquisition of the phase counter value between the master and slave device corresponds at most to the duration of one tic of the master fine clock FPGM and thus also of the slave fine clock FPGS.

Das Master-Gerät TM enthält außerdem einen Master-Phasenwert-Aufnehmer PVM, der zum Synchronisationszeitpunkt 130 den aktuellen Zählerstand 110 des Master-Phasenzählers PCM ausliest und als Master-Phase 120 speichert. Das Slave-Gerät TS enthält entsprechend einen Slave-Phasenwert-Aufnehmer PVS, der zum Synchronisationszeitpunkt 130 den aktuellen Zählerstand 160 des Slave-Phasenzählers PCS ausliest und als Slave-Phase 170 speichert.The master device TM also contains a master phase value transducer PVM, which reads out the current counter reading 110 of the master phase counter PCM at the synchronization time 130 and stores it as the master phase 120. The slave device TS accordingly contains a slave phase value pickup PVS, which reads out the current counter reading 160 of the slave phase counter PCS at synchronization time 130 and stores it as a slave phase 170.

Nach der Erfassung der Master-Phase 120 und der Slave-Phase 170 wird der erfasste Wert der Master-Phase 120 drahtlos von dem Master-Gerät TM an das Slave-Gerät TS übertragen. Das Master-Gerät TM enthält dazu einen Phasen-Transmitter PT und das Slave-Gerät einen Phasen-Receiver PR. Es spielt dabei keine Rolle, ob diese Übertragung in einer bestimmten zeitlichen Beziehung zu dem Synchronisationszeitpunkt 130 steht.After the detection of the master phase 120 and the slave phase 170, the detected value of the master phase 120 is transmitted wirelessly from the master device TM to the slave device TS. For this purpose, the master device TM contains a phase transmitter PT and the slave device a phase receiver PR. It does not matter whether this transmission has a specific temporal relationship to the synchronization time 130.

Erfindungsgemäß empfängt das Slave-Gerät TS den gemessenen Wert der Master-Phase 120 und vergleicht ihn in einem Vergleicher C mit dem zum gleichen Zeitpunkt 130 gemessenen Wert der Slave-Phase 170. Das Ergebnis dieses Vergleichs ist die Regelabweichung der Phase des Slave-Audio-Sample-Takts 150 gegenüber der erwünschten Phase des Master-Audio-Sample-Takts 100. Entsprechend wird dieses Vergleichsergebnis als Phasenabweichung einem Regler R in einer "Phase-Locked Loop" (PLL) zugeführt. Der Regler R kann als Stellgröße die Taktrate des Slave-Audio-Sample-Takt-Geber ASPGS und damit des Slave-Audio-Sample-Takts 150 beeinflussen. In einer Phase-Locked Loop wird diese Taktrate sodann so beeinflusst, dass nach mehrfacher Ausführung des Regelkreises die Slave-Phase 170 der Masterphase 120 entspricht. Die Angleichung der Taktrate des Slave-Audio-Sample-Takts 150 an die Taktrate des Master-Audio-Sample-Takts 100 ergibt sich dabei zwangsläufig als Nebenergebnis.According to the invention, the slave device TS receives the measured value of the master phase 120 and compares it in a comparator C with the value of the slave phase 170 measured at the same time 130. The result of this comparison is the control deviation of the phase of the slave audio Sample clocks 150 versus the desired Phase of the master audio sample clock 100. Accordingly, this comparison result is fed as a phase deviation to a controller R in a "phase-locked loop" (PLL). The controller R can influence the clock rate of the slave audio sample clock encoder ASPGS and thus of the slave audio sample clock 150 as a manipulated variable. In a phase-locked loop, this clock rate is then influenced in such a way that after multiple execution of the control loop, the slave phase 170 corresponds to the master phase 120. The adjustment of the clock rate of the slave audio sample clock 150 to the clock rate of the master audio sample clock 100 inevitably arises as a secondary result.

Das Master-Gerät TM enthält außerdem einen Master-Audio-Transmitter-Receiver ATRM, über den es drahtlos digitale Audiodaten senden und/oder empfangen kann, die dem Master-Audio-Sample-Takt 100 des Master-Audio-Sample-Takt-Gebers ASPGM zugeordnet sind, und das Slave-Gerät TS enthält außerdem einen Slave-Audio-Transmitter-Receiver ATRS, über den es drahtlos digitale Audiodaten senden und/oder empfangen kann, die dem Slave-Audio-Sample-Takt 150 des Slave-Audio-Sample-Takt-Gebers ASPGS zugeordnet sind. Der Master-Audio-Transmitter-Receiver ATRM ist mit der Master-Audio-Input-Output Einheit AIOM verbunden und der Slave-Audio-Transmitter-Receiver ATRS ist mit der Slave-Audio-Input-Output Einheit AIOS verbunden.The master device TM also contains a master audio transmitter receiver ATRM, via which it can wirelessly send and / or receive digital audio data, the master audio sample clock 100 of the master audio sample clock transmitter ASPGM are assigned, and the slave device TS also contains a slave audio transmitter receiver ATRS, via which it can wirelessly send and / or receive digital audio data that corresponds to the slave audio sample clock 150 of the slave audio Sample clock encoder ASPGS are assigned. The master audio transmitter receiver ATRM is connected to the master audio input output unit AIOM and the slave audio transmitter receiver ATRS is connected to the slave audio input output unit AIOS.

Optional können der Master-Audio-Transmitter-Receiver ATRM, der Phasen-Transmitter PT und der Phasen-Mess-Trigger-Transmitter PMTT in einer gemeinsamen drahtlosen Übertragungseinheit TRUM in dem Master-Gerät TM zusammengefasst sein. Entsprechend können optional der Slave-Audio-Transmitter-Receiver ATRS, der Phasen-Receiver PR und der Mess-Trigger-Receiver MTR in einer gemeinsamen drahtlosen Übertragungseinheit TRUS in dem Slaver-Gerät TS zusammengefasst sein.Optionally, the master audio transmitter receiver ATRM, the phase transmitter PT and the phase measurement trigger transmitter PMTT can be combined in a common wireless transmission unit TRUM in the master device TM. Accordingly, the slave audio transmitter receiver ATRS, the phase receiver PR and the measurement trigger receiver MTR can optionally be combined in a common wireless transmission unit TRUS in the slave device TS.

Fig. 3 zeigt eine schematische Darstellung eines zeitlichen Verlaufes einer Wordclock-Synchronisation in einem Drahtlos-Mikrofon- und/oder In-Ear-Monitoring System gemäß einem zweiten Ausführungsbeispiel. Das zweite Ausführungsbeispiel gemäß Fig. 3 und 4 entspricht in weiten Teilen dem ersten Ausführungsbeispiel. Allerdings wird in dem zweiten Ausführungsbeispiel stärker darauf eingegangen, wie die Erzeugung der Audio-Sample-Takte erfolgt und eine mögliche Berücksichtigung einer bekannten Zeitspanne zur Übertragung eines Synchronisationsereignisses näher erläutert. Ein Taktmaster TM kann über eine bidirektionale drahtlose Übertragungsstrecke vorzugsweise in regelmäßigen Abständen ein Synchronisationswort S übertragen. Der Taktmaster TM kann einen Taktgenerator (beispielsweise 49,152 MHz) aufweisen. Der Ausgang des Taktgenerators kann mit einem Taktteiler (beispielsweise 1024) auf einen Sampletakt von beispielsweise 48 kHz geteilt werden. Fig. 3 shows a schematic representation of a time course of a word clock synchronization in a wireless microphone and / or in-ear monitoring system according to a second embodiment. The second embodiment according to 3 and 4 largely corresponds to the first embodiment. However, the second exemplary embodiment deals more closely with how the audio sample clocks are generated and a possible consideration of a known time period for transmitting a synchronization event is explained in more detail. A clock master TM can transmit a synchronization word S over a bidirectional wireless transmission link, preferably at regular intervals. The clock master TM can have a clock generator (for example 49.152 MHz). The output of the clock generator can be divided with a clock divider (for example 1024) to a sample clock of for example 48 kHz.

Der in Fig. 3 dargestellte zeitliche Ablauf zeigt die Verhältnisse im eingeschwungenen Zustand, d. h., die Synchronisation hat bereits stattgefunden, so dass der Sampletakt des Slaves sich bereits frequenz- und phasenmäßig auf den Sampletakt des Masters abgestimmt hat. Der Vorgang der Synchronisation wird anhand des eingeschwungenen Zustandes beschrieben.The in Fig. 3 The temporal sequence shown shows the conditions in the steady state, ie the synchronization has already taken place, so that the sample clock of the slave has already been matched in frequency and phase to the sample clock of the master. The synchronization process is described based on the steady state.

Der Taktmaster TM startet einen ersten Timer T1 beim Senden des Synchronisationswortes S. Nach Ablauf des ersten Timers T wird die Phase P1 des Sampletaktes S1 gemessen. Die gemessene Phase P1 wird an einen oder mehrere Taktslaves TS (z. B. über einen Broadcast Kanal BC) übertragen. Der Taktslave TS empfängt das Synchronisationswort S und startet einen zweiten Timer T2. Nach Ablauf des zweiten Timers T2 wird die Phase P2 des Sampletaktes S2 des Taktslaves TS gemessen. Wenn der Taktslave TS die erste Phase P1 über den Broadcast BC empfängt, dann wird die erste und zweite Phase P1, P2 in einer Vergleichseinheit C verglichen und die durch den Vergleich ermittelte Abweichung stellt die Regelabweichung des einstellbaren Taktgenerators des Taktslaves TS dar. Dieser Vorgang kann optional bei Übertragung jedes Synchronisationswortes S durchgeführt werden. Alternativ dazu kann dies auch nach einer Übertragung einer Anzahl von Synchronisationsworten S durchgeführt werden.The clock master TM starts a first timer T1 when the synchronization word S is sent. After the first timer T has expired, the phase P1 of the sample clock S1 is measured. The measured phase P1 is transmitted to one or more clock slaves TS (e.g. via a broadcast channel BC). The clock slave TS receives the synchronization word S and starts a second timer T2. After the second timer T2 has elapsed, the phase P2 of the sample clock S2 of the clock slave TS is measured. When the clock slave TS receives the first phase P1 via the broadcast BC, the first and second phases P1, P2 are compared in a comparison unit C and the deviation determined by the comparison represents the control deviation of the adjustable clock generator of the clock slave TS. This process can can optionally be carried out when each synchronization word S is transmitted. Alternatively, this can also be carried out after a number of synchronization words S have been transmitted.

Gemäß einem Aspekt der Erfindung kann der Takt S1 im Master vorgesehen sein und der Takt S2 kann im Slave vorgesehen sein. Der Timer T2 kann im Slave ablaufen.According to one aspect of the invention, clock S1 can be provided in the master and clock S2 can be provided in the slave. The timer T2 can run in the slave.

Das Senden des Synchronisationswortes S (Start des Timers 1) bis zur Verarbeitung dieser Information im Slave und dem Start des Timers 2 benötigt eine gewisse Zeit, die in Fig. 3 symbolisch als Breite des Blocks S dargestellt ist. Sie ist in der Praxis sehr kurz. Das Einstellen der Timer T1 und T2 in der Art, dass der Ablauf beider Timer zum selben Zeitpunkt erfolgt, kann nur mit einer begrenzten Genauigkeit erfolgen, da wegen unterschiedlicher Takte im Master und in Slave diese Timer gewissen geringfügigen Schwankungen unterliegen. Ebenso weist die als Breite des Blocks S dargestellte Zeit geringfügige Schwankungen auf. Alle diese drei Veränderungen sind jedoch in der Praxis außerordentlich gering, sodass sie gegenüber den Taktschwankungen für die Steuerung der Analog-/Digitalwandler im Master/Slave keinerlei Bedeutung haben. Die Verschiebung der Sampletakte ist um Größenordnungen stärker, sodass die geringfügigen Zeitschwankungen von S, T1 und T2 in der Praxis keine Rolle spielen.The sending of the synchronization word S (start of the timer 1) until this information is processed in the slave and the start of the timer 2 takes a certain amount of time Fig. 3 is symbolically represented as the width of the block S. In practice, it is very short. The setting of timers T1 and T2 in such a way that both timers run at the same time can only be done with a limited accuracy, since these timers are subject to certain slight fluctuations due to different clocks in the master and slave. The time shown as the width of the block S likewise shows slight fluctuations. In practice, however, all of these three changes are extremely small, so that they have no significance for the control of the analog / digital converters in the master / slave compared to the clock fluctuations. The shift of the sample clocks is orders of magnitude stronger, so that the slight time fluctuations of S, T1 and T2 are irrelevant in practice.

Fig. 4 zeigt ein Blockschaltbild einer Synchronisation in einem Drahtlos-Mikrofon- und/oder In-Ear-Monitoring System gemäß dem zweiten Ausführungsbeispiel. Ein Taktslave TS weist gemäß der Erfindung einen einstellbaren Taktgenerator (z. B. ein VCXO mit einem Taktteiler D) auf. Ein Taktgenerator kann beispielsweise als ein Voltage Control Crystal Oszillator VCXO oder als ein Digitally Controlled Crystal Oscillator DCXO implementiert werden. Fig. 4 shows a block diagram of a synchronization in a wireless microphone and / or in-ear monitoring system according to the second embodiment. According to the invention, a clock slave TS has an adjustable clock generator (for example a VCXO with a clock divider D). A clock generator can be implemented, for example, as a voltage control crystal oscillator VCXO or as a digitally controlled crystal oscillator DCXO.

Gemäß der Erfindung wird der erste und/oder zweite Timer T1, T2 so eingestellt, dass ihr Ablauf zum selben Zeitpunkt erfolgt. In diesem Fall stimmt im synchronisierten Zustand die von dem Taktmaster TM gemessene und an den Taktslave TS übertragene Phase mit der Phase des Taktslaves überein. Wenn eine Abweichung vorhanden ist, dann ist diese Abweichung auf Null zu regeln mittels eines Reglers R in dem Taktslave TS. Eine Stellgröße des Reglers kann das Steuersignal des einstellbaren Taktgenerators VCXO in dem Taktslave TS sein.According to the invention, the first and / or second timer T1, T2 is set so that it runs at the same time. In this case, in the synchronized state, the phase measured by the clock master TM and transmitted to the clock slave TS coincides with the phase of the clock slave. If there is a deviation, then this deviation is to be regulated to zero by means of a controller R in the clock slave TS. A control variable of the controller can be the control signal of the adjustable clock generator VCXO in the clock slave TS.

Der Taktmaster TM kann einen Digital/Analog-Wandler DAC, einen Taktteiler D, einen Oszillator XO, eine erste Sample-and-Hold-Einheit SHP1 zum Speichern der ersten Phase P1 aufweisen. Über eine Datenübertragungsschnittstelle DT kann die erste Phase P1 per Broadcast übertragen werden. Der Taktmaster TM kann eine Audioübertragungsschnittstelle A aufweisen, die die vom Mikrofon M aufgenommenen und vom Analog-/Digitalwandler ADC verarbeiteten Audiodaten vom Taktslave TS zum Taktmaster TM überträgt. Ferner kann der Taktmaster TM eine Synchronisationsschnittstelle SY aufweisen.The clock master TM can have a digital / analog converter DAC, a clock divider D, an oscillator XO, a first sample-and-hold unit SHP1 for storing the first phase P1. The first phase P1 can be broadcast via a data transmission interface DT. The clock master TM can have an audio transmission interface A, which transmits the audio data picked up by the microphone M and processed by the analog / digital converter ADC from the clock slave TS to the clock master TM. Furthermore, the clock master TM can have a synchronization interface SY.

Der Taktslave TS kann beispielsweise mit einem Mikrofon M gekoppelt sein und empfängt das Ausgangssignal des Mikrofons M. Das Ausgangssignal des Mikrofons kann in einem Analog/Digital-Wandler DAC digitalisiert werden.The clock slave TS can for example be coupled to a microphone M and receives the output signal of the microphone M. The output signal of the microphone can be digitized in an analog / digital converter DAC.

Der Taktslave TS weist einen einstellbaren Oszillator VCXO, eine Taktteilungseinheit D, eine zweite Sample-and-Hold-Einheit SHP2, eine Vergleichseinheit C, einen zweiten Timer T2 sowie einen Regler R auf.The clock slave TS has an adjustable oscillator VCXO, a clock division unit D, a second sample-and-hold unit SHP2, a comparison unit C, a second timer T2 and a controller R.

Über die Synchronisationsschnittstelle SY überträgt der Taktmaster TM das Synchronisationswort RXS, welches von dem Taktslave TS empfangen wird. Bei Empfang des Synchronisationswortes RXS wird der zweite Timer T2 gestartet. Nach Ablauf des zweiten Timers T2 wird die zweite Sample-and-Hold-Einheit SHP2 verwendet, um die zweite gemessene Phase P2 des Taktslaves TS zu speichern. Wenn Daten über die Datenübertragungsschnittstelle DT übertragen werden, dann wird die erste und zweite Phase P1, P2 in der Vergleichseinheit C verglichen. Der Ausgang der Vergleichseinheit C ist ein Eingangssignal der Regeleinheit R. Das Ausgangssignal der Regeleinheit R steuert einen einstellbaren Taktgenerator VCXO. Das Ausgangssignal des einstellbaren Taktgenerators VCXO wird durch die Taktteilereinheit D geteilt und dem Analog/Digital-Wandler ADC zugeführt, welche diesen Takt als Sampletakt zum Abtasten des Ausgangssignals des Mikrofons M verwendet. Das entsprechend digitalisierte Ausgangssignal des Mikrofons M wird über die Audioschnittstelle A an den Taktmaster TM übertragen, welcher eine Digital/Analog-Wandlung in dem Digital/Analog-Wandler DAC durchführt und das analoge Ausgangssignal dann beispielsweise an einen Lautsprecher L ausgeben kann.The clock master TM transmits the synchronization word RXS, which is received by the clock slave TS, via the synchronization interface SY. When the synchronization word RXS is received, the second timer T2 is started. After the second timer T2 has expired, the second sample-and-hold unit SHP2 is used to store the second measured phase P2 of the clock slave TS. If data through the data transfer interface DT are transmitted, then the first and second phases P1, P2 are compared in the comparison unit C. The output of the comparison unit C is an input signal of the control unit R. The output signal of the control unit R controls an adjustable clock generator VCXO. The output signal of the adjustable clock generator VCXO is divided by the clock divider unit D and fed to the analog / digital converter ADC, which uses this clock as a sampling clock for sampling the output signal of the microphone M. The correspondingly digitized output signal of the microphone M is transmitted via the audio interface A to the clock master TM, which performs a digital / analog conversion in the digital / analog converter DAC and can then output the analog output signal to a loudspeaker L, for example.

Die Erfindung betrifft somit eine bidirektionale Drahtlos-Übertragungsstrecke mit regelmäßiger zeitlicher Synchronisation von mindestens einem Taktslave auf den Taktmaster. Ein Sendevorgang des Taktmasters und ein Empfangsvorgang des Taktslaves starten jeweils einen Timer, um auf allen Geräten einen gleichen Messzeitpunkt zu gewährleisten. Der Taktmaster misst zum Messzeitpunkt eine Sampletaktphase, welche an alle Taktslaves übertragen wird. Ein Taktslave misst zum Messzeitpunkt eine Sampletaktphase. Diese Sampletaktphase wird mit der empfangenen Sampletaktphase des Taktmasters verglichen. Eine Abweichung wird dazu verwendet, einen einstellbaren Taktgenerator im Taktslave so zu steuern, dass diese Abweichung auf Null geregelt wird.The invention thus relates to a bidirectional wireless transmission link with regular time synchronization of at least one clock slave to the clock master. A transmission process of the clock master and a reception process of the clock slave each start a timer in order to ensure the same measurement time on all devices. The clock master measures a sample clock phase at the time of measurement, which is transmitted to all clock slaves. A clock slave measures a sample clock phase at the time of measurement. This sample clock phase is compared with the received sample clock phase of the clock master. A deviation is used to control an adjustable clock generator in the clock slave so that this deviation is regulated to zero.

Claims (7)

  1. A method of controlling a wireless microphone and/or in-ear monitoring system which has a master device as a clock master (TM) and at least one slave device as a clock slave (TS), wherein between the clock master (TM) and the at least one clock slave (TS) there is a wireless digital transmission link, by way of which both synchronization signals and also audio signals can be digitally transmitted, comprising the steps:
    prescribing a master audio sample clock (100, S1) which prescribes master audio sampling times (101, 102, 103) in the clock master (TM),
    resetting a master phase counter (PCM) each time as soon as the master audio sample clock (100, S1) prescribes a master audio sampling time,
    forward counting of the master phase counter (PCM, 110) with the clock of a master fine clock generator (FPGM),
    prescribing an adjustable slave audio sample clock (150, S2) which prescribes slave audio sampling times (151, 152, 153) in the clock slave (TS),
    resetting a slave phase counter (PCS) each time as soon as the slave audio sample clock (150, S2) prescribes a sampling time,
    forward counting of the slave phase counter (PCS, 160) with the clock of a slave fine clock generator (FPGS),
    generating a synchronization event which generates a fixed time relationship between the clock master and the clock slave,
    establishing a synchronization time (130) on the basis of the synchronization event so that the clock master (TM) and the clock slave (TS) simultaneously reach the synchronization time (130),
    detecting a master phase (120) from the master phase counter (PCM, 110) at the synchronization time (130),
    detecting a slave phase (170) from the slave phase counter (PCS, 160) at the synchronization time (130),
    wirelessly transmitting the detected master phase (120) to the at least one clock slave (TS),
    comparing the wirelessly transmitted master phase (120) to the detected slave phase (170),
    using the difference between the master phase (120) and the slave phase (170) as an input value for a controller (R) of the clock slave (TS), and
    adjusting the adjustable slave audio sample clock (150, S2) by the controller (R) so that after recurrent performance of simultaneous detection of the master phase (120) and the slave phase (170) and subsequent processing the slave phase (170) corresponds to the master phase (120) so that the slave audio sampling times (151, 152, 153) correspond to the master audio audio sampling times (101, 102, 103).
  2. A method of controlling a wireless microphone and/or in-ear monitoring system according to claim 1 wherein the synchronization event is obtained from a wireless transmission between the master device (TM) and the slave device (TS) and wherein the synchronization event is independent of the audio sample clock.
  3. A master device (TM) for a wireless microphone and/or in-ear monitoring system, to which the master device (TM) belongs as a clock master and at least one slave device (TS) as a clock slave, comprising
    a master audio sample clock generator (ASPGM) for generating a master audio sample clock (100, S1) which prescribes master audio sampling times (101, 102, 103),
    a master fine clock generator (FPGM) for prescribing a master fine clock,
    a master phase counter (PCM) which counts forwards with the master fine clock and in so doing continuously generates a master counter state (110), wherein the master phase counter (PCM) is reset each time as soon as the master audio sample clock (100, S1) prescribes a master audio sampling time (ResM),
    a phase measurement trigger (PMT) for generating a synchronization event, wherein the master device derives a synchronization time (130) from the synchronization event,
    a phase measurement trigger transmitter (PMTT) for wireless transmission of the synchronization event to the slave device (TS), wherein a fixed time relationship is generated between the master device (TM) and the slave device (TS),
    a master phase value sensor (PVM) which at the synchronization time (130) reads out the current master counter state (110) of the master phase counter (PCM) and stores it as a master phase (120),
    a phase transmitter (PT) for wireless transmission of the read-out master phase (120) to the slave device (TS), and
    a master audio transmitter receiver (ATRM), by way of which the master device (TM) can wirelessly transmit and/or receive digital audio data which are associated with the master audio sample clock (100).
  4. A master device TM) for a wireless microphone and/or monitoring system as set forth in claim 3 additionally comprising a wordclock input (WRDCLK) and a master wordclock synchronization unit (WSUM), by way of which the master audio sample clock (100) can be adjusted to a wordclock signal of an external clock generator.
  5. A slave device (TS) for a wireless microphone and/or in-ear monitoring system, to which a master device (TM) belongs as a clock master and at least the slave device (TS) as a clock slave, comprising
    a slave audio sample clock generator (ASPGS) for generating an adjustable slave audio sample clock (150, S2) which prescribes slave audio sampling times (151, 152, 153),
    a slave fine clock generator (FPGS) for prescribing a slave fine clock,
    a slave phase counter (PCS) which counts forwards with the slave fine clock and in so doing continuously generates a slave counter state (160), wherein the slave phase counter (PCS) is reset each time as soon as the slave audio sample clock (150, S2) prescribes a slave audio sampling time (ResS),
    a measurement trigger receiver (MTR) for receiving a synchronization event from the master device (TM), wherein a fixed time relationship between the master device (TM) and the slave device (TS) is generated and wherein the slave device (TS) derives from the synchronization event a synchronization time (130) which corresponds to a synchronization time (130) of the master device (TM),
    a slave phase value sensor (PVS) which at the synchronization time (130) reads out the current slave counter state (160) of the slave phase counter (PCS) and stores it as a slave phase (170),
    a phase receiver (PR) for wirelessly receiving a master phase (120) from the master device (TM),
    a comparator (C) for comparing the wirelessly transmitted master phase (120) to the detected slave phase (170),
    a controller (R) which uses the difference between the master phase (120) and the slave phase (170) as an input value, and
    a slave audio transmitter receiver (ATRS), by way of which the slave device (TS) can wirelessly transmit and/or receive digital audio data associated with the slave audio sample clock (100),
    wherein the controller (R) so adjusts the adjustable slave audio sample clock (150, S2) as a setting value in a control circuit that after multiple implementation of the control circuit the slave phase (170) corresponds to the master phase (120) so that the slave audio sampling times (151, 152, 153) correspond to the master audio sampling times (101, 102, 103).
  6. A slave device (TS) for a wireless microphone and/or in-ear monitoring system as set forth in claim 5 wherein the control circuit is in the form of a phase locked loop (PLL).
  7. A wireless microphone and/or in-ear monitoring system comprising a master device (TM) as set forth in claim 3 and at least one slave device (TS) as set forth in claim 5.
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