EP3420624B1 - Dynamic power control circuit - Google Patents
Dynamic power control circuit Download PDFInfo
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- EP3420624B1 EP3420624B1 EP17708076.9A EP17708076A EP3420624B1 EP 3420624 B1 EP3420624 B1 EP 3420624B1 EP 17708076 A EP17708076 A EP 17708076A EP 3420624 B1 EP3420624 B1 EP 3420624B1
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- node
- signal
- voltage
- power source
- external power
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- 230000005669 field effect Effects 0.000 claims description 5
- 230000007704 transition Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 description 12
- 230000004913 activation Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000001105 regulatory effect Effects 0.000 description 2
- 239000013589 supplement Substances 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 1
- 230000009849 deactivation Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
- H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
- H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
- H02J7/007184—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage in response to battery voltage gradient
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/0031—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits using battery or load disconnect circuits
Definitions
- EP2448083 teaches a system includeing a control circuitry configured to detect a current wherein the detected current is one of a battery discharge current or a battery charging current; a first transistor configured to disconnect a load from at least one of a battery and a DC/DC converter if the battery discharge current exceeds a maximum battery discharge current setting; and a second transistor configured to adjust the charging current to maintain the charging current at or near a charge current setting.
- US2014070618 teaches a battery charging circuit having a first detection circuit and a second detection circuit for detecting when to terminate an activated voltage collapse protection operation.
- US2012139345 teaches a power supply system connectable to receive power from an adapter and supply power to a load.
- US20060139002 discloses a power supply for a rechargeable battery in a portable computer system which adjusts the level of charging current depending upon the current drawn by the portable computer system.
- an apparatus can include a system circuit, one or more batteries, a control circuit, and a controlled resistor.
- the system circuit can include any circuit that creates a load, such as the main components of a mobile device, e.g., one or more processors, memory, display screen, and radio.
- the apparatus is configured to receive power from two different outputs of an external power source: a system output coupled to the system circuit via a first node, and a charge output coupled to the batteries via a second node.
- the control circuit can detect one or more conditions of the device, such as an activation, e.g., utilization, of the external power source.
- control circuit can detect a voltage difference between the first node and the second node, or detect a level and/or a direction of current between components. As described herein, based at least in part on one or more detected conditions, e.g., an activation of the external power source and/or various voltage levels, the control circuit can cause the controlled resistor to adjust a level of impedance between the first node and the second node.
- the controlled impedance between the first node and the second node enables the system circuit to dynamically utilize power supplied by the external power source as well as power supplied by the batteries.
- the controlled impedance can create a more direct path between the system circuit and the batteries when one or more conditions are present.
- the techniques disclosed herein provide a design that can mitigate inefficiencies by reducing a resistive path between the batteries and the system circuit.
- the meaning of “a,” “an,” and “the” includes plural reference, the meaning of “in” includes “in” and “on.”
- the term “connected” means a direct electrical connection between the items connected, without any intermediate devices.
- the term “coupled” means a direct electrical connection between the items connected, or an indirect connection through one or more passive or active intermediary devices and/or components.
- circuit and “component” means either a single component or a multiplicity of components, either active and/or passive, that are coupled to provide a desired function.
- signal means at least a wattage, current, voltage, or data signal.
- the terms, “gate,” “drain,” and “source,” can also mean a “base,” “collector” and “emitter,” and/or equivalent parts.
- an apparatus 100 can include a system circuit 101, one or more batteries 103, a control circuit 105, and a controlled resistor 107.
- the system circuit 101 can, for example, include the components of a device, e.g., a processor, memory, and radio, or any other components that create a load.
- the apparatus 100 is configured to receive power from at least two different outputs of an external power source 109: (1) a system output (SYS OUT ) coupled to the system circuit 101 via a first node 150 (V SYS ), and (2) a charge output (CHG OUT ) coupled to the batteries 103 via a second node 151 (V PACK ).
- SYS OUT system output
- CHG OUT charge output
- the control circuit 105 can detect one or more conditions, such as the activation of the external power source 109.
- the one or more conditions can also include a voltage difference between the first node 150 and the second node 151.
- the control circuit 105 can also detect one or more current levels and/or current directions between selected nodes. As will be described in more detail below, based at least in part on the detected conditions, the control circuit 105 can control the connectivity, e.g., a level of impedance, between the first node 150 and the second node 151.
- Controlled connectivity between the first node 150 and the second node 151 enables the system circuit 101 to dynamically utilize power supplied by the external power source 109 as well as power supplied by the batteries 103 by the use of a controlled path of impedance that can react to one or more detected conditions.
- FIGURES 2A-2C show several use scenarios of an apparatus 200 comprising a switch 113 having a single logical input.
- the switch 113 controls the connectivity between one or more batteries 103 and a system circuit 101.
- the switch 113 connects the first node 150 and the second node 151 to enable the system circuit 101 to utilize power from the batteries 103.
- the switch 113 creates a high impedance path or an open circuit between the first node 150 and the second node 151 allowing the two outputs of the external power source 109 to independently supply power to the system circuit 101 and the batteries 103.
- the switch 113 comprises an input enabling one or more components to control with switch 113 with a logical signal indicating that the external power source 109 is active or inactive.
- the one or more components generating the logical signal can include the power supply.
- the logical signal can also be generated by other components such as a universal serial bus component, or any other suitable component for indicating the utilization of the external power source 109. As indicated by the dashed lines, when the external power source 109 is active, the current flows from the external power source 109 to the batteries 103 and the system circuit 101.
- the system circuit 101 may draw a high level of current that exceeds the capabilities of the external power source 109.
- the batteries 103 may supplement the external power source 109 by supplying power to the system circuit 101.
- FIGURE 2C This scenario is illustrated in FIGURE 2C , where the dashed lines show that current flows from the batteries 103, through the external power source 109, eventually reaching the system circuit 101.
- the representative resistors (R) such a configuration may cause inefficiencies as the path from the batteries 103 to the system circuit 101 may be lengthy.
- such a path can create a high level of resistance which in turn causes unwanted power loss as well as a reduction in the amount of current the batteries 103 can supply to the system circuit 101.
- the configuration shown in FIGURES 2A-2C illustrate a need for a dynamic control circuit that can react to a wide range of such use scenarios.
- the system circuit 101 comprises a positive lead for receiving power at the first node 150 from the first output of the external power source 109.
- the batteries 103 comprise a positive lead for receiving power at a second node 151 from a second output of the external power source 109. It can be appreciated that this example is provided for illustrative purposes and is not to be construed as limiting.
- the apparatus 100 can include any number and/or suitable arrangement of components, including any number of system circuits 101 and any number of batteries 103.
- the controlled resistor 107 comprises a first lead coupled to the first node 150 and a second lead coupled to the second node 151.
- the controlled resistor 107 causes a high impedance path between the first node 150 and the second node 151 when the controlled resistor 107 is "off," and the controlled resistor 107 causes a low impedance path between the first node 150 and the second node 151 when the controlled resistor 107 is "on.”
- the controlled resistor 107 further comprises an input for turning the controlled resistor 107 "on” or "off.”
- the control circuit 105 includes a first input coupled to the first node 150, a second input coupled to the second node 151, a logical input coupled to a third node 152, and an output (also referred to as a "control output") coupled to the input of the controlled resistor 107.
- the control circuit 105 can receive signals at the first node 150 and the second node 151 to detect one or more conditions.
- the control circuit 105 can be configured to determine a voltage at the first node 150 and a voltage at the second node 151.
- the control circuit 105 can also be configured to detect one or more current levels between at least two components.
- control circuit 105 can be configured to detect a direction of a current between two or more components.
- one or more coils can be wrapped around a conductor, such as a conductor coupling the external power source 109 and the system circuit 101 and/or a conductor coupling the external power source 109 and the batteries 103.
- the coils can be coupled to the first input and/or the second input to enable the control circuit 105 to detect one or more current levels and/or one or more current directions.
- the one or more components for generating a logical signal indicating that the external power source 109 is active or inactive can be a part of the external power source 109, a connector for the external power source 109, or any other component for detecting the presence and/or use of the external power source 109.
- the logical signal indicating that the external power source 109 is active or inactive can be communicated through a third node 152 that is independent of the first node 150 and the second node 151.
- the logical signal indicating that the external power source 109 is active or inactive can also be communicated through the first node 150 and/or the second node 151. In such configurations, a logical signal can be communicated to the first input and/or the second input of the control circuit 105.
- the control circuit 105 can be configured to cause the controlled resistor 107 to be "on" when the logical signal at the logical input indicates that the external power source is inactive.
- the external power source 109 "active" when providing power to one or more components of the apparatus 100, and “inactive” when the external power source 109 is disconnected or not providing power to one or more components of the apparatus 100.
- the controlled resistor 107 provides a short circuit or a low impedance path between the first node 150 and the second node 151, allowing the system circuit 101 to operate from the batteries 103.
- the control circuit 105 can be configured to cause the controlled resistor 107 to be "off' when the logical signal at the logical input indicates that the external power source is active, and when the voltage at the first node 150 and the voltage at the second node 151 are within a threshold of one another. Such a configuration allows the two outputs of the external power source 109 to independently provide power to the system circuit 101 and the batteries 103.
- the control circuit 105 can be configured to cause the controlled resistor 107 to be "on" when the logical signal at the logical input indicates that the external power source is active, and when the voltage at the first node 150 is less than the voltage at the second node 151 by the threshold. For example, while the external power source is active, if the threshold is 40 millivolts, the voltage at the first node 150 is 4.0 volts and the voltage at the second node 151 is 5.0 volts, the control circuit 105 will cause the controlled resistor 107 to be "on.” Such a configuration allows the batteries 103 to supplement the power provided by the external power source 109 while using a path of resistance that is shorter and more efficient than the path shown in FIGURE 2C .
- the threshold can be within a range of zero volts to one hundred millivolts. In another illustrative example, the threshold can be approximately forty millivolts, or within a range between thirty-five millivolts and forty-five millivolts. These examples are provided for illustrative purposes and are not to be construed as limiting as any suitable threshold can be utilized with the techniques disclosed herein.
- control circuit 105 can be configured to cause the controlled resistor 107 to be "off' when the logical signal at the logical input indicates that the external power source is active, and when a first signal at the first input and a second signal at the second input fulfill a first criteria.
- the control circuit 105 can be configured to cause the controlled resistor 107 to be "on" when the logical signal at the logical input indicates that the external power source is active, and when the first signal at the first input and the second signal at the second input fulfill a second criteria.
- the criteria for controlling the controlled resistor 107 can be based on current measurement at the first node 150 leading into the system circuit 101.
- the first criteria can be fulfilled when a current between the external power source 109 and the system circuit 101 is below a threshold.
- the second criteria can be fulfilled when the current between the external power source 109 and the system circuit 101 is above the threshold.
- the first criteria can be fulfilled when a current between the external power source 109 and the at least one battery 103 is flowing in a first direction, e.g., toward the battery 103.
- the second criteria can be fulfilled when the current between the external power source 109 and the at least one battery 103 is flowing in a second direction, e.g., away from the battery 103.
- control circuit 107 can be configured to cause the controlled resistor 107 to vary the level of impedance between the first node 150 and the second node 151 to maintain a predetermined voltage difference between the voltage at the first node 150 and the voltage at the second node 151.
- Such a configuration can also be implemented with criteria, e.g., the logical signal indicates that the external power source is active and/or when the voltage at the first node 150 is outside of a threshold of the voltage at the second node 151.
- the controlled resistor 107 when the voltage across the controlled resistor 107 is reverse biased, the controlled resistor 107 is "off' and the impedance through the controlled resistor 107 is high, e.g., an open circuit. In some configurations, when the voltage across the controlled resistor 107 exceeds a threshold voltage, e.g., a range around 30 mV, in a forward direction, the controlled resistor 107 is "on," and the impedance of the controlled resistor 107 is controlled such that the voltage between the first node 150 and the second node 151 is regulated to a threshold voltage difference. In one illustrative example, the threshold voltage difference can be 30 mV. The threshold voltage difference can be at other levels depending on design needs.
- such configurations can be referred to herein as a "linear region,” where the controlled resistor 107 is regulating the forward voltage to a desired level, e.g., about 30 mV. If the current through the controlled resistor 107 is so high that the controlled resistor 107 is fully turned “on,” then it acts as an switch that is turned on with resistance and the voltage across the controlled resistor 107 is (I * R), which can be greater than the 30 mV set point.
- the controlled resistor 107 comprises a transistor 111, such as a field-effect transistor 111.
- the gate of the transistor 111 is coupled to the output of the control circuit.
- the source of the transistor 111 is coupled to the first node 150 and the drain of the transistor 111 is coupled to the second node 151.
- Such configurations, and other configurations enable the control circuit 105 to cause the controlled resistor 107 to gradually transition the level of impedance between the first node 150 and the second node 151 from a high impedance path to a low impedance path as a difference between the voltage of the first signal and the voltage of the second signal increases.
- the control circuit 105 can also cause the controlled resistor 107 to gradually transition the level of impedance between the first node 150 and the second node 151 from a low impedance path to a high impedance path as a difference between the voltage of the first signal and the voltage of the second signal decreases.
- a high impedance path can also be an open circuit and a low impedance path can be a closed circuit.
- the controlled resistor 107 can also include other components, such as a pFET or an ideal diode. Any suitable component or combination of components can be used, including a mechanical switch or a combination of parts that include one or more diodes and an Op-amp. In such configurations, a controlled resistor 107 having a forward bias voltage drop close to zero can work with the techniques disclosed herein.
- FIGURE 5 illustrates a flow chart implementing a method 500 in accordance with techniques disclosed herein.
- Other logical flows can be implemented using the circuits described herein, the logical disclosed herein is provided for illustrative purposes and is not to be construed as limiting.
- the logical flow described herein can be implemented by an apparatus 100 having a system circuit 101, one or more batteries 103, a control circuit 105, and a controlled resistor 107.
- the logical flow starts at block 501, where the control circuit 105 receives a signal from the first node 150 coupled to a positive lead of a system circuit 101 ("load circuit") and the first output of an external power source 109.
- the control circuit 105 receives a signal from the second node 151 coupled to a positive lead of at least one battery 103 and the second output of an external power source 109.
- the control circuit 105 receives a logic signal from the external power source 109.
- the logic signal can include any type of signal indicating activation or deactivation of the external power source 109.
- the control circuit 105 and the controlled resistor 107 control an impedance path between the first node 150 and the second node 151.
- the impedance path between the first node 150 and the second node 151 can be adjusted in a number of ways depending on a desired outcome.
- the impedance path can be a short circuit or a low impedance path when the external power source 109 is not active.
- the impedance path can be an open circuit or a high impedance path when the logical signal at the logical input indicates that the external power source 109 is active, and when the voltage at the first node 150 and the voltage at the second node 151 are within a threshold of one another.
- the impedance path can be a short circuit or a low impedance path when the logical signal indicates that the external power source 109 is active, and when the voltage at the first node 150 is less than the voltage at the second node 151 by a threshold amount.
- the impedance path can be dynamically adjusted to maintain a predetermined voltage difference between the first node 150 and the second node 151.
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Description
- Many developments have been made to improve the way batteries are used in mobile devices. For instance, some charging circuits have been developed to enable a single battery charger to supply power for device operation while also providing an independent power source to charge the device batteries. Although there have been some improvements with respect to such circuits, there are many shortcomings and inefficiencies with respect to current technologies. For example, some current charging circuits have a limited number of mechanisms for addressing situations where a high level of current is needed for device operation. Such designs can lead to inefficiencies and/or prevent a device from using the full capacity of a power source.
- The disclosure made herein is presented with respect to these and other considerations. It is with respect to these and other considerations that the disclosure made herein is presented.
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EP2448083 teaches a system includeing a control circuitry configured to detect a current wherein the detected current is one of a battery discharge current or a battery charging current; a first transistor configured to disconnect a load from at least one of a battery and a DC/DC converter if the battery discharge current exceeds a maximum battery discharge current setting; and a second transistor configured to adjust the charging current to maintain the charging current at or near a charge current setting. -
US2014070618 teaches a battery charging circuit having a first detection circuit and a second detection circuit for detecting when to terminate an activated voltage collapse protection operation. -
US2012139345 teaches a power supply system connectable to receive power from an adapter and supply power to a load.
US20060139002 discloses a power supply for a rechargeable battery in a portable computer system which adjusts the level of charging current depending upon the current drawn by the portable computer system. - According to aspects of the present invention there is provided an apparatus as defined in the accompanying claims.
- A dynamic power control circuit is provided and described herein. In some configurations, an apparatus can include a system circuit, one or more batteries, a control circuit, and a controlled resistor. The system circuit can include any circuit that creates a load, such as the main components of a mobile device, e.g., one or more processors, memory, display screen, and radio. The apparatus is configured to receive power from two different outputs of an external power source: a system output coupled to the system circuit via a first node, and a charge output coupled to the batteries via a second node. The control circuit can detect one or more conditions of the device, such as an activation, e.g., utilization, of the external power source. In other examples, the control circuit can detect a voltage difference between the first node and the second node, or detect a level and/or a direction of current between components. As described herein, based at least in part on one or more detected conditions, e.g., an activation of the external power source and/or various voltage levels, the control circuit can cause the controlled resistor to adjust a level of impedance between the first node and the second node. The controlled impedance between the first node and the second node enables the system circuit to dynamically utilize power supplied by the external power source as well as power supplied by the batteries. The controlled impedance can create a more direct path between the system circuit and the batteries when one or more conditions are present. The techniques disclosed herein provide a design that can mitigate inefficiencies by reducing a resistive path between the batteries and the system circuit.
- It should be appreciated that the above-described subject matter may also be implemented as part of an apparatus, system, or as part of an article of manufacture. These and various other features will be apparent from a reading of the following Detailed Description and a review of the associated drawings.
- This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended that this Summary be used to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that solve any or all disadvantages noted in any part of this disclosure.
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FIGURE 1 shows a schematic diagram of an apparatus comprising a dynamic power control circuit. -
FIGURES 2A-2C show schematic diagrams of an apparatus comprising a switch having a single logical input. -
FIGURE 3 shows a schematic diagram of an apparatus comprising a dynamic power control circuit in a use scenario. -
FIGURE 4 shows a schematic diagram illustrating details of a controlled resistor controlled by a dynamic power control circuit. -
FIGURE 5 illustrates a flow chart implementing an example method in accordance with techniques disclosed herein. - In the following detailed description, reference is made to the accompanied drawings, which form a part hereof, and which is shown by way of illustration, specific example configurations of which the concepts can be practiced. These configurations are described in sufficient detail to enable those skilled in the art to practice the techniques disclosed herein, and it is to be understood that other configurations can be utilized, and other changes may be made, without departing from the scope of the presented concepts. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the presented concepts is defined only by the appended claims.
- Throughout the specification and claims, the following terms take the meanings explicitly associated herein, unless the context clearly dictates otherwise. The meaning of "a," "an," and "the" includes plural reference, the meaning of "in" includes "in" and "on." The term "connected" means a direct electrical connection between the items connected, without any intermediate devices. The term "coupled" means a direct electrical connection between the items connected, or an indirect connection through one or more passive or active intermediary devices and/or components. The terms "circuit" and "component" means either a single component or a multiplicity of components, either active and/or passive, that are coupled to provide a desired function. The term "signal" means at least a wattage, current, voltage, or data signal. The terms, "gate," "drain," and "source," can also mean a "base," "collector" and "emitter," and/or equivalent parts.
- Referring to
FIGURE 1 , anapparatus 100 can include asystem circuit 101, one ormore batteries 103, acontrol circuit 105, and a controlledresistor 107. Thesystem circuit 101 can, for example, include the components of a device, e.g., a processor, memory, and radio, or any other components that create a load. Theapparatus 100 is configured to receive power from at least two different outputs of an external power source 109: (1) a system output (SYSOUT) coupled to thesystem circuit 101 via a first node 150 (VSYS), and (2) a charge output (CHGOUT) coupled to thebatteries 103 via a second node 151 (VPACK). Thecontrol circuit 105 can detect one or more conditions, such as the activation of theexternal power source 109. The one or more conditions can also include a voltage difference between thefirst node 150 and thesecond node 151. In other examples, thecontrol circuit 105 can also detect one or more current levels and/or current directions between selected nodes. As will be described in more detail below, based at least in part on the detected conditions, thecontrol circuit 105 can control the connectivity, e.g., a level of impedance, between thefirst node 150 and thesecond node 151. Controlled connectivity between thefirst node 150 and thesecond node 151 enables thesystem circuit 101 to dynamically utilize power supplied by theexternal power source 109 as well as power supplied by thebatteries 103 by the use of a controlled path of impedance that can react to one or more detected conditions. - To illustrate aspects of the techniques disclosed herein,
FIGURES 2A-2C show several use scenarios of anapparatus 200 comprising aswitch 113 having a single logical input. In this example, theswitch 113 controls the connectivity between one ormore batteries 103 and asystem circuit 101. As shown inFIGURE 2A , when thesystem circuit 101 is in use without the activation of an external power source, theswitch 113 connects thefirst node 150 and thesecond node 151 to enable thesystem circuit 101 to utilize power from thebatteries 103. - As shown in
FIGURE 2B , when theexternal power source 109 is connected to theapparatus 200, power is received from the two different outputs. The system output (SYSOUT) is coupled to thefirst node 150 supplying power to thesystem circuit 101, and the charge output (CHGOUT) is coupled to thesecond node 151 supplying power to thebatteries 103. In this example, when theexternal power source 109 is connected, theswitch 113 creates a high impedance path or an open circuit between thefirst node 150 and thesecond node 151 allowing the two outputs of theexternal power source 109 to independently supply power to thesystem circuit 101 and thebatteries 103. - In some configurations, the
switch 113 comprises an input enabling one or more components to control withswitch 113 with a logical signal indicating that theexternal power source 109 is active or inactive. The one or more components generating the logical signal can include the power supply. The logical signal can also be generated by other components such as a universal serial bus component, or any other suitable component for indicating the utilization of theexternal power source 109. As indicated by the dashed lines, when theexternal power source 109 is active, the current flows from theexternal power source 109 to thebatteries 103 and thesystem circuit 101. - In some use scenarios, the
system circuit 101 may draw a high level of current that exceeds the capabilities of theexternal power source 109. In such scenarios, thebatteries 103 may supplement theexternal power source 109 by supplying power to thesystem circuit 101. This scenario is illustrated inFIGURE 2C , where the dashed lines show that current flows from thebatteries 103, through theexternal power source 109, eventually reaching thesystem circuit 101. As illustrated by the representative resistors (R), such a configuration may cause inefficiencies as the path from thebatteries 103 to thesystem circuit 101 may be lengthy. In addition, such a path can create a high level of resistance which in turn causes unwanted power loss as well as a reduction in the amount of current thebatteries 103 can supply to thesystem circuit 101. The configuration shown inFIGURES 2A-2C illustrate a need for a dynamic control circuit that can react to a wide range of such use scenarios. - Referring now to
FIGURE 3 , illustrative examples of several use scenarios for a dynamic power control circuit that is capable of detecting and reacting to one or more conditions of anapparatus 100 are shown and described below. In one illustrative example, thesystem circuit 101 comprises a positive lead for receiving power at thefirst node 150 from the first output of theexternal power source 109. Thebatteries 103 comprise a positive lead for receiving power at asecond node 151 from a second output of theexternal power source 109. It can be appreciated that this example is provided for illustrative purposes and is not to be construed as limiting. Theapparatus 100 can include any number and/or suitable arrangement of components, including any number ofsystem circuits 101 and any number ofbatteries 103. - The controlled
resistor 107 comprises a first lead coupled to thefirst node 150 and a second lead coupled to thesecond node 151. The controlledresistor 107 causes a high impedance path between thefirst node 150 and thesecond node 151 when the controlledresistor 107 is "off," and the controlledresistor 107 causes a low impedance path between thefirst node 150 and thesecond node 151 when the controlledresistor 107 is "on." The controlledresistor 107 further comprises an input for turning the controlledresistor 107 "on" or "off." - The
control circuit 105 includes a first input coupled to thefirst node 150, a second input coupled to thesecond node 151, a logical input coupled to athird node 152, and an output (also referred to as a "control output") coupled to the input of the controlledresistor 107. Thecontrol circuit 105 can receive signals at thefirst node 150 and thesecond node 151 to detect one or more conditions. For example, thecontrol circuit 105 can be configured to determine a voltage at thefirst node 150 and a voltage at thesecond node 151. Thecontrol circuit 105 can also be configured to detect one or more current levels between at least two components. - In addition, the
control circuit 105 can be configured to detect a direction of a current between two or more components. To enable such capabilities, one or more coils can be wrapped around a conductor, such as a conductor coupling theexternal power source 109 and thesystem circuit 101 and/or a conductor coupling theexternal power source 109 and thebatteries 103. The coils can be coupled to the first input and/or the second input to enable thecontrol circuit 105 to detect one or more current levels and/or one or more current directions. - The one or more components for generating a logical signal indicating that the
external power source 109 is active or inactive can be a part of theexternal power source 109, a connector for theexternal power source 109, or any other component for detecting the presence and/or use of theexternal power source 109. The logical signal indicating that theexternal power source 109 is active or inactive can be communicated through athird node 152 that is independent of thefirst node 150 and thesecond node 151. The logical signal indicating that theexternal power source 109 is active or inactive can also be communicated through thefirst node 150 and/or thesecond node 151. In such configurations, a logical signal can be communicated to the first input and/or the second input of thecontrol circuit 105. - The
control circuit 105 can be configured to cause the controlledresistor 107 to be "on" when the logical signal at the logical input indicates that the external power source is inactive. For illustrative purposes, theexternal power source 109 "active" when providing power to one or more components of theapparatus 100, and "inactive" when theexternal power source 109 is disconnected or not providing power to one or more components of theapparatus 100. Thus, when theexternal power source 109 is not providing power to one or more components of theapparatus 100, the controlledresistor 107 provides a short circuit or a low impedance path between thefirst node 150 and thesecond node 151, allowing thesystem circuit 101 to operate from thebatteries 103. - The
control circuit 105 can be configured to cause the controlledresistor 107 to be "off' when the logical signal at the logical input indicates that the external power source is active, and when the voltage at thefirst node 150 and the voltage at thesecond node 151 are within a threshold of one another. Such a configuration allows the two outputs of theexternal power source 109 to independently provide power to thesystem circuit 101 and thebatteries 103. - The
control circuit 105 can be configured to cause the controlledresistor 107 to be "on" when the logical signal at the logical input indicates that the external power source is active, and when the voltage at thefirst node 150 is less than the voltage at thesecond node 151 by the threshold. For example, while the external power source is active, if the threshold is 40 millivolts, the voltage at thefirst node 150 is 4.0 volts and the voltage at thesecond node 151 is 5.0 volts, thecontrol circuit 105 will cause the controlledresistor 107 to be "on." Such a configuration allows thebatteries 103 to supplement the power provided by theexternal power source 109 while using a path of resistance that is shorter and more efficient than the path shown inFIGURE 2C . - In some examples, the threshold can be within a range of zero volts to one hundred millivolts. In another illustrative example, the threshold can be approximately forty millivolts, or within a range between thirty-five millivolts and forty-five millivolts. These examples are provided for illustrative purposes and are not to be construed as limiting as any suitable threshold can be utilized with the techniques disclosed herein.
- These examples are provided for illustrative purposes, as other conditions and/or criteria can be used to cause the controlled
resistor 107 to react to different scenarios. In another example, thecontrol circuit 105 can be configured to cause the controlledresistor 107 to be "off' when the logical signal at the logical input indicates that the external power source is active, and when a first signal at the first input and a second signal at the second input fulfill a first criteria. Thecontrol circuit 105 can be configured to cause the controlledresistor 107 to be "on" when the logical signal at the logical input indicates that the external power source is active, and when the first signal at the first input and the second signal at the second input fulfill a second criteria. - The criteria for controlling the controlled
resistor 107 can be based on current measurement at thefirst node 150 leading into thesystem circuit 101. In such an example, the first criteria can be fulfilled when a current between theexternal power source 109 and thesystem circuit 101 is below a threshold. The second criteria can be fulfilled when the current between theexternal power source 109 and thesystem circuit 101 is above the threshold. - In some configurations, the first criteria can be fulfilled when a current between the
external power source 109 and the at least onebattery 103 is flowing in a first direction, e.g., toward thebattery 103. In such an example, the second criteria can be fulfilled when the current between theexternal power source 109 and the at least onebattery 103 is flowing in a second direction, e.g., away from thebattery 103. - In some configurations, the
control circuit 107 can be configured to cause the controlledresistor 107 to vary the level of impedance between thefirst node 150 and thesecond node 151 to maintain a predetermined voltage difference between the voltage at thefirst node 150 and the voltage at thesecond node 151. Such a configuration can also be implemented with criteria, e.g., the logical signal indicates that the external power source is active and/or when the voltage at thefirst node 150 is outside of a threshold of the voltage at thesecond node 151. - In some configurations, when the voltage across the controlled
resistor 107 is reverse biased, the controlledresistor 107 is "off' and the impedance through the controlledresistor 107 is high, e.g., an open circuit. In some configurations, when the voltage across the controlledresistor 107 exceeds a threshold voltage, e.g., a range around 30 mV, in a forward direction, the controlledresistor 107 is "on," and the impedance of the controlledresistor 107 is controlled such that the voltage between thefirst node 150 and thesecond node 151 is regulated to a threshold voltage difference. In one illustrative example, the threshold voltage difference can be 30 mV. The threshold voltage difference can be at other levels depending on design needs. For illustrative purposes such configurations can be referred to herein as a "linear region," where the controlledresistor 107 is regulating the forward voltage to a desired level, e.g., about 30 mV. If the current through the controlledresistor 107 is so high that the controlledresistor 107 is fully turned "on," then it acts as an switch that is turned on with resistance and the voltage across the controlledresistor 107 is (I * R), which can be greater than the 30 mV set point. - Referring now to
FIGURE 4 , aspects of the controlledresistor 107 are shown and described below. In some configurations, the controlledresistor 107 comprises atransistor 111, such as a field-effect transistor 111. The gate of thetransistor 111 is coupled to the output of the control circuit. The source of thetransistor 111 is coupled to thefirst node 150 and the drain of thetransistor 111 is coupled to thesecond node 151. Such configurations, and other configurations, enable thecontrol circuit 105 to cause the controlledresistor 107 to gradually transition the level of impedance between thefirst node 150 and thesecond node 151 from a high impedance path to a low impedance path as a difference between the voltage of the first signal and the voltage of the second signal increases. Thecontrol circuit 105 can also cause the controlledresistor 107 to gradually transition the level of impedance between thefirst node 150 and thesecond node 151 from a low impedance path to a high impedance path as a difference between the voltage of the first signal and the voltage of the second signal decreases. A high impedance path can also be an open circuit and a low impedance path can be a closed circuit. - The controlled
resistor 107 can also include other components, such as a pFET or an ideal diode. Any suitable component or combination of components can be used, including a mechanical switch or a combination of parts that include one or more diodes and an Op-amp. In such configurations, a controlledresistor 107 having a forward bias voltage drop close to zero can work with the techniques disclosed herein. -
FIGURE 5 illustrates a flow chart implementing amethod 500 in accordance with techniques disclosed herein. Other logical flows can be implemented using the circuits described herein, the logical disclosed herein is provided for illustrative purposes and is not to be construed as limiting. The logical flow described herein can be implemented by anapparatus 100 having asystem circuit 101, one ormore batteries 103, acontrol circuit 105, and a controlledresistor 107. - The logical flow starts at
block 501, where thecontrol circuit 105 receives a signal from thefirst node 150 coupled to a positive lead of a system circuit 101 ("load circuit") and the first output of anexternal power source 109. Atblock 503, thecontrol circuit 105 receives a signal from thesecond node 151 coupled to a positive lead of at least onebattery 103 and the second output of anexternal power source 109. Atblock 505, thecontrol circuit 105 receives a logic signal from theexternal power source 109. The logic signal can include any type of signal indicating activation or deactivation of theexternal power source 109. - Next, at
block 505, thecontrol circuit 105 and the controlledresistor 107 control an impedance path between thefirst node 150 and thesecond node 151. As described herein, the impedance path between thefirst node 150 and thesecond node 151 can be adjusted in a number of ways depending on a desired outcome. For example, the impedance path can be a short circuit or a low impedance path when theexternal power source 109 is not active. The impedance path can be an open circuit or a high impedance path when the logical signal at the logical input indicates that theexternal power source 109 is active, and when the voltage at thefirst node 150 and the voltage at thesecond node 151 are within a threshold of one another. In addition, the impedance path can be a short circuit or a low impedance path when the logical signal indicates that theexternal power source 109 is active, and when the voltage at thefirst node 150 is less than the voltage at thesecond node 151 by a threshold amount. In some configurations, the impedance path can be dynamically adjusted to maintain a predetermined voltage difference between thefirst node 150 and thesecond node 151. - It should be understood that the operations of the methods disclosed herein are not necessarily presented in any particular order and that performance of some or all of the operations in an alternative order(s) is possible and is contemplated. The operations have been presented in the demonstrated order for ease of description and illustration. Operations may be added, omitted, and/or performed simultaneously, without departing from the scope of the appended claims. It also should be understood that the illustrated methods can be ended at any time and need not be performed in its entirety.
- The above specification, examples and data provide a complete description of the manufacture and use of the composition of the invention. Since many embodiments of the invention can be made without departing from the spirit and scope of the invention, the invention resides in the claims hereinafter appended. and/or performed simultaneously, without departing from the scope of the appended claims. It also should be understood that the illustrated methods can be ended at any time and need not be performed in its entirety.
- The above specification, examples and data provide a complete description of the manufacture and use of the composition of the invention. Since many embodiments of the invention can be made without departing from the scope of the invention, the invention resides in the claims hereinafter appended.
Claims (9)
- An apparatus (100), comprising:a system circuit (101) comprising a positive lead for receiving power at a first node (150) from a first output of an external power source (109);at least one battery (103) comprising a positive lead for receiving power at a second node (151) from a second output of the external power source (109);a controlled resistor (107) comprising a first lead coupled to the first node (150) and a second lead coupled to the second node (151), the controlled resistor (107) being configured to cause a high impedance path between the first node (150) and the second node (151) when the controlled resistor (107) is off, the controlled resistor (107) being configured to cause a low impedance path between the first node (150) and the second node (151) when the controlled resistor (107) is on, the controlled resistor (107) further comprising an input for turning the controlled resistor (107) on or off; anda control circuit (105) having a first input coupled to the first node (150), a second input coupled to the second node (151), a logical input coupled to a component configured to cause a logical signal at the logical input indicating that the external power source (109) is active or inactive, and the control circuit (105) comprising a control output coupled to the input of the controlled resistor (107),the control circuit (105) being configured to cause the controlled resistor (107) to be on when the logical signal at the logical input indicates that the external power source (109) is inactive,the control circuit (105) being configured to cause the controlled resistor (107) to be off when the logical signal at the logical input indicates that the external power source (109) is active, and when a first signal at the first input and a second signal at the second input fulfill first criteria, wherein the first criteria are fulfilled when a voltage difference between a voltage of the first signal and a voltage of the second signal is below a first threshold, andthe control circuit (105) being configured to cause the controlled resistor (107) to be on when the logical signal at the logical input indicates that the external power source is active, and when the first signal at the first input and the second signal at the second input fulfill second criteria, wherein the second criteria are fulfilled when the voltage of the first signal is below the voltage of the second signal by at least a second threshold.
- The apparatus of claim 1, wherein when the voltage of the first signal is below the voltage of the second signal, the control circuit is configured to cause the controlled resistor to gradually transition from the high impedance path between the first node and the second node to the low impedance path between the first node and the second node as a difference between the voltage of the first signal and the voltage of the second signal increases.
- The apparatus of claim 1, wherein the first threshold and the second threshold are within a range of zero volts to one hundred millivolts.
- The apparatus of claim 1, wherein the first threshold and the second threshold are within a range of 35 millivolts to 45 millivolts.
- The apparatus of claim 1, wherein when the voltage of the first signal is below the voltage of the second signal, the control circuit is configured to cause the controlled resistor to vary a level of impedance between the first node and the second node to maintain a predetermined voltage difference between the voltage of the first signal and the voltage of the second signal.
- The apparatus of claim 1, wherein the first criteria are also fulfilled when a current between the external power source and the system circuit is below a threshold, and wherein the second criteria are also fulfilled when the current between the external power source and the system circuit above the threshold.
- The apparatus of claim 1, wherein the first criteria are also fulfilled when a current between the external power source and the at least one battery is flowing in a first direction, and wherein the second criteria are also fulfilled when the current between the external power source and the at least one battery is flowing in a second direction.
- The apparatus of claim 1, wherein the controlled resistor comprises a field-effect transistor, wherein a gate of the transistor is coupled to the control output of the control circuit, a source of the field-effect transistor is coupled to the first node, and a drain of the field-effect transistor is coupled to the second node.
- The apparatus of claim 8, wherein the control circuit is configured to cause the field-effect transistor to control a level of impedance between the second node and the first node to maintain a threshold voltage difference between the first node and second node.
Applications Claiming Priority (2)
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US15/055,479 US10320219B2 (en) | 2016-02-26 | 2016-02-26 | Dynamic power control circuit |
PCT/US2017/018022 WO2017146962A1 (en) | 2016-02-26 | 2017-02-16 | Dynamic power control circuit |
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EP3420624A1 EP3420624A1 (en) | 2019-01-02 |
EP3420624B1 true EP3420624B1 (en) | 2020-10-14 |
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US20060139002A1 (en) * | 2004-12-29 | 2006-06-29 | Zemke Roger A | Current control circuitry and methodology for controlling current from current constrained source |
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WO1999026330A2 (en) | 1997-11-17 | 1999-05-27 | Lifestyle Technologies | Universal power supply |
US7709976B2 (en) | 2005-07-19 | 2010-05-04 | Linear Technology Corporation | Dual-input DC-DC converter with integrated ideal diode function |
US7710079B2 (en) | 2005-07-19 | 2010-05-04 | Linear Technology Corporation | Power manager and power managing method for battery-powered application |
JP4877181B2 (en) * | 2006-10-23 | 2012-02-15 | ソニー株式会社 | Charging apparatus and charging method |
JP4308855B2 (en) * | 2007-01-17 | 2009-08-05 | セイコーエプソン株式会社 | Power reception control device, power reception device, and electronic device |
US8022679B2 (en) | 2008-04-18 | 2011-09-20 | Linear Technology Corporation | Systems and methods for fast switch turn on approximating ideal diode function |
JP4525806B2 (en) * | 2008-07-15 | 2010-08-18 | セイコーエプソン株式会社 | Power reception control device, power reception device, and electronic device |
US8988912B2 (en) | 2008-10-23 | 2015-03-24 | Leach International Corporation | System and method for emulating an ideal diode in a power control device |
US8536840B2 (en) | 2009-03-17 | 2013-09-17 | Linear Technology Corporation | Bidirectional power converters |
US8450976B2 (en) | 2010-10-29 | 2013-05-28 | O2Micro, Inc. | Power topology with battery charging and discharge current protection capabilities |
US20120139345A1 (en) | 2010-12-01 | 2012-06-07 | Texas Instruments Incorporated | Control method of hybrid power battery charger |
US9673638B2 (en) * | 2011-09-28 | 2017-06-06 | Integrated Device Technology, Inc. | Apparatus and method for a switching power converter |
CN102751764B (en) * | 2012-07-17 | 2014-09-10 | 无锡中星微电子有限公司 | Mobile power supply |
US9236752B2 (en) * | 2012-09-07 | 2016-01-12 | Qualcomm Incorporated | Method and system for voltage collapse protection |
JP5511033B1 (en) | 2012-12-04 | 2014-06-04 | Necシステムテクノロジー株式会社 | Blood glucose level prediction device, measurement device, blood glucose level prediction method, and program |
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US20060139002A1 (en) * | 2004-12-29 | 2006-06-29 | Zemke Roger A | Current control circuitry and methodology for controlling current from current constrained source |
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US20170250556A1 (en) | 2017-08-31 |
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US10320219B2 (en) | 2019-06-11 |
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EP3420624B8 (en) | 2020-11-18 |
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