EP2483923A1 - Optoelektronischer halbleiterchip und verfahren zum anpassen einer kontaktstruktur zur elektrischen kontaktierung eines optoelektronischen halbleiterchips - Google Patents
Optoelektronischer halbleiterchip und verfahren zum anpassen einer kontaktstruktur zur elektrischen kontaktierung eines optoelektronischen halbleiterchipsInfo
- Publication number
- EP2483923A1 EP2483923A1 EP10763590A EP10763590A EP2483923A1 EP 2483923 A1 EP2483923 A1 EP 2483923A1 EP 10763590 A EP10763590 A EP 10763590A EP 10763590 A EP10763590 A EP 10763590A EP 2483923 A1 EP2483923 A1 EP 2483923A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- terminal
- semiconductor
- branch
- separated
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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- 230000005693 optoelectronics Effects 0.000 title claims abstract description 38
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318516—Test of programmable logic devices [PLDs]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/0411—Miniature fuses
- H01H85/0415—Miniature fuses cartridge type
- H01H85/0417—Miniature fuses cartridge type with parallel side contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/30—Means for indicating condition of fuse structurally associated with the fuse
- H01H85/32—Indicating lamp structurally associated with the protective device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
- H01L23/5256—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/02—Details
- H02H3/04—Details with warning or supervision in addition to disconnection, e.g. for indicating that protective apparatus has functioned
- H02H3/046—Signalling the blowing of a fuse
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/74—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of diodes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17724—Structural details of logic blocks
- H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/40—Details of LED load circuits
- H05B45/44—Details of LED load circuits with an active control inside an LED matrix
- H05B45/48—Details of LED load circuits with an active control inside an LED matrix having LEDs organised in strings and incorporating parallel shunting devices
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/50—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits
- H05B45/58—Circuit arrangements for operating light-emitting diodes [LED] responsive to malfunctions or undesirable behaviour of LEDs; responsive to LED life; Protective circuits involving end of life detection of LEDs
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49204—Contact or terminal manufacturing
Definitions
- the invention relates to an optoelectronic semiconductor chip with a semiconductor function region and a contact structure for electrical contacting of the optoelectronic
- Fuses are printed circuit board structures that, like fuses, are burned through deliberately increased current flow, that is to say put into an insulating state
- Burning is also referred to as "programming.” As a result, interconnections can be subsequently changed individually.
- the contact structure can be separated from a defective semiconductor function area so that it is permanently deactivated. As a result, the functionality of the optoelectronic chip is also at
- the optoelectronic semiconductor chip comprises a first semiconductor functional area having a first terminal and a second terminal and a contact structure for electrical contacting of the optoelectronic semiconductor chip, which is electrically conductively connected to the first semiconductor functional area.
- the contact structure has a separable conductor structure, wherein when not separated
- Ladder structure is an operating current path via the first terminal of the first semiconductor functional area and the second terminal is fixed, the in a split conductor structure
- Conductor structure an operating current path via the first terminal of the first semiconductor functional area and the second terminal set, wherein not separated conductor structure, the conductor structure connects the first terminal to the second terminal and the first semiconductor function area
- the conductor structure connects the first terminal to the second terminal when the conductor structure is not separated, the first semiconductor functional area is short-circuited, or
- short-circuited is meant that at the semiconductor functional areas, even when applying the
- the short-circuited first semiconductor function region can be brought into a state in which it is ready for operation.
- the short circuit is resolved.
- the semiconductor function region may be a modular component within a device.
- the semiconductor chip comprises the semiconductor functional area as part of an integrated circuit, as can be produced in the wafer composite.
- the wafer composite comprises a semiconductor layer sequence which is arranged on a carrier layer and which is used to form at least a part of the semiconductor layer
- Semiconductor layer sequence is structured such that a plurality of semiconductor functional areas is formed.
- Semiconductor function region may include one or more radiation generating portions or units. These can be connected, for example, in series. Also one
- the contact structure provides conductive connections to the semiconductor function region and allows a voltage required to operate the semiconductor function region to be applied to it, as long as it is ready for operation. A potential can be applied to a terminal of the semiconductor function area. This is due to an operating voltage across the terminals of the semiconductor function area
- the terminal can be an area of
- Be semiconductor function region is guided to the contact structure to the semiconductor functional area.
- the first semiconductor function region can be short-circuited, ie bridged, by a conductor structure connected in parallel.
- the short circuit can be resolved by disconnecting the conductor structure.
- Separatation involves the formation of an insulation gap within the conductor structure so that an electrically conductive connection is converted into an insulating state.
- the conductor structure comprises separable regions which, for example, differ from the rest of the contact structure in terms of their design in order to facilitate recognition of these regions and to avoid the undesired separation for operating required contact structures.
- the provision of externally separable regions of the conductor pattern may also be considered Art Fuse technology, adapted and applied to segmented multi-pixel LEDs.
- Conductor structure may be in a split state or in a non-split state.
- it is only once from the unseparated in the
- Such an optoelectronic semiconductor chip is, for example, to a predetermined supply voltage
- the semiconductor function region comprises an active zone suitable for generating radiation or for
- LED function regions which emit electromagnetic radiation, in particular visible, ultraviolet and / or infrared light, are provided in an LED chip.
- an emitting semiconductor function region is also referred to as a pixel.
- An LED chip can comprise several pixels.
- Switchable pixels can be connected downstream of an arrangement with several pixels. Such an arrangement can be
- Arrangements are also referred to as high-voltage LEDs.
- the conductor pattern is connected in parallel with the first semiconductor function region. If the ladder structure is not broken, this is
- Semiconductor function range is ready for operation.
- the ladder structure connects the second and the third terminal.
- the ladder structure includes one between the first terminal and the connecting portion extending first branch, which is separable or separated, and a extending between the connecting portion and the fourth terminal ' second branch, which is separable or separated formed.
- Branches extending to the second or third terminal also include branches which run to the connection area, because the latter is connected to the terminals.
- An unruptured branch is an electrically conductive connection, for example between terminals and / or a region of the contact structure.
- the branch may comprise a plurality of electrically conductive, interconnected regions of the contact structure or of the conductor structure.
- a severed branch has a region in which an insulation structure prevents the electrical conductivity between the terminals and / or the region of the contact structure.
- the first and second branches have a common area that is separable or separate. This comb-shaped structure simplifies the design. In one embodiment is a second
- the conductor structure comprises a first branch extending between the first and the third terminal, which is separable or separated, and a between the second and the fourth terminal extending second branch, which is separable or separated formed, and extending between the second and the third terminal third branch, which is separable or separated formed.
- Branched branches both semiconductor function areas are disabled. When only the third branch is split, the semiconductor function regions are connected in parallel. When only the first and second branches are split, the semiconductor regions are connected in series. If only the first or the second branch is split, only one of the semiconductor function areas is switched on.
- Semiconductor functional area still provided a plurality of series-connected semiconductor conductor functional areas that are ready for operation before separating the conductor structure. "Ready” means that when creating a
- One method is to adapt a contact structure for electrical contacting of the optoelectronic
- Semiconductor chips comprises a first
- the method includes an operating current path that passes through the first terminal of the
- the method comprises the conductor structure, which connects the first terminal to the second terminal and short circuits the semiconductor functional area, so that when the conductor structure is split, an operating current path is defined via the first terminal of the semiconductor functional area and the second terminal.
- the method can be used for a semiconductor chip in which a second semiconductor functional area, which has a third and a fourth terminal, is also provided.
- a connection area of the contact structure connects the second and third terminals.
- the conductor structure comprises a first terminal and the connection area electrically
- the first branch can be split, so that the first
- the second branch can be split so that the second
- Semiconductor functional area is switched on, or it can be separated, the first and the second branch, so that both semiconductor functional areas are connected in series.
- the adapting method is applicable to a contact structure for a semiconductor chip in which a second semiconductor function region having a third and a fourth terminal is also provided, wherein the conductor pattern electrically connects the first and the third terminals
- connecting the first branch and a second branch connecting the second and the fourth terminal and one the second and the third terminal connecting third branch comprises. If only the third branch is split, the
- Semiconductor function range is put into a ready state.
- the second semiconductor function area is set to a ready state. If only the first and the second branch are split, the two are
- Conductor structure are separated such that the difference between the total voltage and a given voltage
- the forward voltage of the semiconductor function regions may be subject to process variations occurring during manufacturing, so that it may be difficult to provide a predetermined one
- Circuitry known pre-circuiting of resistors which associated with a conversion of electrical power into heat and lowered the efficiency of the component to control the target voltage is not required. This allows a more compact design.
- Conductor structure done by means of a laser.
- the separation can be done by a lithographic process
- Minimum current may be accompanied by damage to the pixels if the current flow is too high.
- the separable conductor structure areas are intended to be deliberately burned through an increased current flow compared to normal operation.
- FIG. 1 schematically shows an embodiment of the invention
- FIG. 2 schematically shows a further exemplary embodiment of the arrangement of a contact structure for a
- FIG. 3 schematically shows a further exemplary embodiment of the arrangement of a contact structure for a
- FIG. 4 schematically shows a further exemplary embodiment of the arrangement of a contact structure for a
- FIGS. 5A to 5C show schematically the production of the
- FIG. 1 schematically shows an exemplary embodiment of the arrangement of a contact structure for an optoelectronic semiconductor chip having a plurality of
- the semiconductor chip is an integrated circuit having a plurality of
- Semiconductor function regions 2 which are arranged on a common carrier 3.
- the semiconductor function regions 2 are arranged on the carrier 3 in such a way that they are aligned on a lattice-shaped grid.
- the semiconductor function regions 2 can be provided on a common carrier in the aferverbund.
- Semiconductor layer sequence in particular the active zone, is preferably based on a III-V semiconductor material, for example In x Ga y Al 1 -x - y P, and is suitable for LED chips
- the semiconductor chip comprises modular components with semiconductor functional areas, which are arranged on a carrier and are optionally at least partially enclosed by a housing.
- the semiconductor regions 2 have an active layer which emits electromagnetic radiation, preferably ultraviolet, visible and / or infrared light.
- These semiconductor function regions 2 serve as LEDs
- a contact structure 4 is provided for electrically contacting the optoelectronic semiconductor chip 1.
- Contact structure comprises a first contact 51 and a second contact 52 to which a supply voltage for the semiconductor chip can be applied, with which the
- Semiconductor function areas 2 are supplied during operation of the semiconductor chip.
- the semiconductor functional areas 2 comprise a group of operational semiconductor functional areas 20 as well as a first and a second switchable one
- Supply voltage to the contacts 51, 52 from a voltage, preferably a voltage sufficient for the operation of the semiconductor functional areas voltage, so that light from these
- Semiconductor function regions 20 is emitted.
- no voltage is applied across the switchable semiconductor function regions 21, 22 when a supply voltage is applied to the contacts 51, 52.
- the semiconductor function regions 21, 22 are short-circuited in the initial state, so that they do not emit radiation.
- the contact structure 4 is electrically conductive with the ready for operation and switchable
- the contact structure 4 comprises metal conductor tracks.
- the contact structure includes conductive layers that may extend in different levels of integrated circuitry.
- the operational semiconductor functional areas 20 are connected in series by connection areas 40 of the contact structure
- connection regions 40 meander between the columns of the operational semiconductor functional regions 20.
- the first and second switchable semiconductor functional regions 21, 22 are connected in series with the operational semiconductor functional regions 20.
- Semiconductor functional area 21 has first and second terminals 211, 212. Third and fourth terminals 223, 224 are provided on the second switchable semiconductor function area 22. In this embodiment, a first region 41 of the contact structure connects in series
- a second area 42 of the contact structure connects the second terminal 212 of the first switchable semiconductor function area 21 to the third terminal 223 on the second switchable one
- a third region 43 of the contact structure connects the fourth terminal 224 to the second switchable semiconductor function region 22 with the second contact 52nd
- the contact structure 4 further comprises a conductor structure, which in the initial state, the first and the second switchable
- a first arm 71 connects the first region 41 and the second region 42 of the contact structure, so that between the first and second terminals 221, 212 of the first switchable
- a second arm 72 connects the second region 42 and the third region 43 of the contact structure, so that between the third and fourth terminals 223, 224 of the second
- the first and second switchable semiconductor function regions 21, 22 become the first and second branches
- the arms 71, 72 are conductor tracks. In one embodiment, they are structured semiconductor layer regions. "Separable" means that, for example, a part of the conductor structure is removed, so that an insulation structure is formed. This can be an insulating gap in the conductor structure.
- the corresponding semiconductor function region 21, 22 is thus put into an operational state, so that it is light when a supply voltage is applied
- Reference numerals 61, 62 indicate possible locations of the branches which can be separated.
- a forward voltage is required.
- the total flux voltage for operating a series connection of semiconductor functional areas 20 results as the sum of the individual forward voltages or, assuming that all
- Semiconductor function regions have the same forward voltage, as a product of the number of semiconductor operating regions 20 and the flux voltage. It can, depending on the number of
- Semiconductor function areas each of which acts as an LED or pixel, for example 12V, 24V or 230V. They are therefore also called high-voltage LEDs.
- the supply voltage which is applied to the semiconductor chip, advantageously coincides with the total flow voltage or is tuned to it. Owing to
- Flux voltages of semiconductor functional areas vary. This leads to deviations of the total forward voltage from a predetermined voltage with which the semiconductor chip is to be operated. Due to the process fluctuations is it is difficult to accurately set the flux voltages of the semiconductor regions. A subsequent adaptation in a final manufacturing step allows the change in the total voltage. Thus, the provision allows
- first and / or second arm 71, 72 By separating the first and / or second arm 71, 72 is an adjustment of the total flux voltage to the predetermined supply voltage, for example in a final manufacturing step, possible. By separating the first or second arms 71, 72, the total flux voltage around the
- Semiconductor function range 21, 22 are increased. In one embodiment, the forward voltages of the first and second semiconductor function regions 21, 22 are different. In one embodiment, they differ
- Semiconductor function areas 21, 22 ready. If these are not activated, the deactivating semiconductor functional areas are lost unused.
- Semiconductor function areas are used to adjust the brightness of the semiconductor chip. By activating the
- switchable semiconductor functional areas the number of semiconductor functional areas that emit radiation is increased, so that this approach allows brightness control.
- Customizing the contact structure may be as final
- FIG. 2 schematically shows a further exemplary embodiment of the arrangement of a contact structure for a
- the semiconductor chip comprises an integrated circuit mi with a plurality of semiconductor functional areas 2, which are arranged on a common carrier 3.
- Semiconductor function regions 2 are arranged aligned on a lattice-shaped grid on the support 3.
- Semiconductor regions 2 include series-connected semiconductor functional regions 20. Furthermore, switchable semiconductor functional areas 21, 22, 23 are provided. The first switchable
- Semiconductor functional area 21 has first and second terminals 211, 212.
- Semiconductor function area 22 has a third and a fourth terminal 223, 224.
- Semiconductor function area 23 has a fifth and a sixth terminal 235, 236.
- a first region 41 of the contact structure connects the series-connected operational ones
- a second region 42 of the contact structure is electrically connected to the second terminal 212 of the first semiconductor function region 21 and the third terminal 223 on the second semiconductor function region 22.
- a third region 43 of the contact structure is electrically conductively connected to the fourth terminal 224 at the second semiconductor function region 22 and the fifth terminal 235 at the third semiconductor function region 23.
- a fourth region 44 of the contact structure is electrically connected to the sixth terminal 236 at the third semiconductor function region 23.
- the fourth region 44 of the contact structure extends next to the switchable semiconductor functional regions 21, 22, 23 and is connected to the second contact 52 in an electrically conductive manner.
- a conductor structure comprises a first arm 81, which connects the fourth region 44 of the contact structure to the first region 41 of the contact structure.
- a second arm 82 connects the fourth area 44 to the second area 42 of FIG.
- a third arm 83 connects the fourth region 44 of the contact structure to the third region 43 of the contact structure.
- the next to the switchable Semiconductor regions 21, 22, 23 extending fourth portion of the contact structure and the arms 81, 82, 83 have a comb-shaped structure.
- the first switchable semiconductor function region 21 is short-circuited by a branch extending from the first terminal 211 via the first region 41, the first arm 81, the fourth region 44, the second arm 82, and the second region 42 to the second terminal 212.
- Semiconductor function region 23 is by a branch
- Semiconductor function regions 21, 22, 23 are short-circuited so that no or almost vanishing voltage drops across them.
- the total voltage depends on the separation of the
- the first switchable semiconductor function region 21 is activated when the first arm 81 is disconnected, so that the short circuit is canceled.
- the fourth region 44 of the contact structure is electrically separated from the first region 41.
- FIG. 1 shows a possible separation point 61, at which the first arm 81 can be separated.
- a suitable separating station electrically separates the first terminal 211 from the second terminal 212 and from the fourth
- Supply voltage is a voltage above the first
- the separation can be done by ablating part of the
- the second semiconductor functional region 22 can be activated if the second arm 82 is likewise split such that the short circuit of the second semiconductor functional region 22
- a suitable separation point electrically separates the third terminal 223 from the fourth terminal 224 and the fourth region 44 of the contact structure, so that when the supply voltage is applied, a voltage across the second semiconductor function region 22 also drops.
- the third semiconductor function region 23 can be activated when the third arm 83 is cut so that the short circuit of the third semiconductor function region 23 is canceled.
- the fourth region 44 of the contact structure of the third region 43 is electrically
- FIG. 1 an exemplary separation point 63 is identified.
- FIG. 2 shows, by way of example, an arrangement in which up to three semiconductor functional areas are already connected
- operational semiconductor functional areas 20 are switchable.
- the contact structure is separated so that a switchable semiconductor function area is activated. If the total flux voltage is lower than the supply voltage by approximately a multiple of the forward voltage of a semiconductor functional area, then the contact structure is split so that a multiple number of switchable semiconductor functional areas is activated.
- FIG. 3 schematically shows a further exemplary embodiment of the arrangement of a contact structure for a
- the optoelectronic semiconductor chip having a plurality of semiconductor functional areas.
- the semiconductor function regions 2 are arranged aligned on a lattice-shaped grid on the carrier 3.
- Semiconductor functional areas include series-connected operational semiconductor functional areas 20. An arrangement with a first and a second connectable semiconductor functional area 21, 22 is connected downstream of this.
- the first switchable semiconductor functional area 21 has first and second terminals 211, 212.
- Semiconductor function area 22 has third and fourth terminals 223, 224.
- a first region 41 of the contact structure connects the operational semiconductor functional areas 20 and the first terminal 211 of the first switchable one
- a second region 42 of the contact structure connects the second contact 52 and the fourth terminal 224 to the second connectable one
- the separable conductor structure comprises first, second and third arms 91, 92, 93.
- the second terminal 212 on the first semiconductor function region 21 is connected to the third semiconductor region 22 via a third arm 93.
- a first arm 91 connects the first region 41 of the contact structure to the third arm 93. Thus, a first one extends
- the first branch short-circuits the first semiconductor functional area 21.
- the second branch short-circuits the second semiconductor function region 22.
- Semiconductor function areas 21, 22 can be activated so that these semiconductor function areas are connected in series, or so that they are connected in parallel.
- the first switchable semiconductor function region 21 is no longer short-circuited.
- the second semiconductor functional area '22 remains shorted. If only the second arm 92 is split, the second is switchable
- the first arm 91 is separated, for example, at the point 61. This is the first switchable
- only the third arm 93 can be separated, so that both semiconductor functional areas are activated, but are connected in parallel.
- Total voltage only increases by the Flux voltages decreasing at the parallel connection of the first and second semiconductor function regions 21, 22, which is lower than in a series connection of the two.
- the light is from the two parallel connected
- FIG. 4 shows such an arrangement with a plurality of semiconductor functional areas 20 attached to a grid
- the semiconductor function regions 20 each have a first and a second terminal 201, 202. In this embodiment, one of the
- a contact structure 4 comprises contacts 51, 52 and cell-shaped, elongated areas 40 extending between the semiconductor functional areas 20. Above a row of
- Semiconductor function regions 20 extends in each case an elongated region 40, for example a conductor track, which is connected to one of the contacts 51, 52. Below one row extends in each case an elongate region 40, which is connected to the other of the contacts 51, 52.
- the first terminals 201 of the semiconductor function region 20 are connected via first arms 401 to the cell-shaped regions 40 which are connected to the second contact 52.
- the second terminals 202 are connected via second arms 402 to the cell-shaped areas 40 which are connected to the first contact 51, so that the
- Semiconductor function areas 20 are connected in parallel.
- the defective semiconductor functional area 24 there is no conductive connection between its first and second terminals 241, 242 and the respectively adjacent cell-shaped areas 40 of the contact structure.
- the chip functional although individual pixels 24 are selectively deactivated by an isolation structure between their terminals 241, 242 and the remaining areas of the contact structure 4 is present.
- the selective switching off of defective pixels 24 allows large-area chips to be produced with a plurality of semiconductor functional areas.
- Semiconductor function regions 24 which have been characterized as defective may be deactivated in one of the last production steps. Switching off can thereby the
- the chip can be self-correcting: in the case of a short circuit in a pixel, the high current flow which occurs as a result causes the electrical connections to this pixel to be cut off. This effect is similar to a fuse.
- FIGS. 5A to 5C show the targeted elimination of semiconductor functional areas during production.
- the detection can be carried out, for example, by means of optical inspection or by applying a voltage through test needles. This step can be done in the Waververbund, if not yet
- FIG. 5A shows an intermediate product in which the
- the intermediate product comprises semiconductor functional regions 20, 24 and a part of the
- the cell-shaped portions 40 are applied, which connect the first arms 401 and in turn are connected to the second contact 52.
- the arms on which the insulating material 65 has been applied there is no electrically conductive connection between the first terminal 241 of the semiconductor functional areas 24 and the cellular area 40 of the contact structure, so that this semiconductor area 24 is not ready for operation. Due to the targeted elimination of this pixel 24, the function of the other is largely unaffected, which is a high
- an insulating material 65 is provided between the second arm on the defective semiconductor function region 24 and the cell-shaped region 40.
- Circuit arrangement can be combined. It is conceivable that in a circuit arrangement both switched on or switchable semiconductor functional areas as well as switched off or switched off
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Led Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Led Device Packages (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102009047889A DE102009047889A1 (de) | 2009-09-30 | 2009-09-30 | Optoelektronischer Halbleiterchip und Verfahren zum Anpassen einer Kontaktstruktur zur elektrischen Kontaktierung eines optoelektronischen Halbleiterchips |
PCT/DE2010/001077 WO2011038708A1 (de) | 2009-09-30 | 2010-09-10 | Optoelektronischer halbleiterchip und verfahren zum anpassen einer kontaktstruktur zur elektrischen kontaktierung eines optoelektronischen halbleiterchips |
Publications (1)
Publication Number | Publication Date |
---|---|
EP2483923A1 true EP2483923A1 (de) | 2012-08-08 |
Family
ID=43466829
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP10763590A Withdrawn EP2483923A1 (de) | 2009-09-30 | 2010-09-10 | Optoelektronischer halbleiterchip und verfahren zum anpassen einer kontaktstruktur zur elektrischen kontaktierung eines optoelektronischen halbleiterchips |
Country Status (8)
Country | Link |
---|---|
US (1) | US20120299049A1 (de) |
EP (1) | EP2483923A1 (de) |
JP (1) | JP2013506305A (de) |
KR (1) | KR20120091132A (de) |
CN (1) | CN102549746B (de) |
DE (1) | DE102009047889A1 (de) |
TW (1) | TWI475659B (de) |
WO (1) | WO2011038708A1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011078620A1 (de) * | 2011-07-04 | 2013-01-10 | Osram Ag | Hochvolt-LED-Multichip-Modul und Verfahren zur Einstellung eines LED-Multichip-Moduls |
FR3053761A1 (fr) * | 2016-07-05 | 2018-01-12 | Valeo Vision | Dispositif d’eclairage et/ou de signalisation pour vehicule automobile |
US10043956B2 (en) | 2016-09-29 | 2018-08-07 | Nichia Corporation | Method for manufacturing light emitting device |
JP6504221B2 (ja) * | 2016-09-29 | 2019-04-24 | 日亜化学工業株式会社 | 発光装置の製造方法 |
DE102018111175A1 (de) * | 2018-05-09 | 2019-11-14 | Osram Opto Semiconductors Gmbh | Pixel, Multipixel-LED-Modul und Herstellungsverfahren |
DE102018111174A1 (de) * | 2018-05-09 | 2019-11-14 | Osram Opto Semiconductors Gmbh | Verfahren zum Ersetzen eines ersten Chips eines Mehrpixel-LED-Moduls |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
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US5100829A (en) * | 1989-08-22 | 1992-03-31 | Motorola, Inc. | Process for forming a semiconductor structure with closely coupled substrate temperature sense element |
JPH04123326A (ja) * | 1990-09-14 | 1992-04-23 | Mitsubishi Electric Corp | 光学式ヘッド装置 |
US5550782A (en) * | 1991-09-03 | 1996-08-27 | Altera Corporation | Programmable logic array integrated circuits |
US5258668A (en) * | 1992-05-08 | 1993-11-02 | Altera Corporation | Programmable logic array integrated circuits with cascade connections between logic modules |
JP3354317B2 (ja) * | 1994-10-14 | 2002-12-09 | 三洋電機株式会社 | 表示装置 |
JPH08137413A (ja) * | 1994-11-08 | 1996-05-31 | Hitachi Ltd | 半導体発光素子表示装置 |
GB2381380B (en) | 1997-11-19 | 2003-06-18 | Unisplay Sa | LED lamp |
DE10142654A1 (de) * | 2001-08-31 | 2003-04-03 | Osram Opto Semiconductors Gmbh | Sicherungsbauelement mit optischer Anzeige |
JP2004179481A (ja) * | 2002-11-28 | 2004-06-24 | T S Tec Kk | 発光装置および発光ダイオードの接続方法 |
JP2004253676A (ja) * | 2003-02-21 | 2004-09-09 | Takion Co Ltd | 半導体集積回路、ledランプ装置、半導体集積回路のトリミング及びledランプ装置のトリミング方法 |
JP4159445B2 (ja) * | 2003-10-23 | 2008-10-01 | 三菱電機株式会社 | ダイオード直列冗長回路 |
DE102004025684A1 (de) * | 2004-04-29 | 2005-11-17 | Osram Opto Semiconductors Gmbh | Optoelektronischer Halbleiterchip und Verfahren zum Ausbilden einer Kontaktstruktur zur elektrischen Kontaktierung eines optoelektronischen Halbleiterchips |
JP5099661B2 (ja) * | 2005-10-28 | 2012-12-19 | 株式会社寺田電機製作所 | Led駆動回路およびled駆動方法 |
WO2007093938A1 (en) * | 2006-02-14 | 2007-08-23 | Koninklijke Philips Electronics N.V. | Current driving of leds |
JP5188690B2 (ja) * | 2006-08-29 | 2013-04-24 | アバゴ・テクノロジーズ・イーシービーユー・アイピー(シンガポール)プライベート・リミテッド | Ledを駆動するための装置及び方法 |
-
2009
- 2009-09-30 DE DE102009047889A patent/DE102009047889A1/de not_active Withdrawn
-
2010
- 2010-09-10 KR KR1020127010783A patent/KR20120091132A/ko not_active Application Discontinuation
- 2010-09-10 US US13/497,733 patent/US20120299049A1/en not_active Abandoned
- 2010-09-10 EP EP10763590A patent/EP2483923A1/de not_active Withdrawn
- 2010-09-10 WO PCT/DE2010/001077 patent/WO2011038708A1/de active Application Filing
- 2010-09-10 JP JP2012531236A patent/JP2013506305A/ja active Pending
- 2010-09-10 CN CN201080044052.9A patent/CN102549746B/zh not_active Expired - Fee Related
- 2010-09-13 TW TW099130842A patent/TWI475659B/zh not_active IP Right Cessation
Non-Patent Citations (1)
Title |
---|
See references of WO2011038708A1 * |
Also Published As
Publication number | Publication date |
---|---|
TW201117344A (en) | 2011-05-16 |
TWI475659B (zh) | 2015-03-01 |
JP2013506305A (ja) | 2013-02-21 |
DE102009047889A1 (de) | 2011-03-31 |
CN102549746B (zh) | 2015-08-19 |
KR20120091132A (ko) | 2012-08-17 |
US20120299049A1 (en) | 2012-11-29 |
WO2011038708A1 (de) | 2011-04-07 |
CN102549746A (zh) | 2012-07-04 |
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