EP2467943A1 - Radio frequency power amplifier with linearizing predistorter - Google Patents
Radio frequency power amplifier with linearizing predistorterInfo
- Publication number
- EP2467943A1 EP2467943A1 EP09848548A EP09848548A EP2467943A1 EP 2467943 A1 EP2467943 A1 EP 2467943A1 EP 09848548 A EP09848548 A EP 09848548A EP 09848548 A EP09848548 A EP 09848548A EP 2467943 A1 EP2467943 A1 EP 2467943A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- mosfet
- amplifier
- predistorter
- terminal
- voltage signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 230000004044 response Effects 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 10
- 230000005669 field effect Effects 0.000 claims description 3
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 230000008878 coupling Effects 0.000 description 11
- 238000010168 coupling process Methods 0.000 description 11
- 238000005859 coupling reaction Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 8
- 239000003990 capacitor Substances 0.000 description 4
- 230000001413 cellular effect Effects 0.000 description 2
- 230000007850 degeneration Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/24—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages
- H03F3/245—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers of transmitter output stages with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0261—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3205—Modifications of amplifiers to reduce non-linear distortion in field-effect transistor amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3241—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits
- H03F1/3276—Modifications of amplifiers to reduce non-linear distortion using predistortion circuits using the nonlinearity inherent to components, e.g. a diode
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
- H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
- H03F3/082—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
- H03F3/193—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/18—Indexing scheme relating to amplifiers the bias of the gate of a FET being controlled by a control signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/408—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising three power stages
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2200/00—Indexing scheme relating to amplifiers
- H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/02—Transmitters
- H04B1/04—Circuits
- H04B2001/0408—Circuits with power amplifiers
- H04B2001/0425—Circuits with power amplifiers with linearisation using predistortion
Definitions
- Radio frequency (RF) transmitters such as those included in mobile wireless telephone handsets (also referred to as cellular telephones) and other portable radio transceivers, generally include a power amplifier.
- the power amplifier is typically the final stage of the transmitter circuitry.
- achieving linear power amplification is of great importance.
- various factors can hamper linear operation.
- the relatively large signal that such a mixer typically outputs can drive the power amplifier into nonlinear operation.
- Increasing power amplifier current is one technique for promoting linear operation in such a transmitter, but it does not work well in all instances.
- the power amplifier 10 typically comprises several amplifier driver stages or sections 12, 14, 16, etc., at least one of which, such as amplifier driver stage 14, comprises a transconductance (G m ) amplifier that outputs a radio frequency (RF) current signal 18 (I_OUT) in response to an RF input voltage signal 20 (V_IN).
- the gain of power amplifier 10 can be controlled by controlling the bias voltage signal 22 (V_BIAS), which is provided via an RF choke 24.
- V_BIAS bias voltage signal 22
- circuitry in the mobile wireless telephone handset generates bias voltage signal 22 in response to various operating conditions that require adjusting transmitter output power.
- the transconductance amplifier transistor 26 is typically a metal oxide semiconductor field-effect transistor (MOSFET) arranged in a circuit in a common-source configuration.
- the RF input voltage signal 20 is coupled to the gate of transistor 26 via a coupling capacitor 28.
- Current source circuitry that is coupled to transistor 26 is not shown for purposes of clarity but is indicated by the ellipsis ("!) symbol.
- MOSFET when driven by a relatively large signal, produces a nonlinear current signal 18 as a result of transistor effects such as mobility degradation, velocity saturation, and nonlinearity of the input capacitance. It is known to design transconductance amplifiers to operate at increased current levels in an attempt to meet noise performance requirements and to some extent promote linear operation.
- degeneration can be combined with the above-described increased current technique to further promote linearity, but degeneration hampers the use of bias voltage signal 22 as an amplifier gain control. Also, increasing current in a mobile wireless telephone handset power amplifier tends to more quickly drain the battery.
- Embodiments of the invention relate to a power amplifier circuit comprising an amplifier MOSFET and a predistorter MOSFET.
- the amplifier MOSFET has a gate terminal coupled to a first bias voltage and coupled to an input voltage signal via a linear coupling capacitance. (The term “coupled” as used herein means connected via zero or more intermediate elements.)
- the amplifier MOSFET source and drain terminals, which provide the amplifier output current signal, are coupled to a reference voltage, such as ground or a supply voltage, and a current source or sink.
- the predistorter MOSFET is connected between the gate terminal of the amplifier MOSFET and a second bias voltage signal.
- the source and drain terminals of the predistorter MOSFET are connected together so that it provides a nonlinear capacitance at the gate terminal of the amplifier MOSFET.
- the gate-source voltage of the amplifier MOSFET is the input voltage signal capacitively divided between the input linear coupling capacitance and the combined non- linear capacitances of the amplifier MOSFET and predistorter MOSFET.
- the gate-source voltage of the amplifier MOSFET is nonlinear or predistorted. This predistortion promotes cancellation of the distortion or nonlinearity contributed by the amplifier MOSFET.
- FIG. 1 is a block diagram of a known power amplifier system having at least one transconductance stage.
- FIG. 2 is a schematic diagram of a portion of a transconductance stage of the power amplifier system of FIG. 1.
- FIG. 3 is a schematic diagram of a portion of a transconductance stage of a power amplifier system in accordance an exemplary embodiment of the present invention.
- FIG. 4 is a schematic diagram of a portion of a transconductance stage of a power amplifier system in accordance with another exemplary embodiment of the present invention.
- FIG. 5 is a schematic diagram of a portion of a transconductance stage of a power amplifier system in accordance with still another exemplary embodiment of the present invention.
- FIG. 6 is a schematic diagram of a portion of a transconductance stage of a power amplifier system in accordance with yet another exemplary embodiment of the present invention.
- FIG. 7 is a graph showing improvement in transconductance amplifier linearity.
- FIG. 8 is a block diagram of a mobile wireless telephone handset having a power amplifier system in accordance with an exemplary embodiment of the present invention.
- FIG. 9 is a block diagram of the transmitter portion of the mobile wireless telephone handset of FIG. 7.
- an amplifier circuit 30 which can be included in, for example, a transconductance (g m ) stage of an RF power amplifier of the type commonly included in some types of mobile wireless telephone handsets, outputs an RF current signal 32 (I_OUT) in response to an RF input voltage signal 34 (V_IN).
- Amplifier circuit 30 includes an amplifier MOSFET 36 and a predistorter MOSFET 38.
- amplifier MOSFET 36 is an n-channel (NMOS) device
- predistorter MOSFET 38 is a p-channel (PMOS) device.
- the gate terminal of amplifier MOSFET 36 is coupled to a first bias voltage signal 40 (V_BIAS) via an RF choke 42.
- the gate terminal of amplifier MOSFET 36 is also coupled to input voltage signal 34 via a linear coupling capacitance 44.
- the source terminal of amplifier MOSFET 36 is connected to ground.
- the drain terminal of amplifier MOSFET 36 is connected to current source circuitry, which is not shown for purposes of clarity but is indicated by the ellipsis (" --) symbol.
- Predistorter MOSFET 38 is connected between the gate terminal of amplifier MOSFET 36 and a second bias voltage signal 46 (V_BIAS_PMOS) such that the gate terminal of predistorter MOSFET 38 is connected to the gate terminal of amplifier MOSFET 36, and the source and drain terminals of predistorter MOSFET 38 are connected to second bias voltage signal 46.
- V_BIAS_PMOS second bias voltage signal 46
- Second bias voltage signal 46 and the size of predistorter MOSFET 38 are selected so that the combination of the nonlinear capacitance of predistorter MOSFET 38 and the non-linear capacitance of amplifier MOSFET 36 defines a capacitance that behaves inversely to the manner in which the input capacitance of amplifier MOSFET 36 alone behaves. Note, however, that the nonlinear capacitance of predistorter 38 does not simply cancel out the nonlinear capacitance of amplifier MOSFET 36. Rather, gate-source voltage of amplifier MOSFET 36 is the input voltage signal 34 capacitively divided between linear coupling capacitance 44 and the combined nonlinear capacitances of predistorter MOSFET 38 and amplifier MOSFET 36. As a result, the gate-source voltage of amplifier MOSFET 36 is nonlinear or predistorted. The predistortion cancels out the distortion or nonlinearity of amplifier MOSFET 36. The effect can be better understood with reference to the following equations.
- V_GS 26 V_IN * [C 28 / (C 28 + C 26G G)],
- V_GS 3 ⁇ 4 is the gate-source voltage of amplifier MOSFET 26
- C 28 is the capacitance of coupling capacitor 28
- C 26GG is the capacitance of amplifier MOSFET 26 at its gate terminal
- Gm 26 is the transconductance of amplifier MOSFET 26
- Gm eff is the effective transconductance of amplifier driver stage 14.
- Gm eff is the effective transconductance of amplifier circuit 30.
- predistorter MOSFET 38 and the value of second bias voltage 46 that results in the greatest reduction in nonlinear operation of amplifier circuit 30 and results in the total nonlinear capacitance of predistoter MOSFET 38 and the total nonlinear capacitance of amplifier MOSFET 36 being similar to each other can be determined empirically or by any other suitable means.
- Empirical evaluations can be made through circuit simulations, i.e., modeling the circuit through software means on a suitable workstation computer (not shown), using commonly available simulator software.
- second bias voltage 46 and the length and width of predistorter MOSFET 38 can be swept through ranges of values with respect to one another, and how linearly or nonlinearly amplifier circuit 30 behaves in response can be observed and the optimal values noted.
- amplifier MOSFET 36 could be 4.80 micrometers wide and 0.24 micrometers long; predistorter MOSFET 38 could be 6.72 micrometers wide and 0.24 micrometers long; and second bias voltage 46 could be 650 millivolts.
- First bias voltage 40 can be, for example, 1.1 volts.
- Amplifier circuit 48 which can be included in, for example, a transconductance (g m ) stage of an RF power amplifier of the type commonly included in some types of mobile wireless telephone handsets, outputs an RF current signal 50 (I_OUT) in response to an RF input voltage signal 52 (V_IN).
- Amplifier circuit 48 includes an amplifier MOSFET 54 and a predistorter MOSFET 56.
- amplifier MOSFET 54 is a p-channel (PMOS) device
- predistorter MOSFET 56 is an n-channel (NMOS) device.
- the gate terminal of amplifier MOSFET 54 is coupled to a first bias voltage signal 58 (V_BIAS) via an RF choke 60.
- the gate terminal of amplifier MOSFET 54 is also coupled to input voltage signal 52 via a linear coupling capacitance 62.
- the source terminal of amplifier MOSFET 54 is connected to a supply voltage (VCC).
- the drain terminal of amplifier MOSFET 54 is connected to a current sink circuit, which is not shown for purposes of clarity but is indicated by the ellipsis (" --) symbol.
- Predistorter MOSFET 56 is connected between the gate terminal of amplifier MOSFET 54 and a second bias voltage signal 64 (V_BIAS_NMOS) such that the gate terminal of predistorter MOSFET 56 is connected to the gate terminal of amplifier MOSFET 54, and the source and drain terminals of predistorter MOSFET 56 are connected to second bias voltage signal 64.
- V_BIAS_NMOS second bias voltage signal 64
- Second bias voltage signal 64 and the size of predistorter MOSFET 56 are selected so that the combination of the nonlinear capacitance of predistorter MOSFET 56 and the non-linear capacitance of amplifier MOSFET 54 defines a capacitance that behaves inversely to the manner in which the input capacitance of amplifier MOSFET 54 alone behaves.
- the predistortion cancels out the distortion or nonlinearity of amplifier MOSFET 54.
- Amplifier circuit 66 which can be included in, for example, a transconductance (g m ) stage of an RF power amplifier of the type commonly included in some mobile wireless telephone handsets, outputs an RF current signal 68 (I_OUT) in response to an RF input voltage signal 70 (V_IN).
- Amplifier circuit 66 includes an amplifier MOSFET 72 and a predistorter MOSFET 74.
- amplifier MOSFET 72 is an n-channel (NMOS) device
- predistorter MOSFET 74 is an n-channel (NMOS) device.
- the gate terminal of amplifier MOSFET 72 is coupled to a first bias voltage signal 76 (V_BIAS) via an RF choke 78.
- the gate terminal of amplifier MOSFET 72 is also coupled to input voltage signal 70 via a linear coupling capacitance 80.
- the source terminal of amplifier MOSFET 72 is connected to ground.
- the drain terminal of amplifier MOSFET 72 is connected to a current source circuit, which is not shown for purposes of clarity but is indicated by the ellipsis (" --) symbol.
- the source and drain terminals of predistorter MOSFET 74 are connected together, thereby effectively defining a (nonlinear) capacitance.
- Predistorter MOSFET 74 is connected between the gate terminal of amplifier MOSFET 72 and a second bias voltage signal 82 (V_BIAS_NMOS) such that the gate terminal of predistorter MOSFET 74 is connected to second bias voltage signal 82, and the source and drain terminals of predistorter MOSFET 74 are connected to the gate terminal of amplifier MOSFET 72.
- This biasing of predistorter MOSFET 74 causes it to provide a nonlinear capacitance at the gate terminal of amplifier MOSFET 72.
- Second bias voltage signal 82 and the size of predistorter MOSFET 74 are selected so that the combination of the nonlinear capacitance of predistorter MOSFET 74 and the non-linear capacitance of amplifier MOSFET 72 defines a capacitance that behaves inversely to the manner in which the input capacitance of amplifier MOSFET 72 alone behaves. The predistortion cancels out the distortion or nonlinearity of amplifier MOSFET 72.
- Gm 36 is the transconductance of amplifier MOSFET 36
- V_GS 36 is the gate-source voltage of amplifier MOSFET 36
- C 44 is the linear capacitance of coupling capacitor 44
- C 72GG is the nonlinear capacitance of amplifier MOSFET 72 at its gate terminal
- C 74DD is the nonlinear capacitance of predistorter MOSFET 36 at its drain terminal
- C 74 ss is the nonlinear capacitance of predistorter MOSFET 38 at its source terminal
- Gm eff is the effective transconductance of amplifier circuit 66.
- Amplifier circuit 84 which can be included in, for example, a transconductance (g m ) stage of an RF power amplifier of the type commonly included in some types of mobile wireless telephone handsets, outputs an RF current signal 86 (I_OUT) in response to an RF input voltage signal 88 (V_IN).
- Amplifier circuit 84 includes an amplifier MOSFET 90 and a predistorter MOSFET 92.
- amplifier MOSFET 90 is an p-channel (PMOS) device
- predistorter MOSFET 92 is an p-channel (PMOS) device.
- the gate terminal of amplifier MOSFET 90 is coupled to a first bias voltage signal 94 (V_BIAS) via an RF choke 96.
- the gate terminal of amplifier MOSFET 90 is also coupled to input voltage signal 88 via a linear coupling capacitance 98.
- the source terminal of amplifier MOSFET 90 is connected to a supply voltage (VCC).
- the drain terminal of amplifier MOSFET 90 is connected to a current drain circuit, which is not shown for purposes of clarity but is indicated by the ellipsis (" --) symbol.
- Predistorter MOSFET 92 is connected between the gate terminal of amplifier MOSFET 90 and a second bias voltage signal 100 (V_BIAS_PMOS) such that the gate terminal of predistorter MOSFET 92 is connected to second bias voltage signal 100, and the source and drain terminals of predistorter MOSFET 92 are connected to the gate terminal of amplifier MOSFET 90.
- V_BIAS_PMOS second bias voltage signal 100
- This biasing of predistorter MOSFET 92 causes it to provide a nonlinear capacitance at the gate terminal of amplifier MOSFET 90.
- Second bias voltage signal 100 and the size of predistorter MOSFET 92 are selected so that the combination of the nonlinear capacitance of predistorter MOSFET 92 and the non-linear capacitance of amplifier MOSFET 90 defines a capacitance that behaves inversely to the manner in which the input capacitance of amplifier MOSFET 90 alone behaves. The predistortion cancels out the distortion or nonlinearity of amplifier MOSFET 90.
- FIG. 7 Improved linearity in a transconductance amplifier of the type described above is illustrated in FIG. 7.
- the transconductance (Gm) 99 that is generally characteristic of a prior amplifier circuit of the type shown in FIG. 2 is nonlinear, whereas the effective transconductance (Gm eff ) 101 that is generally characteristic of the above-described exemplary RF power amplifier circuits 30, 48, 66 and 84, or other such amplifier circuits to which the invention relates is more linear.
- any of the above-described exemplary RF power amplifier circuits 30, 48, 66 and 84, or other such amplifier circuits to which the invention relates, can be included in a mobile wireless telecommunication device 102, such as a cellular telephone handset.
- Device 102 includes a radio frequency (RF) subsystem 104, an antenna 106, a baseband subsystem 108, and a user interface section 110.
- the RF subsystem 104 includes a transmitter portion 112 and a receiver portion 114.
- transmitter portion 112 and the input of receiver portion 114 are coupled to antenna 106 via a front-end module 116 that allows simultaneous passage of both the transmitted RF signal produced by transmitter portion 112 and the received RF signal that is provided to receiver portion 114.
- the above-listed elements can be of the types conventionally included in such mobile wireless telecommunication devices. As conventional elements, they are well understood by persons of ordinary skill in the art to which the present invention relates and, accordingly, not described in further detail herein.
- transmitter portion 112 includes a power amplifier system 118 having one or more transconductance stages with the above- described exemplary amplifier circuits 30, 48, 66 and 84 (not shown in FIGS.
- power amplifier system 118 receives the output of an upconverter 120, which in turn receives the output of a modulator 122.
- the gain of power amplifier system 118 can be controlled by adjusting one or more power control signals 124.
- Power control circuitry 126 can generate power control signals 124 in a conventional manner in response to various operating conditions, as well understood in the art.
- Bias voltage generator circuitry (not shown for purposes of clarity) in power amplifier system 118 can produce the above-described first and second bias voltage signals in response to power control signals 124.
- the gain of any of exemplary amplifier circuits 30, 48, 66 and 84 can be controlled by adjusting its first bias voltage signal.
- the first and second bias control signals are generated by circuitry within power amplifier system 118, in other embodiments any other circuitry within transmitter portion 112 or any other suitable portion of mobile wireless telecommunication device 102 can generate the first and second bias voltage signals.
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Amplifiers (AREA)
Abstract
Description
Claims
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2009/054023 WO2011021995A1 (en) | 2009-08-17 | 2009-08-17 | Radio frequency power amplifier with linearizing predistorter |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2467943A1 true EP2467943A1 (en) | 2012-06-27 |
EP2467943A4 EP2467943A4 (en) | 2013-12-18 |
Family
ID=43607230
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP09848548.5A Withdrawn EP2467943A4 (en) | 2009-08-17 | 2009-08-17 | Radio frequency power amplifier with linearizing predistorter |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP2467943A4 (en) |
KR (3) | KR101766628B1 (en) |
CN (1) | CN102577136B (en) |
HK (1) | HK1173003A1 (en) |
WO (1) | WO2011021995A1 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103138688B (en) * | 2013-01-25 | 2015-09-09 | 中国科学院微电子研究所 | Circuit unit |
CN103248597B (en) * | 2013-05-17 | 2017-02-22 | 上海无线通信研究中心 | Self-adaptive digital pre-distortion system based on reference signal and initialization correction method |
US9350300B2 (en) | 2014-01-28 | 2016-05-24 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Power amplifier |
JP2018033028A (en) | 2016-08-25 | 2018-03-01 | 株式会社村田製作所 | Power amplifier circuit |
CN110677132B (en) * | 2019-09-05 | 2020-09-25 | 广州穗源微电子科技有限公司 | Radio frequency linear power amplifier circuit |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030193371A1 (en) * | 2002-04-12 | 2003-10-16 | Larry Larson | CMOS class AB power amplifier with cancellation of nonlinearity due to change in gate capacitance of a NMOS input transistor with switching |
US7110718B1 (en) * | 2003-06-09 | 2006-09-19 | Maxim Integrated Products, Inc. | Phase distortion using MOS nonlinear capacitance |
US20070052479A1 (en) * | 2005-09-08 | 2007-03-08 | Wang Chih W | Dynamic bias circuit for a radio-frequency amplifier |
US20070285162A1 (en) * | 2006-05-22 | 2007-12-13 | Theta Microelectronics, Inc. | Highly linear Low-noise amplifiers |
US20080136529A1 (en) * | 2006-12-11 | 2008-06-12 | Via Technologies, Inc. | Power amplifier with nonlinear compensation, and method thereof |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6621348B2 (en) * | 2001-10-25 | 2003-09-16 | Motorola, Inc. | Variable gain amplifier with autobiasing supply regulation |
KR100524554B1 (en) * | 2003-05-02 | 2005-10-28 | 주식회사 에이엠티 | Operational transconductance amplifier |
WO2006036060A1 (en) * | 2004-09-27 | 2006-04-06 | Nederlandse Organisatie Voor Toegepast- Natuurwetenschappelijk Onderzoek Tno | Gate bias generator |
EP1875601A1 (en) * | 2005-04-18 | 2008-01-09 | Freescale Semiconductor Inc. | An adaptive protection circuit for a power amplifier |
JPWO2007043122A1 (en) * | 2005-09-30 | 2009-04-16 | 富士通株式会社 | Variable gain amplifier and control method thereof |
JP2008283407A (en) * | 2007-05-09 | 2008-11-20 | Toshiba Corp | Power amplifier |
US8787850B2 (en) * | 2008-03-31 | 2014-07-22 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Compensating for non-linear capacitance effects in a power amplifier |
-
2009
- 2009-08-17 CN CN200980161984.9A patent/CN102577136B/en active Active
- 2009-08-17 WO PCT/US2009/054023 patent/WO2011021995A1/en active Application Filing
- 2009-08-17 KR KR1020177007015A patent/KR101766628B1/en active IP Right Grant
- 2009-08-17 KR KR1020127006858A patent/KR101719387B1/en active IP Right Grant
- 2009-08-17 EP EP09848548.5A patent/EP2467943A4/en not_active Withdrawn
- 2009-08-17 KR KR1020177007017A patent/KR101814352B1/en active IP Right Grant
-
2013
- 2013-01-04 HK HK13100093.1A patent/HK1173003A1/en unknown
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030193371A1 (en) * | 2002-04-12 | 2003-10-16 | Larry Larson | CMOS class AB power amplifier with cancellation of nonlinearity due to change in gate capacitance of a NMOS input transistor with switching |
US7110718B1 (en) * | 2003-06-09 | 2006-09-19 | Maxim Integrated Products, Inc. | Phase distortion using MOS nonlinear capacitance |
US20070052479A1 (en) * | 2005-09-08 | 2007-03-08 | Wang Chih W | Dynamic bias circuit for a radio-frequency amplifier |
US20070285162A1 (en) * | 2006-05-22 | 2007-12-13 | Theta Microelectronics, Inc. | Highly linear Low-noise amplifiers |
US20080136529A1 (en) * | 2006-12-11 | 2008-06-12 | Via Technologies, Inc. | Power amplifier with nonlinear compensation, and method thereof |
Non-Patent Citations (2)
Title |
---|
CHENG-CHI YEN ET AL: "A 0.25-<maths><tex>$\mu$ </tex></maths>m 20-dBm 2.4-GHz CMOS Power Amplifier With an Integrated Diode Linearizer", IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, IEEE SERVICE CENTER, NEW YORK, NY, US, vol. 13, no. 2, 1 February 2003 (2003-02-01), XP011066963, ISSN: 1531-1309 * |
See also references of WO2011021995A1 * |
Also Published As
Publication number | Publication date |
---|---|
KR20120065350A (en) | 2012-06-20 |
KR101719387B1 (en) | 2017-03-23 |
CN102577136A (en) | 2012-07-11 |
EP2467943A4 (en) | 2013-12-18 |
KR101766628B1 (en) | 2017-08-08 |
CN102577136B (en) | 2014-11-05 |
KR20170032485A (en) | 2017-03-22 |
WO2011021995A1 (en) | 2011-02-24 |
KR20170032486A (en) | 2017-03-22 |
KR101814352B1 (en) | 2018-01-04 |
HK1173003A1 (en) | 2013-05-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9755577B2 (en) | Predistortion in radio frequency transmitter | |
CN101939907B (en) | Multi-linearity mode LNA having a deboost current path | |
KR101296149B1 (en) | Method and apparatus for compensating for non-linear capacitance effects in a power amplifier | |
JP6229369B2 (en) | Power amplifier | |
EP2467943A1 (en) | Radio frequency power amplifier with linearizing predistorter | |
CN104539242A (en) | Current multiplexing low noise amplifier | |
CN111313844A (en) | Self-adaptive bias circuit applied to low-noise amplifier chip | |
CN104362988A (en) | Circuit for linearization of power amplifier | |
Kang et al. | Dynamic feedback linearizer of RF CMOS power amplifier | |
US7751792B2 (en) | Higher linearity passive mixer | |
Wang et al. | A nonlinear capacitance cancellation technique and its application to a CMOS class AB power amplifier | |
EP4391373A1 (en) | Power amplification circuit, power amplifier, and transmitter | |
KR101094359B1 (en) | Millimeter-wave amplifier and bias circuit for the same | |
US8482355B2 (en) | Power amplifier | |
Chauhan et al. | A tuning technique for temperature and process variation compensation of power amplifiers with digital predistortion | |
KR101062749B1 (en) | Signal amplification device with improved linearity | |
Westesson et al. | Low-power complex polynomial predistorter circuit in CMOS for RF power amplifier linearization | |
JP2001077637A (en) | Predistortion circuit | |
US20220393655A1 (en) | Linearization using complementary devices | |
KR100313429B1 (en) | FT predistorter without insertion loss | |
Rashtian et al. | Improving linearity in class-AB power amplifiers using a body-biased NMOS predistortion stage | |
KR101101527B1 (en) | Cmos power amplifier | |
CN111064437A (en) | Predistortion circuit | |
KR20090046033A (en) | Method for plaaning and apparatus circuits for transconductor | |
CN107852138A (en) | Without with cutting down signal envelope boost amplifier gain |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
17P | Request for examination filed |
Effective date: 20120312 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO SE SI SK SM TR |
|
DAX | Request for extension of the european patent (deleted) | ||
A4 | Supplementary search report drawn up and despatched |
Effective date: 20131114 |
|
RIC1 | Information provided on ipc code assigned before grant |
Ipc: H03F 1/02 20060101ALI20131108BHEP Ipc: H03F 3/193 20060101ALI20131108BHEP Ipc: H03F 1/32 20060101ALI20131108BHEP Ipc: H04B 1/04 20060101AFI20131108BHEP Ipc: H03F 3/24 20060101ALI20131108BHEP |
|
17Q | First examination report despatched |
Effective date: 20140805 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 20151119 |