EP2434364A1 - Current generator, in particular of the order of the nanoampere, and voltage regulator using such a generator - Google Patents
Current generator, in particular of the order of the nanoampere, and voltage regulator using such a generator Download PDFInfo
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- EP2434364A1 EP2434364A1 EP11181507A EP11181507A EP2434364A1 EP 2434364 A1 EP2434364 A1 EP 2434364A1 EP 11181507 A EP11181507 A EP 11181507A EP 11181507 A EP11181507 A EP 11181507A EP 2434364 A1 EP2434364 A1 EP 2434364A1
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- transistor
- transistors
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
- G05F3/242—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
Definitions
- the present invention relates to a current generator.
- the invention also relates to a voltage regulator using such a generator. It applies in particular for the generation of ultra low currents, virtually stable in temperature and variation of the supply voltage, in integrated circuits.
- the invention also applies to the production of stable voltage regulators of the series type with very low waste voltage, whatever the source of electrical energy input.
- the weight of embedded equipment remains a major constraint for aircraft.
- the increasing complexity of electrical, electronic and computer systems is leading to more and more wiring inside the aircraft.
- Hundreds of kilometers of copper cables thus travel inside the aircraft, which contributes to increasing the total weight of the onboard equipment.
- the use of less dense conductive wires, made of aluminum, for example, is not enough to solve the problem given the lengths involved.
- An effective solution is to eliminate as much as possible the wiring lines and to use autonomous sources of energy for feed the various components.
- An example of application concerns in particular the multitude of sensors placed at different locations on an airplane.
- a solution eliminating the wiring then consists of placing an autonomous power source near each sensor or a set of sensors.
- transducers In the avionics field, it is not possible to use batteries because of the short life of the latter and their poor temperature resistance.
- One solution is to use a source of energy that recovers ambient energy, for example thermal transducers. It is thus possible to use transducers using the "Seebeck" effect or inverse Pelletier effect. These transducers deliver an electrical potential difference exploiting the difference in temperature between a quantity of water stored inside the transducers and the ambient air, this temperature difference being caused by the differences in thermal inertia between the water and air, or any other temperature gradient. In the case of an airplane, the temperatures of the water and the air evolve differently at the heart of the flight because of these thermal inertia.
- Other types of transducers can be used, including mechanical transducers that can for example exploit the mechanical vibrations of an aircraft. These transducers comprise beams of very small size with several branches, the vibrations transmitted to these beams causing electrical energy.
- transducers provide voltages or currents that are not stabilized over time. They can not directly supply electronic components. It is known to use voltage or current regulators connected as input to an unstabilized power supply such as a transducer and outputting a defined voltage, for example 3 volts. Due to the low level of energy delivered by the aforementioned transducers, it is necessary to realize regulators that consume a very low energy level, therefore having a very low waste voltage and very low polarization currents, while taking account of the constraints of realization, in particular in integrated circuit.
- An object of the invention is therefore to enable the realization of integrated electronic circuits consuming a minimum current, typically in the field of nano powers, of the order of a few nano-watt.
- the L / W ratio may be at least greater than 500 and the width W may be of the order of 0.6 ⁇ m.
- the generator is suitable for use as a voltage reference V Ref , said reference being provided at the gate of the transistors N3R and N4.
- the transistors P1, P2, P3 of the first set are for example P-channel.
- the regulator comprises for example a number K of pairs of transistors (N10, P10), (N11, P11), (N12, P12) connected in series between the transistor P4 and the transistor N5, K being greater than 1, each first transistor N10, N11, N12 of a pair having at these terminals said voltage step V ref when it is controlled in the on state, the regulator comprising means for controlling the pairs of transistors, the output voltage being a function a given number of voltage steps V ref according to the combination of the control states applied to the transistor couples.
- the figure 1 Synopticly illustrates an autonomous power supply system from a power recovery device. It comprises as input a transducer 1 transforming a physical phenomenon, such as a temperature difference or vibrations into electrical energy.
- the transducer 1 is followed by a converter 2 transforming the electrical voltage delivered by the transducer into a DC voltage. Indeed the output voltage of the transducer can be continuous, alternative or more generally periodic. In all cases, it is converted by the converter 2 into a DC voltage which is not yet that of use of the electronic components.
- the converter 2 is followed by a storage element 3 such as a capacity of very high value for example.
- a regulator 4 delivers a reference voltage V in a given range of variation according to the desired level of precision.
- FIGs 2a, 2b and 2c illustrate the operation of a thermal transducer using the Seebeck effect. More specifically figure 2a presents the constituent elements of such a transducer. It comprises a reserve of water 21 and air 22 stored in a thermal insulation container 23 closed by a thermo-generator 24 in contact with a metal wall 25 swept by an air stream 26, in the case for example where the transducer is mounted on an airplane.
- the figure 2b illustrated by two curves 28, 29 the evolution of air and water temperatures as a function of time.
- a first curve 28 illustrates the variation of the air temperature successively during the take-off phase 201, during the cruising flight phase 202 and during the landing phase 203.
- a second curve 29 illustrates the evolution of the temperature water for the same phases.
- the Figure 2c illustrated by a first curve 271 and by a second curve 272 respectively the shape of the temperature difference ⁇ T between air and water and the shape of the output voltage supplied by the transducer as a function of time for the previous phases 201, 202, 203.
- the delivered voltage 272 has the appearance of a sinusoid with a single alternation during the entire flight phase of the aircraft.
- the figure 3 illustrates in more detail a chain of energy recovery of the type of the figure 1 in a case where there are two autonomous sources of energy recovery.
- the system comprises a first transducer 1 which is a thermal transducer as illustrated by the Figures 2a to 2c .
- a transducer can provide electrical power in a range whose lower limit is of the order of microwatt ( ⁇ W) and the upper limit of the order of several milliwatt (mW).
- the voltage delivered by the transducer 1 is rectified into a DC voltage by means of a converter 2 whose output is connected to an electrical energy storage element 3, for example a super storage capacitor.
- the system furthermore comprises a second transducer 10. It is a mechanical transducer exploiting mechanical vibrations. As previously indicated, this type of transducer comprises beams transmitting the vibrations from which the electrical energy is produced. Such a transducer 10 can provide electrical power ranging from some nano watts (nW) to a few microwatts ( ⁇ W). The output voltage of this converter is converted into DC voltage by a converter 2. The output of this converter charges a capacitor 30 serving as energy storage and prepolarization for the active diodes of the converter 2. This capacitor 30 having a smaller capacitance than the previous 3 because of the lower power that is involved.
- nW nano watts
- ⁇ W microwatts
- the outputs of the storage capacitors 3, 30 are connected to the input of a regulator, these outputs being isolated by a diode circuit 31 connected by example on the output branch of the first capacitor 3 and the second capacitor 30. More particularly, the capacitors 3, 30 are connected, via the isolation circuit 31, to the input of a MOS transistor 32 whose output delivers the desired regulated voltage, for example equal to 3 volts.
- the second transducer 10 provides a voltage from the start of the aircraft because the beams recover energy from the first vibrations. The use of the Seebeck thermal transducer does not make it possible to obtain a starting voltage because the voltage delivered is slowly established during the take-off phase 201 as shown in FIG. Figure 2c .
- the regulator assembly is conventional, of the series type. It therefore comprises transistor 32 whose gate is controlled by the output of an operational amplifier device 33 which provides regulation. For this purpose, an input of the operational amplifier 33 is connected to the output voltage of the transistor 32 and the other input is connected to a reference voltage 35 corresponding to the desired regulated voltage.
- the voltage thus obtained makes it possible, for example, to supply one or more sensors 34 and possibly a microprocessor system comprising in particular an energy management cell 37. This cell controls, for example, the voltage reference used by the series regulator by means of the appropriate interfaces.
- a circuit 36 provides the bias current of the operational amplifier and the low-waste diodes.
- a circuit according to the invention makes it possible to obtain a bias current of the order of a few nanoamperes (nA).
- nA nanoamperes
- a polarization current of 10 nA will subsequently be used as an example.
- a resistor R1 is connected in series between a supply voltage Vdd and a field effect transistor N1 whose drain is connected to the gate and the source to the ground potential.
- Field effect transistors will be called by the following their conventional terminology MOS transistors.
- a second MOS transistor N2 is connected in common grid with the transistor N1, according to a current mirror type mounting. The sources of the two transistors N1, N2 are connected to the ground potential.
- a resistance value R1 equal to 250 MOhms is required. Such resistance can not be realized in an integrated circuit, the necessary surface being much too large. Moreover, the value of the current I strongly depends on the supply voltage Vdd.
- a resistor R2 is connected between the gates of the transistors N1 and N2 and the ground potential, a third MOS transistor N3 being connected between the resistor R2 and the voltage Vdd.
- the gate of the transistor N3 is connected at a point situated between the resistor R1, always connected to the potential Vdd, and the drain of the transistor N1.
- the resistor R1 is replaced by three MOS transistors P1, P2, P3 in parallel of the P-channel type, connected in current mirror.
- the other transistors are of the N channel type as for the other assemblies 4a and 4b.
- the sources of the three P-channel transistors are connected to the voltage Vdd, their gates being connected to the drain third transistor P3, which has its gate connected to its drain.
- the drain of the first transistor P1 is connected to the drain of the transistor N1
- the drain of the second transistor P2 is connected to the resistor R2
- the drain of the third transistor P3 is connected to the drain of a transistor N'1, the gate of the transistor N 1 being connected to the drain of transistor N1.
- an N-channel transistor N 2 is connected in series with the resistor R 2.
- V R2 U T ln S NOT ⁇ 2 S P ⁇ 1 S NOT ⁇ 1 S P ⁇ 2
- S N'2 , S P1 , S N1 , S P2 respectively represent the surfaces of the transistors N'2, P1, N1 and P2, U T representing the thermal voltage.
- the figure 5 presents the block diagram of an exemplary circuit used by the invention not using a resistor, this circuit being able to be used in particular as a bias circuit 35, 36 in the recovery chain of energy illustrated by the figure 3 .
- the assembly comprises, for example, a current mirror 41, with the same transistors as those of Figures 4c and 4d .
- it is the transistor P1 which has its gate connected to its drain.
- the drain of the first transistor P1 is connected to the drain of a transistor N1 channel N.
- the drain of the second transistor P2 is connected to the drain of a transistor N2 channel N in common grid with the transistor N1, the drain and the gate of the transistor N2 being connected.
- the drain of the third transistor P3 is connected to the drain of an N4 channel N transistor.
- the source of the transistor N1, also connected to the first transistor P1 of the current mirror, is connected to the drain of a transistor N3R whose gate is connected to the gate of the transistor N4 also connected to the third transistor P3.
- the gate and the drain of the transistor N4 are connected, the transistors N3R and N4 being wired in current mirror.
- the sources of the transistors N2, N3R, N4 are connected to the ground potential 50.
- the transistor N3R functions as a resistor.
- Transistors N1 and N2 are biased to operate in low inversion region and behave as bipolar transistors.
- the transistor N3R is biased to operate in a zone of strong inversion and thus to operate in the linear zone, with a very low drain voltage.
- a conventional "band gap" type regulator is obtained with the MOS transistor N3R operating as a resistor, this regulator providing a constant temperature voltage and independent of the supply voltage, this voltage acting as a reference voltage V Ref. exit.
- This voltage is available at a point A at the drain of the transistor N4 connected to the gate of the latter and to the gate of the transistor N3R.
- the figure 6 recalls in a sectional view the conventional structure of a MOS transistor, in this example N-channel, technology called "bulk".
- the doped areas 61, 62 forming the source and the drain are directly implanted in a mass of silicon 63 forming a substrate.
- Metal interfaces 611, 621 in contact with the doped zones 61, 62 allow electrical connections with the outside.
- the gate 64 disposed along the channel located between the doped zones 61, 62 is isolated by a layer of silicon oxide (SiO 2 ).
- the length L of the channel is the distance between the two diffusion zones 61, 62 forming the source and the drain.
- the width W of the channel is the perpendicular dimension in the plane of the substrate.
- the length is small and the L / W ratio is small, typically less than 1 as illustrated by FIG. figure 6 .
- the transistor N3R of the assembly of the figure 5 has a very long channel with respect to the width, the ratio L / W being not only higher but very high, of the order of several hundred for example, greater than 500 for example. It is the same for the transistor N4.
- a "PTAT and band gap" type regulator according to a conventional structure, but according to the invention, the resistor is produced by a MOS transistor operating in its linear zone, this transistor having an ultra-high frequency channel. long.
- the tests carried out by the Applicant have shown that this very narrow channel transistor structure, up to 0.6 ⁇ m and ultra long, makes it possible to obtain a quasi-constant current value as a function of the supply voltage variation Vdd. .
- the ratio ⁇ I / ⁇ Vdd is very small, ⁇ I being the variation of current generated and ⁇ Vdd the variation of the supply voltage. In practice, this ratio can be of the order of 1 to 2%. This result is very remarkable and very important for the development of generators of very low currents, associated with an almost constant variation as a function of the temperature of this same current.
- this ultra-long channel structure makes it possible to obtain, in the transistors N3R and N4, a quasi-stable current in temperature and very low, which is almost stable as a function of the variations of the supply voltage, as well as a grid voltage. low source stable in temperature.
- this voltage is equal to the voltage V ref at the drain-source terminals of the transistor N4.
- This reference voltage can be advantageously used as no voltage for the voltage regulation realization as will be shown in the following description.
- the transistors are scattered and isolated in a box 74, a P + doped wall 81 ensures isolation between the transistors.
- FIGS 8a and 8b illustrate for example the production of transistors N3R and N4 of the assembly of the figure 5 , implanted for example with other transistors of the same structure or of different structure on the same ground substrate 75.
- the figure 9 presents an exemplary embodiment of a regulator according to the invention using a mounting of the type of that of the figure 5 with ultra-long N3R and N4 MOS transistors made for example according to the Figures 8a and 8b .
- the circuit regulates at two voltage levels 901, 902.
- the voltage step is, for example, 0.8 V, thereby obtaining 0.8 V or 1.6 V.
- the circuit resumes a part 90 corresponding to the diagram of the figure 5 .
- This part 90 is connected in input to a capacitor 91 corresponding for example to a device for storing energy 3.
- the voltage regulation is provided by a P-channel MOS transistor, referenced P5, the regulated voltage being delivered in output loaded for example by a resistor 92.
- the source of this transistor P5 is connected to the capacitor 91 and the sources of the transistors P1, P2, P3 of the current mirror.
- the point A at the drain of the transistor N4 is connected to the negative input of an operational amplifier 93 whose output is connected to the gate of the output transistor P5.
- point A presents the reference voltage. In the example of the figure 9 this voltage is equal to 0.8 V. This reference voltage is therefore present at the negative input of the operational amplifier 93.
- a fourth P-channel transistor P4 is connected in current mirror with the transistors P1, P2, P3.
- a third N5 transistor, N channel, is connected in current mirror with the transistors N1, N2.
- a pair of MOS transistors N10, P10 is connected between the drain of transistor P4 and the drain of transistor N5. More particularly, the drain of the transistor N10 is connected to the drain of the transistor P4 and its source is connected to the drain of the transistor N5.
- the transistor P10 is connected to the transistor N10, its source and its drain being respectively connected to the drain and to the source of the transistor N10.
- the gate and the drain of the transistor N10 are connected together to the source of the transistor P10 itself connected to the drain of the transistor P5 supplying the regulated output voltage Vs.
- the source of transistor N10 and the drain of transistor P10 are connected together to the positive input of the operational amplifier.
- the two transistors P4 and N5 convey the same current 2I. Since the transistor N10 is connected between these two transistors, it conveys the same current 2I between its drain and its source in its branch which connects it to the transistor N5. The current on the other branches is then zero. These other branches, in particular the branch 98 connecting the transistor N10 to the transistor P5, then advantageously have a high equivalent impedance. It follows that the potential V ref , for example 0.8 volts, across the transistor N4 is carried across the terminals of the transistor N10, when the latter is controlled conduction.
- V ref for example 0.8 volts
- the conduction of the transistor P10 is controlled by a control signal applied to its gate and circcircuit the transistor N10 by providing the voltage steps.
- this signal is for example provided by the energy management cell 37 either by software 37 or by a hardware circuit by direct connection of the controls to the voltage vdd or to the electrical earth.
- the output voltage is equal to 0.8 V which is the voltage across the transistor N4.
- the voltage of 0.8 V present at the terminals of the transistor N10 is added, as previously described, and makes it possible to obtain a voltage of 1.6 V at the output Vs.
- transistor N10 is an ultra long channel MOS transistor.
- Transistor N10 is identical to transistors N3R and N4 to ensure perfect temperature stability.
- the transistors are represented by their long channels inside the casing 74.
- the transistors N3R, N4 and N10 are interleaved in order to be the best paired possible, and thus to present the electrical characteristics as close as possible.
- Phantom transistors 99 also called “dummy” are for example intercalated inside the box. These fictitious transistors have their terminals short-circuited.
- Transistors N10 and P10 can be combined into a single transistor.
- the figure 10 shows an exemplary embodiment of a regulator according to the invention at four voltage levels 102 with four 0.8 V steps, another reference voltage being of course possible.
- the pair of transistors N10, P10 of the figure 9 is replaced by an assembly 101 with three pairs of transistors (N10, P10), (N11, P11), (N12, P12) in series.
- the assembly 101 is always connected between the transistors P4 and N5.
- the pairs of transistors are connected to each other in the same way as the pair (N10, P10) in the mounting of the figure 9 .
- Each pair is controlled by a control signal.
- one of the three transistors N10, N11, N12 has or not a voltage of 0.8 V at its terminals, thus adding or not a voltage step of 0.8 V output Vs.
- figure 10 has three pairs of transistors in series between the transistor P4 and the transistor N5. It is of course possible to provide a different number K.
- the dimensions of an ultra long channel transistor may be 0.6 ⁇ m for the width W and 320 ⁇ m for the length L.
- the ratio L / W of an ultra long channel is at least of the order of a few tens and can reach several hundred or even reach the value 1000 and beyond.
- the figure 11 illustrates a case of using a regulator according to the figure 10 in the case where the energy source is a Seebeck effect thermal transducer 1.
- a first curve 272 illustrates the pace of the voltage produced by the transducer throughout the phases of flight of an aircraft, take-off, cruise flight and landing, as defined with respect to the Figure 2c .
- Curve 111 represents the voltage recovered after DC voltage to DC voltage conversion.
- Curve 112 represents the regulated voltage at the output of transistor P5 using the software-controlled voltage step tracking.
- Curve 113 represents the output voltage using a single voltage step by hardware control.
Abstract
Description
La présente invention concerne un générateur de courant. L'invention concerne aussi un régulateur de tension utilisant un tel générateur. Elle s'applique notamment pour la génération d'ultra faibles courants, quasi stables en température et en variation de la tension d'alimentation, dans des circuits intégrés. L'invention s'applique également pour la réalisation de régulateurs de tensions stables de type série à très faible tension de déchet, quelle que soit la source d'énergie électrique en entrée.The present invention relates to a current generator. The invention also relates to a voltage regulator using such a generator. It applies in particular for the generation of ultra low currents, virtually stable in temperature and variation of the supply voltage, in integrated circuits. The invention also applies to the production of stable voltage regulators of the series type with very low waste voltage, whatever the source of electrical energy input.
Le poids du matériel embarqué reste une contrainte majeure pour les aéronefs. La complexité croissante des systèmes électriques, électroniques et informatiques entraîne un câblage de plus en plus important à l'intérieur des avions. Des centaines de kilomètres de câbles en cuivre parcourent ainsi l'intérieur des avions, ce qui contribue à augmenter le poids total du matériel embarqué. L'utilisation de fils conducteurs moins denses, en aluminium par exemple, ne suffit pas à résoudre le problème étant donné les longueurs en jeu. Une solution efficace consiste à supprimer au maximum les lignes de câblage et à utiliser des sources autonomes d'énergie pour alimenter les différents composants. Un exemple d'application concerne notamment la multitude de capteurs placés à différents endroits d'un avion. Une solution supprimant le câblage consiste alors à placer une source d'énergie autonome à proximité de chaque capteur ou d'un ensemble de capteurs.The weight of embedded equipment remains a major constraint for aircraft. The increasing complexity of electrical, electronic and computer systems is leading to more and more wiring inside the aircraft. Hundreds of kilometers of copper cables thus travel inside the aircraft, which contributes to increasing the total weight of the onboard equipment. The use of less dense conductive wires, made of aluminum, for example, is not enough to solve the problem given the lengths involved. An effective solution is to eliminate as much as possible the wiring lines and to use autonomous sources of energy for feed the various components. An example of application concerns in particular the multitude of sensors placed at different locations on an airplane. A solution eliminating the wiring then consists of placing an autonomous power source near each sensor or a set of sensors.
Dans le domaine avionique, il n'est pas possible d'utiliser des batteries en raison de la durée de vie trop courte de ces dernières et de leur mauvaise tenue en température. Une solution consiste à utiliser une source d'énergie qui récupère l'énergie ambiante par exemple des transducteurs thermiques. Il est ainsi possible d'utiliser des transducteurs utilisant l'effet « Seebeck » ou effet Pelletier inverse. Ces transducteurs délivrent une différence de potentiel électrique exploitant la différence de température entre une quantité d'eau stockée à l'intérieur des transducteurs et l'air ambiant, cette différence de température étant provoquée par les différences d'inertie thermique entre l'eau et l'air, ou tout autre gradient de température. Dans le cas d'un avion, les températures de l'eau et de l'air évoluent différemment au cour du vol du fait de ces inerties thermiques. D'autres types de transducteurs peuvent être utilisés, notamment des transducteurs mécaniques qui peuvent par exemple exploiter les vibrations mécaniques d'un avion. Ces transducteurs comportent des poutres de très petite taille à plusieurs branches, les vibrations transmises à ces poutres provoquant une énergie électrique.In the avionics field, it is not possible to use batteries because of the short life of the latter and their poor temperature resistance. One solution is to use a source of energy that recovers ambient energy, for example thermal transducers. It is thus possible to use transducers using the "Seebeck" effect or inverse Pelletier effect. These transducers deliver an electrical potential difference exploiting the difference in temperature between a quantity of water stored inside the transducers and the ambient air, this temperature difference being caused by the differences in thermal inertia between the water and air, or any other temperature gradient. In the case of an airplane, the temperatures of the water and the air evolve differently at the heart of the flight because of these thermal inertia. Other types of transducers can be used, including mechanical transducers that can for example exploit the mechanical vibrations of an aircraft. These transducers comprise beams of very small size with several branches, the vibrations transmitted to these beams causing electrical energy.
Ces transducteurs fournissent des tensions ou des courants qui ne sont pas stabilisés dans le temps. Ils ne peuvent donc pas alimenter directement des composants électroniques. Il est connu d'utiliser des régulateurs de tension ou de courant reliés en entrée à une alimentation non stabilisée telle qu'un transducteur et fournissant en sortie une tension définie, par exemple 3 volts. En raison du faible niveau d'énergie délivré par les transducteurs précités, il est nécessaire de réaliser des régulateurs qui consomment un très faible niveau d'énergie, donc ayant une très faible tension de déchet et des courants de polarisation très faibles, tout en tenant compte des contraintes de réalisation, notamment en circuit intégré.These transducers provide voltages or currents that are not stabilized over time. They can not directly supply electronic components. It is known to use voltage or current regulators connected as input to an unstabilized power supply such as a transducer and outputting a defined voltage, for example 3 volts. Due to the low level of energy delivered by the aforementioned transducers, it is necessary to realize regulators that consume a very low energy level, therefore having a very low waste voltage and very low polarization currents, while taking account of the constraints of realization, in particular in integrated circuit.
Un but de l'invention est donc notamment de permettre la réalisation de circuits électroniques intégrés consommant un minimum de courant, typiquement dans le domaine des nano puissances, de l'ordre de quelques nano-watt.An object of the invention is therefore to enable the realization of integrated electronic circuits consuming a minimum current, typically in the field of nano powers, of the order of a few nano-watt.
A cet effet, l'invention a pour objet un générateur de courant utilisant des transistors à effet de champ, comportant au moins :
- un premier ensemble de Q transistors P1, P2, P3 connectés en miroir de courant, aptes à être reliés à une tension d'alimentation Vdd ;
- un deuxième ensemble de Q-1 transistors N1, N2 connectés en miroir de courant, dont les canaux ont une polarité inverse de celle des transistors du premier ensemble, chaque transistor N1, N2 étant connecté en série à un transistor du premier ensemble;
- un premier transistor N1 du deuxième ensemble étant connecté en série avec un transistor N3R, ayant un canal de même polarité, connecté en miroir de courant avec un transistor N4, ce transistor N4 étant connecté en série avec un dernier transistor P3 du premier ensemble ;
le transistor N3R étant apte à fonctionner dans sa zone linéaire, la valeur du courant généré étant fonction de la résistance équivalente Req de ce transistor, les transistors N3R et N4 ayant un canal ultra long, de sorte que le rapport L/W est au moins supérieur à plusieurs centaines, L étant la longueur du canal et W sa largeur, les valeurs de L, de W et du rapport L/W étant déterminés pour obtenir à la fois une valeur de courant stable en fonction des variations de la tension d'alimentation, mais aussi pour obtenir une valeur de courant quasi-stable en fonction de la température, ainsi que pour obtenir une tension VGS de ces mêmes transistors très stable en fonction de la température.
- a first set of Q transistors P1, P2, P3 connected in current mirror, connectable to a supply voltage Vdd;
- a second set of Q-1 transistors N1, N2 connected in current mirror, the channels of which have a polarity opposite to that of the transistors of the first set, each transistor N1, N2 being connected in series with a transistor of the first set;
- a first transistor N1 of the second set being connected in series with a transistor N3R, having a channel of the same polarity, connected in current mirror with a transistor N4, this transistor N4 being connected in series with a last transistor P3 of the first set;
the transistor N3R being able to operate in its linear zone, the value of the current generated being a function of the equivalent resistance R eq of this transistor, the transistors N3R and N4 having an ultra long channel, so that the L / W ratio is at less than several hundreds, where L is the length of the channel and W is its width, the values of L, W and the L / W ratio being determined to obtain both a stable current value as a function of the variations of the voltage of the channel. supply, but also to obtain a quasi-stable current value as a function of the temperature, as well as to obtain a voltage VGS of these same transistors very stable as a function of temperature.
Le rapport L/W peut être au moins supérieur à 500 et la largeur W peut être de l'ordre de 0,6 µm.The L / W ratio may be at least greater than 500 and the width W may be of the order of 0.6 μm.
Avantageusement, le générateur est apte à être utilisé comme référence de tension VRef, ladite référence étant fournie au niveau de grilles des transistors N3R et N4.Advantageously, the generator is suitable for use as a voltage reference V Ref , said reference being provided at the gate of the transistors N3R and N4.
Les transistors P1, P2, P3 du premier ensemble sont par exemple à canal P.The transistors P1, P2, P3 of the first set are for example P-channel.
L'invention a également pour objet un régulateur de tension, entre une tension d'entrée et une tension de sortie Vs, utilisant des transistors à effet de champ, le régulateur comportant au moins :
- un générateur de courant tel que décrit précédemment ;
- un transistor de sortie à effet de champ P5 à canal P relié à sa source à la tension d'entrée dudit régulateur et délivrant sur son drain la tension de sortie ;
- un amplificateur opérationnel relié sur son entrée négative à la tension de référence dudit générateur ;
- un transistor P4, à canal P, connecté en miroir de courant avec les transistors du premier ensemble dudit générateur ;
- un transistor N5, à canal N, connecté en miroir de courant avec les transistors du deuxième ensemble dudit générateur ;
- un couple de transistors (N10, P10) connecté entre le transistor P4 et le transistor N5, le couple comportant un premier transistor N10 à canal N et un deuxième transistor P10 à canal P, la grille et le drain du premier transistor N10 étant reliés ensemble à la source du deuxième transistor P10 reliée au drain du transistor P4 et au drain du transistor de sortie P5 la source du premier transistor N10 et le drain du deuxième transistor P10 étant reliés ensemble à l'entrée positive de l'amplificateur opérationnel et au drain du transistor N5, le canal du premier transistor N10 étant très long, de sorte que le rapport L/W est très grand, L étant la longueur du canal et W sa largeur ;
le pas de tension Vref présent aux bornes du transistor N4 étant reproduit aux bornes du transistor N10 lorsque ce dernier est commandé à l'état passant, la tension de sortie s'incrémentant selon un pas de tension fonction de la commande du transistor N10.
- a current generator as previously described;
- a P-channel field effect output transistor P5 connected at its source to the input voltage of said regulator and delivering the output voltage to its drain;
- an operational amplifier connected on its negative input to the reference voltage of said generator;
- a P-channel transistor P4 connected in current mirror with the transistors of the first set of said generator;
- an N-channel transistor N5 connected in current mirror with the transistors of the second set of said generator;
- a pair of transistors (N10, P10) connected between the transistor P4 and the transistor N5, the pair comprising a first N-channel transistor N10 and a second P-channel transistor P10, the gate and the channel drain; first transistor N10 being connected together to the source of the second transistor P10 connected to the drain of the transistor P4 and to the drain of the output transistor P5, the source of the first transistor N10 and the drain of the second transistor P10 being connected together to the positive input of the operational amplifier and the drain of the transistor N5, the channel of the first transistor N10 being very long, so that the L / W ratio is very large, L being the length of the channel and W its width;
the voltage step V ref present across the terminals of the transistor N4 being reproduced at the terminals of the transistor N10 when the latter is controlled in the on state, the output voltage being incremented according to a voltage step that is a function of the control of the transistor N10.
Avantageusement, le régulateur comporte par exemple un nombre K de couples de transistors (N10, P10), (N11, P11), (N12, P12) connectés en série entre le transistor P4 et le transistor N5, K étant supérieur à 1, chaque premier transistor N10, N11, N12 d'un couple présentant à ces bornes ledit pas de tension Vref lorsqu'il est commandé à l'état passant, le régulateur comportant des moyens de commande des couples de transistors, la tension de sortie étant fonction d'un nombre donné de pas de tension Vref selon la combinaison des états de commande appliquées aux couples de transistor.Advantageously, the regulator comprises for example a number K of pairs of transistors (N10, P10), (N11, P11), (N12, P12) connected in series between the transistor P4 and the transistor N5, K being greater than 1, each first transistor N10, N11, N12 of a pair having at these terminals said voltage step V ref when it is controlled in the on state, the regulator comprising means for controlling the pairs of transistors, the output voltage being a function a given number of voltage steps V ref according to the combination of the control states applied to the transistor couples.
D'autres caractéristiques et avantages de l'invention apparaîtront à l'aide de la description qui suit, faite en regard de dessins annexés qui représentent :
- la
figure 1 , une présentation synoptique d'un système autonome d'alimentation électrique ; - les
figures 2a à 2c , une présentation d'un exemple de transducteur thermique et de son fonctionnement ; - la
figure 3 , une présentation plus détaillée d'un système d'alimentation autonome à régulation série utilisant au moins un transducteur comme source autonome d'énergie ; - les
figures 4a à 4d , des exemples de génération de très faibles courants selon l'art antérieur ; - la
figure 5 , un exemple de circuit de génération de courant utilisé dans l'invention ; - la
figure 6 , un rappel de la structure d'un transistor à effet de champs ; - la
figure 7 , une présentation topographique de transistors à effet de champs, à canaux ultra longs utilisés dans un dispositif selon l'invention ; - les
figures 8a et 8b , par une vue topographique et par une vue en coupe une présentation plus détaillée d'un mode de réalisation de transistors à effet de champ, à canaux ultra longs, utilisés dans un générateur selon l'invention ; - la
figure 9 , un exemple de réalisation d'un régulateur selon l'invention ; - la
figure 10 , un autre exemple de réalisation d'un régulateur selon l'invention ; - la
figure 11 , une présentation des courbes de tensions pour une application avec un transducteur thermique à effet Seebeck comme source d'énergie autonome.
- the
figure 1 , a synoptic presentation of an autonomous power supply system; - the
Figures 2a to 2c a presentation of an example of a thermal transducer and its operation; - the
figure 3 , a more detailed presentation of a series-regulated autonomous power supply system using at least one transducer as an autonomous source of energy; - the
Figures 4a to 4d examples of generation of very weak currents according to the prior art; - the
figure 5 an example of a current generating circuit used in the invention; - the
figure 6 , a reminder of the structure of a field effect transistor; - the
figure 7 , a topographic presentation of ultra long channel field effect transistors used in a device according to the invention; - the
Figures 8a and 8b by a topographic view and a sectional view a more detailed presentation of an embodiment of ultra long channel field effect transistors used in a generator according to the invention; - the
figure 9 an embodiment of a regulator according to the invention; - the
figure 10 another embodiment of a regulator according to the invention; - the
figure 11 , a presentation of the voltage curves for an application with a Seebeck effect thermal transducer as a source of autonomous energy.
La
Les
La
Le système comporte par ailleurs un deuxième transducteur 10. Il s'agit d'un transducteur mécanique exploitant des vibrations mécaniques. Comme indiqué précédemment ce type de transducteur comportent des poutres transmettant les vibrations à partir desquelles l'énergie électrique est produite. Un tel transducteur 10 peut fournir une puissance électrique allant de quelque nano watts (nW) à quelques microwatts (µW). La tension électrique délivrée est convertie en tension continue par un convertisseur 2. La sortie de ce convertisseur charge un condensateur 30 faisant office de stockage d'énergie et de prépolarisation pour les diodes actives du convertisseur 2. Ce condensateur 30 ayant une capacité moins importante que le précédent 3 en raison de la puissance plus faible qui est en jeu. Les sortie des condensateurs de stockage 3, 30 sont reliées à l'entrée d'un régulateur, ces sorties étant isolées par un circuit 31 à diode connectée par exemple sur la branche de sortie du premier condensateur 3 et du deuxième condensateur 30. Plus particulièrement, les condensateurs 3, 30 sont reliés, via le circuit d'isolation 31, à l'entrée d'un transistor 32 de type MOS dont la sortie délivre la tension régulée souhaitée, par exemple égale à 3 volts. Dans une utilisation aéroportée, le deuxième transducteur 10 permet d'obtenir une tension dès le démarrage de l'avion car les poutres récupèrent l'énergie dès les premières vibrations. L'utilisation du transducteur thermique, à effet Seebeck, ne permet pas d'obtenir une tension au démarrage car la tension délivrée s'établit lentement durant la phase de décollage 201 comme le montre la
Le montage du régulateur est classique, du type série. Il comporte donc le transistor 32 dont la grille est commandée par la sortie d'un dispositif à amplificateur opérationnel 33 qui assure la régulation. A cet effet, une entrée de l'amplificateur opérationnel 33 est reliée à la tension de sortie du transistor 32 et l'autre entrée est reliée à une tension de référence 35, correspondant à la tension régulée souhaitée. La tension ainsi obtenue permet par exemple d'alimenter un ou plusieurs capteurs 34 et éventuellement un système à microprocesseur comportant notamment une cellule de gestion de l'énergie 37. Cette cellule commande par exemple la référence de tension utilisée par le régulateur série au moyen des interfaces appropriées.The regulator assembly is conventional, of the series type. It therefore comprises
Un circuit 36 fournit le courant de polarisation de l'amplificateur opérationnel et des diodes à faible déchet. Un circuit selon l'invention permet d'obtenir un courant de polarisation de l'ordre de quelques nano ampères (nA). On se fixera par la suite, à titre d'exemple un courant de polarisation de 10 nA.A
Les
Dans le premier montage illustré par la
La résistance R1 est parcourue par un courant I, donné par la relation suivante :
en prenant une tension Vdd = 3,3 V et une tension Vgs = 0,8 V, Vgs étant la tension entre la grille et la source du transistor N1.The resistance R1 is traversed by a current I, given by the following relation:
taking a voltage Vdd = 3.3 V and a voltage Vgs = 0.8 V, Vgs being the voltage between the gate and the source of the transistor N1.
Pour obtenir I = 10 nA, il faut une valeur de résistance R1 égale à 250 MOhms. Une telle résistance ne peut être réalisée dans un circuit intégré, la surface nécessaire étant beaucoup trop grande. Par ailleurs, la valeur du courant I dépend fortement de la tension d'alimentation Vdd.To obtain I = 10 nA, a resistance value R1 equal to 250 MOhms is required. Such resistance can not be realized in an integrated circuit, the necessary surface being much too large. Moreover, the value of the current I strongly depends on the supply voltage Vdd.
Le deuxième montage illustré par la
Toujours pour un courant I = 10 nA, il faut une résistance R1 = 170 MOhms et une résistance R2 supérieure à 80 MOhms. Ces valeurs sont encore trop importantes car nécessitant toujours une surface de réalisation trop importante et la valeur du courant I dépend encore fortement de la tension d'alimentation Vdd.Always for a current I = 10 nA, a resistance R1 = 170 MOhms and a resistance R2 greater than 80 MOhms are required. These values are still too important because always requiring a too large surface area and the value of the current I still strongly depends on the supply voltage Vdd.
Dans le montage de la
Pour obtenir un courant I = 10 nA, il faut une résistance R2 = 80 MOhms, ce qui est toujours trop important en valeur. Néanmoins, la valeur du courant I est relativement indépendante de la tension d'alimentation Vdd.To obtain a current I = 10 nA, a resistance R2 = 80 MOhms is required, which is always too important in value. Nevertheless, the value of the current I is relatively independent of the supply voltage Vdd.
Dans le montage illustré par la
Pour des transistors qui sont taillés pour fonctionner en faible inversion, on peut démontrer que la valeur de la tension VR2 aux bornes de la résistance R2 peut être donnée par la relation suivante :
où SN'2, SP1, SN1, SP2 représentent respectivement les surfaces des transistors N'2, P1, N1 et P2, UT représentant la tension thermique.For transistors which are cut to operate in low inversion, it can be shown that the value of the voltage V R2 across the resistor R2 can be given by the following relation:
where S N'2 , S P1 , S N1 , S P2 respectively represent the surfaces of the transistors N'2, P1, N1 and P2, U T representing the thermal voltage.
En considérant cette tension égale à 50 mV, pour obtenir un courant I=10 nA, il faut alors une résistance R2 ayant une valeur d'environ 5 MOhms. Le résultat obtenu est donc meilleur par rapport aux autres résultats, mais cette valeur est encore trop élevée pour être implantées dans des circuits intégrés.Considering this voltage equal to 50 mV, to obtain a current I = 10 nA, then a resistor R2 having a value of approximately 5 MOhms is required. The result obtained is therefore better than the other results, but this value is still too high to be implanted in integrated circuits.
La
La source du transistor N1, relié par ailleurs au premier transistor P1 du miroir de courant, est reliée au drain d'un transistor N3R dont la grille est reliée à la grille du transistor N4 relié par ailleurs au troisième transistor P3. La grille et le drain du transistor N4 sont reliés, les transistors N3R et N4 étant câblés en miroir de courant.The source of the transistor N1, also connected to the first transistor P1 of the current mirror, is connected to the drain of a transistor N3R whose gate is connected to the gate of the transistor N4 also connected to the third transistor P3. The gate and the drain of the transistor N4 are connected, the transistors N3R and N4 being wired in current mirror.
Les sources des transistors N2, N3R, N4 sont reliées au potentiel de masse 50. Le transistor N3R fonctionne comme une résistance.The sources of the transistors N2, N3R, N4 are connected to the
Les transistors N1 et N2 sont polarisés pour fonctionner en zone de faible inversion et se comportent comme des transistors bipolaires. Le transistor N3R est polarisé pour fonctionner dans une zone de forte inversion et pour fonctionner ainsi dans la zone linéaire, avec une tension de drain très faible. Conformément à la relation (4), la tension VSN1 aux bornes du transistor N3R est donnée par la relation suivante :
où SN2, SP1, SN1, SP2 représentent respectivement les surfaces des transistors N2, P1, N1 et P2, UT représentant la tension thermique.Transistors N1 and N2 are biased to operate in low inversion region and behave as bipolar transistors. The transistor N3R is biased to operate in a zone of strong inversion and thus to operate in the linear zone, with a very low drain voltage. According to relation (4), the voltage V SN1 across the terminals of the transistor N3R is given by the following relation:
where S N2 , S P1 , S N1 , S P2 respectively represent the surfaces of the transistors N2, P1, N1 and P2, U T representing the thermal voltage.
On obtient ainsi un régulateur de type « band gap » classique, avec le transistor MOS N3R fonctionnant en résistance, ce régulateur fournissant une tension constante en température et indépendante de la tension d'alimentation, cette tension faisant office de tension de référence VRef en sortie. Cette tension est disponible en un point A au niveau du drain du transistor N4 relié à la grille de ce dernier et à la grille du transistor N3R.Thus, a conventional "band gap" type regulator is obtained with the MOS transistor N3R operating as a resistor, this regulator providing a constant temperature voltage and independent of the supply voltage, this voltage acting as a reference voltage V Ref. exit. This voltage is available at a point A at the drain of the transistor N4 connected to the gate of the latter and to the gate of the transistor N3R.
Le courant I parcourant le transistor N3R ainsi que les autres branches du miroir de courant est égal à
Le schéma de la
En effet, dans la relation (6), tous les paramètres sont constants sauf la tension thermique qui dépend directement de la température absolue.Indeed, in the relation (6), all the parameters are constant except the thermal tension which depends directly on the absolute temperature.
La
La longueur L du canal est la distance entre les deux zones de diffusion 61, 62 formant la source et le drain. La largeur W du canal est la dimension perpendiculaire dans le plan du substrat. Dans une structure classique d'un transistor MOS, la longueur est faible et le rapport L/W est faible, typiquement inférieur à 1 comme illustré par la
Ainsi, cette structure à canal ultra long permet d'obtenir, dans les transistors N3R et N4, un courant quasi stable en température et très faible, quasi stable en fonction des variations de la tension d'alimentation, ainsi qu'une tension grille-source faible stable en température. Dans le montage de la
La structure d'un tel transistor, à canal ultra long, est illustrée par les figures suivantes.
- La
figure 7 illustre un mode de réalisation de transistors MOS utilisés dans un dispositif selon l'invention. Lafigure 7 présente, par une vue topographique, une structure de circuit intégré à plusieurs transistors MOS, à canal N dans cet exemple, ces transistors MOS ayant un canal ultra long. Pour chaque transistor est représenté lasource 71,le canal 72 et ledrain 73. La figure montre que les canaux des transistors sont ultra longs. Chaque transistor est intégré dansun caisson 74 dopé N+ implanté surun substrat 75 dopé P- conformément à une structure de type bulk par exemple. - Les
figures 8a et 8b illustrent plus précisément un des transistors MOS de la vue de lafigure 7 , lafigure 8a présentant une vue de dessus et lafigure 8b présentant une vue en coupe selon AA où l'on retrouve une structure de type bulk, d'autres types de structures étant possibles. Lafigure 8a montre une extrémité de deux transistors MOS avec lessources 71 représentées, lecanal 72 se prolongeant dans la direction D vers les drains non représentés.
- The
figure 7 illustrates an embodiment of MOS transistors used in a device according to the invention. Thefigure 7 present, by a topographic view, an integrated circuit structure to several N-channel MOS transistors in this example, these MOS transistors having an ultra long channel. For each transistor is represented thesource 71, thechannel 72 and thedrain 73. The figure shows that the channels of the transistors are ultra long. Each transistor is integrated in an N + dopedbox 74 implanted on a P-dopedsubstrate 75 in accordance with a bulk-type structure for example. - The
Figures 8a and 8b illustrate more precisely one of the MOS transistors from the view of thefigure 7 , thefigure 8a with a view from above and thefigure 8b having a sectional view along AA where there is a bulk type structure, other types of structures being possible. Thefigure 8a shows an end of two MOS transistors with thesources 71 shown, thechannel 72 extending in the direction D to the drains not shown.
Les transistors sont diffusés et isolés dans un caisson 74, un mur 81 dopé P+ assure un isolement entre les transistors.The transistors are scattered and isolated in a
Ces
La
Le circuit reprend une partie 90 correspondant au schéma de la
Un quatrième transistor P4, à canal P, est connecté en miroir de courant avec les transistors P1, P2, P3. Un troisième transistor N5, à canal N, est connecté en miroir de courant avec les transistors N1, N2. Un couple de transistors MOS N10, P10 est connecté entre le drain du transistor P4 et le drain du transistor N5. Plus particulièrement, le drain du transistor N10 est connecté au drain du transistor P4 et sa source est connectée au drain du transistor N5.A fourth P-channel transistor P4 is connected in current mirror with the transistors P1, P2, P3. A third N5 transistor, N channel, is connected in current mirror with the transistors N1, N2. A pair of MOS transistors N10, P10 is connected between the drain of transistor P4 and the drain of transistor N5. More particularly, the drain of the transistor N10 is connected to the drain of the transistor P4 and its source is connected to the drain of the transistor N5.
Le transistor P10 est connecté au transistor N10, sa source et son drain étant respectivement connectés au drain et à la source du transistor N10. La grille et le drain du transistor N10 sont reliés ensemble à la source du transistor P10 elle-même reliée au drain du transistor P5 fournissant la tension de sortie Vs régulée. La source du transistor N10 et le drain du transistor P10 étant reliés ensemble à l'entrée positive de l'amplificateur opérationnel.The transistor P10 is connected to the transistor N10, its source and its drain being respectively connected to the drain and to the source of the transistor N10. The gate and the drain of the transistor N10 are connected together to the source of the transistor P10 itself connected to the drain of the transistor P5 supplying the regulated output voltage Vs. The source of transistor N10 and the drain of transistor P10 are connected together to the positive input of the operational amplifier.
Par effet miroir, les deux transistors P4 et N5 véhiculent le même courant 2I. Etant donné que le transistor N10 est connecté entre ces deux transistors, il véhicule ce même courant 2I entre son drain et sa source dans sa branche qui le relie au transistor N5. Le courant sur les autres branches est alors nul. Ces autres branches, notamment la branche 98 reliant le transistor N10 au transistor P5, présentent alors avantageusement une haute impédance équivalente. Il en résulte que le potentiel Vref, par exemple 0,8 volts, aux bornes du transistor N4 est reporté aux bornes du transistor N10, lorsque ce dernier est commandé en conduction.By mirror effect, the two transistors P4 and N5 convey the same current 2I. Since the transistor N10 is connected between these two transistors, it conveys the same current 2I between its drain and its source in its branch which connects it to the transistor N5. The current on the other branches is then zero. These other branches, in particular the
La conduction du transistor P10 est commandée par un signal de commande appliqué sur sa grille et courcircuite le transistor N10 en fournissant les pas de tension. Dans le cas d'une application du type de la
Lorsque le transistor N10 est commandé à l'état bloqué, la tension de sortie est égale à 0,8 V qui est la tension aux bornes du transistor N4. Lorsque le transistor N10 est commandé à l'état passant, la tension de 0,8 V présente aux bornes du transistor N10 s'ajoute, comme décrit précédemment, et permet d'obtenir une tension de 1,6 V en sortie Vs.When the transistor N10 is controlled in the off state, the output voltage is equal to 0.8 V which is the voltage across the transistor N4. When the transistor N10 is controlled in the on state, the voltage of 0.8 V present at the terminals of the transistor N10 is added, as previously described, and makes it possible to obtain a voltage of 1.6 V at the output Vs.
Comme les transistors N3R et N4, le transistor N10 est un transistor MOS à canal ultra long. Le transistor N10 est identique aux transistors N3R et N4 afin d'assurer une stabilité parfaite en température.Like transistors N3R and N4, transistor N10 is an ultra long channel MOS transistor. Transistor N10 is identical to transistors N3R and N4 to ensure perfect temperature stability.
La
Des transistors fantômes 99 encore appelés « dummy » sont par exemple intercalés à l'intérieur du caisson. Ces transistors fictifs ont leurs terminaux court-circuités.
Les transistors N10 et P10 peuvent être combinés en un seul transistor.Transistors N10 and P10 can be combined into a single transistor.
La
L'exemple de la
A titre d'exemple, les dimensions d'un transistor à canal ultra long peuvent être de 0,6 µm pour la largeur W et de 320 µm pour la longueur L. Le rapport L/W d'un canal ultra long est au moins de l'ordre de quelques dizaines et peut atteindre plusieurs centaine, voire atteindre la valeur 1000 et au-delà.For example, the dimensions of an ultra long channel transistor may be 0.6 μm for the width W and 320 μm for the length L. The ratio L / W of an ultra long channel is at least of the order of a few tens and can reach several hundred or even reach the
La
Une première courbe 272 illustre l'allure de la tension produite par le transducteur tout au long des phases de vol d'un avion, décollage, vol de croisière et atterrissage, comme défini relativement à la
L'invention a été décrite dans le cadre d'une application avionique. Elle peut s'appliquer dans beaucoup d'autres domaines.The invention has been described in the context of an avionics application. It can apply in many other areas.
Elle peut notamment s'appliquer avantageusement dans des dispositifs du domaine spatial.It can notably be applied advantageously in space domain devices.
Claims (9)
le transistor N3R étant apte à fonctionner dans sa zone linéaire, la valeur du courant généré (I) étant fonction de la résistance équivalente (Req) de ce transistor, les transistors N3R et N4 ayant un canal (72) ultra long, de sorte que le rapport L/W est au moins supérieur à plusieurs centaines, L étant la longueur du canal et W sa largeur, les valeurs de W et de L/W étant déterminées pour obtenir une valeur de courant stable en fonction de la variation de la tension d'alimentation.
the transistor N3R being able to operate in its linear zone, the value of the generated current (I) being a function of the equivalent resistance (R eq ) of this transistor, the transistors N3R and N4 having an ultra long channel (72), so that the ratio L / W is at least greater than several hundreds, L being the length of the channel and W its width, the values of W and L / W being determined to obtain a stable current value as a function of the variation of the supply voltage.
le pas de tension (Vref) présent aux bornes du transistor N4 étant reproduit aux bornes du transistor N10 lorsque ce dernier est commandé à l'état passant, la tension de sortie s'incrémentant selon un pas de tension fonction de la commande du transistor N10.
the voltage step (V ref ) present at the terminals of the transistor N4 being reproduced at the terminals of the transistor N10 when the latter is controlled in the on state, the output voltage being incremented according to a voltage step which is a function of the control of the transistor N10.
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FR1003707A FR2965130B1 (en) | 2010-09-17 | 2010-09-17 | CURRENT GENERATOR, IN PARTICULAR OF THE ORDER OF NANO AMPERES AND VOLTAGE REGULATOR USING SUCH A GENERATOR |
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EP (1) | EP2434364B1 (en) |
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CN104516390B (en) * | 2014-04-16 | 2018-04-17 | 上海华虹宏力半导体制造有限公司 | Generating circuit from reference voltage |
US9851740B2 (en) * | 2016-04-08 | 2017-12-26 | Qualcomm Incorporated | Systems and methods to provide reference voltage or current |
CN106547300B (en) * | 2017-01-10 | 2017-10-13 | 佛山科学技术学院 | A kind of voltage reference source circuit of low-power consumption low-temperature coefficient |
US10013005B1 (en) * | 2017-08-31 | 2018-07-03 | Xilinx, Inc. | Low voltage regulator |
CN109240407B (en) * | 2018-09-29 | 2020-07-31 | 北京兆易创新科技股份有限公司 | Reference source |
CN111124022A (en) * | 2018-10-31 | 2020-05-08 | 财团法人成大研究发展基金会 | Digital linear regulator and power metal oxide semiconductor array |
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JPH03131916A (en) * | 1989-10-18 | 1991-06-05 | Seiko Epson Corp | Constant voltage circuit |
US5783934A (en) * | 1995-08-01 | 1998-07-21 | Information Storage Devices, Inc. | CMOS voltage regulator with diode-connected transistor divider circuit |
EP2172828A1 (en) * | 2007-07-23 | 2010-04-07 | National University Corporation Hokkaido University | Reference voltage generation circuit |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
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FR2676875B1 (en) * | 1991-05-24 | 1997-01-03 | Alcatel Espace | PROGRAMMABLE AMPLIFIER DEVICE. |
FR2732129B1 (en) * | 1995-03-22 | 1997-06-20 | Suisse Electronique Microtech | REFERENCE CURRENT GENERATOR IN CMOS TECHNOLOGY |
US7994848B2 (en) * | 2006-03-07 | 2011-08-09 | Cypress Semiconductor Corporation | Low power voltage reference circuit |
-
2010
- 2010-09-17 FR FR1003707A patent/FR2965130B1/en not_active Expired - Fee Related
-
2011
- 2011-09-15 EP EP20110181507 patent/EP2434364B1/en not_active Not-in-force
- 2011-09-19 US US13/236,480 patent/US9058045B2/en not_active Expired - Fee Related
- 2011-09-19 CN CN 201110324951 patent/CN102411392A/en active Pending
- 2011-09-20 JP JP2011204814A patent/JP5983909B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH03131916A (en) * | 1989-10-18 | 1991-06-05 | Seiko Epson Corp | Constant voltage circuit |
US5783934A (en) * | 1995-08-01 | 1998-07-21 | Information Storage Devices, Inc. | CMOS voltage regulator with diode-connected transistor divider circuit |
EP2172828A1 (en) * | 2007-07-23 | 2010-04-07 | National University Corporation Hokkaido University | Reference voltage generation circuit |
Non-Patent Citations (3)
Title |
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HENRI J OGUEY ET AL: "CMOS Current Reference Without Resistance", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 32, no. 7, 1 July 1997 (1997-07-01), XP011060518, ISSN: 0018-9200 * |
L. VADASZ: "The use of MOS structure for the design of high value resistors in monolithic integrated circuits", IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 13, no. 5, 1 May 1966 (1966-05-01), pages 459 - 465, XP055018278, ISSN: 0018-9383, DOI: 10.1109/T-ED.1966.15712 * |
MATSUDA T ET AL: "A TEMPERATURE AND SUPPLY VOLTAGE INDEPENDENT CMOS VOLTAGE REFERENCE CIRCUIT", IEICE TRANSACTIONS ON ELECTRONICS, INSTITUTE OF ELECTRONICS, TOKYO, JP, vol. E88-C, no. 5, 1 May 2005 (2005-05-01), pages 1087 - 1093, XP001231183, ISSN: 0916-8524, DOI: 10.1093/IETELE/E88-C.5.1087 * |
Also Published As
Publication number | Publication date |
---|---|
EP2434364B1 (en) | 2014-06-04 |
FR2965130A1 (en) | 2012-03-23 |
JP5983909B2 (en) | 2016-09-06 |
JP2012074031A (en) | 2012-04-12 |
US20120068684A1 (en) | 2012-03-22 |
US9058045B2 (en) | 2015-06-16 |
FR2965130B1 (en) | 2013-05-24 |
CN102411392A (en) | 2012-04-11 |
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