EP2221890A1 - Light emitting device package - Google Patents
Light emitting device package Download PDFInfo
- Publication number
- EP2221890A1 EP2221890A1 EP09178832A EP09178832A EP2221890A1 EP 2221890 A1 EP2221890 A1 EP 2221890A1 EP 09178832 A EP09178832 A EP 09178832A EP 09178832 A EP09178832 A EP 09178832A EP 2221890 A1 EP2221890 A1 EP 2221890A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- light emitting
- emitting device
- package
- package body
- device package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007373 indentation Methods 0.000 claims abstract description 24
- 229910052751 metal Inorganic materials 0.000 claims description 42
- 239000002184 metal Substances 0.000 claims description 42
- 239000000463 material Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 229910000679 solder Inorganic materials 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 239000007769 metal material Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 2
- 238000005530 etching Methods 0.000 description 7
- 239000004065 semiconductor Substances 0.000 description 5
- 238000012986 modification Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910004205 SiNX Inorganic materials 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/642—Heat extraction or cooling elements characterized by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body
Definitions
- the present disclosure relates to a light emitting device package.
- LEDs Light emitting devices
- a nitride semiconductor such as a gallium nitride (GaN) semiconductor that has a high thermal stability and a wide band gap.
- GaN semiconductor can be combined with other elements to fabricate a semiconductor layer emitting green, blue or white light.
- the related-art light emitting device packages including LEDs have a poor heat emission efficiency.
- one object of the present invention is to address the above-noted and other problems.
- Another object of the present invention is to provide a light emitting device package that improves the heat emission efficiency.
- the present invention provides in one aspect a light emitting device package including a package body having a plurality of discrete and separated three-dimensional-shaped indentations formed in an undersurface of the package body and configured to dissipate heat generated in the package body, a cavity in the package body, and a light emitting device including at least one emitting diode in the cavity of the package body and configured to emit light.
- Fig. 1 is an overview illustrating a light emitting device package according to an embodiment of the present invention.
- the light emitting device package includes a package body 210, a cavity C and a light emitting device 100.
- the package body 210 also includes grooves, three-dimensional patterns, etc., which will be discussed in more detail later.
- the cavity C is formed in the package body 210, and the light emitting device 100 is disposed in the cavity C.
- Figs. 2-6 illustrate a method of manufacturing a light emitting device package according to an embodiment of the present invention.
- the package body 210 is prepared, and a first mask pattern material 221a and a second mask pattern material 222a are formed on the top surface and the undersurface of the package body 210, respectively.
- the package body 210 can also be formed of a silicon material, for example, a silicon-based wafer level package (WLP), and be formed of a polyhedron-shaped frame such as a rectangular parallelepiped.
- WLP silicon-based wafer level package
- the first and second mask pattern materials 221a and 222a can be formed of a nitride such as a silicon nitride (SiNx).
- the cavity C is formed in the package body 210.
- a first mask pattern 221 is formed to expose a portion of the top surface of the package body 210 by patterning the first mask pattern material 221a. For example, after a first photo-sensitive layer pattern is formed on the first mask pattern material 221a, a portion of the first mask pattern of the first photo-sensitive layer pattern 221a can be etched to expose a portion of the top surface of the package body 210 using the first photo-sensitive layer pattern as an etching mask.
- the package body 210 is etched to form the cavity C using the first mask pattern 221 and the second mask pattern 222 covering the undersurface of the package body 210 as an etch mask.
- the package body 210 can be wet-etched to form the cavity C using the first mask pattern 221 and the second mask pattern 222 as an etching mask.
- the etching process can be progressed in a declined direction to allow the cavity to have a wider width of the upper part than that of the lower part as shown in Fig 3 . Further, the cavity C having such a shape has a more efficient optical reflectance.
- a third mask pattern 223 is formed on the undersurface of the package body 210 to expose a certain region thereof.
- the third mask pattern 223 can be formed by etching the second mask pattern 222 used in the formation of the cavity C to expose a portion of the undersurface of the package body 210.
- the third mask pattern 223 can be formed by performing a dry etching process.
- the third mask pattern 223 can be separately formed after removing the second mask pattern 222.
- a plurality of discrete and separated three-dimensional-shaped indentations G are formed by etching a portion of the undersurface of the package body 210 using the third mask pattern 223 as an etching mask.
- the discrete and separated three-dimensional-shaped indentations G can be formed by wet-etching a portion of the undersurface of the package body 210 using the third mask pattern 223 as an etching mask.
- the indentations G are discrete and separated from each other by a predetermined distance.
- the discrete and separated three-dimensional-shaped indentations G formed in the undersurface of the package body 210 can have at least one of a pyramid shape, a frustrum of a pyramid shape, a prism shape, a circular cylinder shape and a circular truncated cone shape.
- the discrete and separated three-dimensional-shaped indentations G can also have a pyramid shape such as a quadrangular pyramid, a triangular pyramid, etc. or a prism shape such as triangular prism, a square prism, a circular cylinder, etc.
- the discrete and separated three-dimensional-shaped indentations G improve the heat emission efficiency of the package body 210 by expanding a heat emission area.
- a discrete and separated three-dimensional-shaped indentation G has a quadrangular pyramid shape
- "a" represents the depth or height of the indentations G
- "b” represents the width of the indentations G
- "c” represents the length of an oblique side of the indentations.
- the package body 210 is a silicon substrate having a ⁇ 100> crystal orientation
- the discrete and separated three-dimensional-shaped indentations G can be formed at an inclined angle of about 54.74°.
- a discrete and separated three-dimensional-shaped indentation G is a quadrangular pyramid
- the depth of the discrete and separated three-dimensional-shaped indentation G is "a" on the vertical sectional view one side of the square
- the bottom of the quadrangular pyramid is "b”
- the height of each of four triangles of the quadrangular pyramid is "c.”
- the area of the triangle is 1/2 X b X c
- the embodiments of the present invention improve the heat emission efficiency by forming the discrete and separated three-dimensional-shaped indentations G in the undersurface of the package body 210 to expand a heat emission area by about 70 % or more of from b 2 to 1.73b 2.
- an insulating layer 240 is formed on the package body 210.
- a metal layer 250 is formed on the insulating layer 240.
- the insulating layer 240 can be formed of an insulating material such as a silicon oxide, a silicon nitride, AlN, and SiC.
- the insulating layer 240 can also be formed through a thermal oxidation process, etc.
- the insulating layer 240 is also formed to electrically isolate the package body 210 from the metal layer 250 or an external electrode layer sequentially formed on the insulating layer 240.
- the metal layer 250 which is an electrode layer electrically connected to the light emitting device 100, can be formed in a mono- or multi-layer. Also, because a contact between a solder 260 and the insulating layer 240 can be weak, a metal can be formed in the discrete and separated three-dimensional-shaped indentations G in the undersurface of the package body 210.
- the metal layer 250 can include a first metal layer 251 serving as an electrode.
- a metal layer can be formed on the insulating layer 240 on the discrete and separated three-dimensional-shaped indentations G to be connected to the first metal layer 251, or a third metal layer can be formed separately from the first metal layer 251.
- the first metal layer 251 or a second metal layer 252 can be extended to the discrete and separated three-dimensional-shaped indentations G of the undersurface of a chip, and the first metal layer 251 can be extended to the undersurface of the chip.
- the third metal layer can be formed on the undersurface of the chip separately from the metal layer 250.
- the metal layer formed in the cavity C among the metal layer 250 can also be formed of a material having a high reflectance, or can be formed of a metal material having a high adhesive strength to resin material.
- the uppermost layer can be formed of a metal material including at least one of Al, Ag and APC (Ag+Pd+Cu).
- the light emitting device 100 is disposed in the cavity C of the package body 210 and can be attached using an adhesive, for example.
- the adhesive can also be formed of a non-conductive material.
- the light emitting device 100 can also include at least one colored LED chip or UV chip, but is not limited thereto.
- the light emitting device 100 is connected to the metal layer 250 through a wire 280.
- a resin material 230 is also formed in the cavity C.
- the resin material 230 can be formed of a transparent epoxy or silicon material, and can include a fluorescent substance. Then, the package body 210 including the light emitting device 100 can be attached to a PCB 300 using a solder 260.
- Figs. 7 and 8 are overviews illustrating a light emitting device package according to other embodiments of the present invention.
- the metal layer 250 in the undersurface of the package body includes the first metal layer 251, the second metal layer 252 and a third metal layer 253.
- Fig. 8 illustrates the metal layer 250 in the undersurface of the package body includes the first metal layer 251 and the second metal layer 252.
- the light emitting device 100 can be formed on the metal layer 250.
- the light emitting device 100 can be formed on the third metal layer 253 as in Fig. 7 or the light emitting device 100 can be formed on the second metal layer 252 as in Fig 8 .
- one wire 280 can be connected to the light emitting device 100.
- the solder 260 can be formed on the metal layer 250 and not be formed on the insulating layer 240.
- the light emitting device package increases the heat emission efficiency by expanding a heat emission area through the discrete and separated three-dimensional-shaped indentations G formed in the package body 210.
- a layer when referred to as being 'on/over' another layer or substrate, it can be directly on/over another layer or substrate, or intervening layers can also be present. Further, when a layer is referred to as being 'under/below' another layer, it can be directly under/below another layer and one or more intervening layers can also be present. In addition, when a layer is referred to as being 'between' two layers, it can be the only layer between the two layers or one or more intervening layers can also be present.
- any reference in this specification to "one embodiment,” “an embodiment,” “example embodiment,” etc. means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the invention.
- the appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment.
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
Description
- The present disclosure relates to a light emitting device package.
- Light emitting devices (LEDs) are semiconductor devices that convert current into light. One example of an LED is a nitride semiconductor such as a gallium nitride (GaN) semiconductor that has a high thermal stability and a wide band gap. The GaN semiconductor can be combined with other elements to fabricate a semiconductor layer emitting green, blue or white light. However, the related-art light emitting device packages including LEDs have a poor heat emission efficiency.
- Accordingly, one object of the present invention is to address the above-noted and other problems.
- Another object of the present invention is to provide a light emitting device package that improves the heat emission efficiency.
- To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, the present invention provides in one aspect a light emitting device package including a package body having a plurality of discrete and separated three-dimensional-shaped indentations formed in an undersurface of the package body and configured to dissipate heat generated in the package body, a cavity in the package body, and a light emitting device including at least one emitting diode in the cavity of the package body and configured to emit light.
- Further scope of applicability of the present invention will become apparent from the detailed description given hereinafter. However, it should be understood that the detailed description and specific examples, while indicating preferred embodiments of the invention, are given by illustration only, since various changes and modifications within the spirit and scope of the invention will become apparent to those skilled in the art from this detailed description.
- The present invention will become more fully understood from the detailed description given hereinbelow and the accompanying drawings, which are given by illustration only, and thus are not limitative of the present invention, and wherein:
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Fig. 1 is an overview illustrating a light emitting device package according to an embodiment of the present invention; -
Figs. 2 to 6 are overviews illustrating a method of manufacturing a light emitting device package according to an embodiment of the present invention; -
Fig. 7 is an overview illustrating a light emitting device package according to another embodiment of the present invention; and -
Fig. 8 is an overview illustrating a light emitting device package according to still another embodiment of the present invention. - Reference will now be made in detail to the embodiments of the present disclosure, examples of which are illustrated in the accompanying drawings.
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Fig. 1 is an overview illustrating a light emitting device package according to an embodiment of the present invention. As shown, the light emitting device package includes apackage body 210, a cavity C and alight emitting device 100. Thepackage body 210 also includes grooves, three-dimensional patterns, etc., which will be discussed in more detail later. - Further, in the embodiment shown in
Fig. 1 , the cavity C is formed in thepackage body 210, and thelight emitting device 100 is disposed in the cavity C. The rest of the reference numerals inFig. 1 will now be described with respect toFigs. 2-6 , which illustrate a method of manufacturing a light emitting device package according to an embodiment of the present invention. - Referring to
Fig. 2 , thepackage body 210 is prepared, and a firstmask pattern material 221a and a secondmask pattern material 222a are formed on the top surface and the undersurface of thepackage body 210, respectively. Thepackage body 210 can also be formed of a silicon material, for example, a silicon-based wafer level package (WLP), and be formed of a polyhedron-shaped frame such as a rectangular parallelepiped. Further, the first and secondmask pattern materials - Referring to
Fig. 3 , the cavity C is formed in thepackage body 210. Further, afirst mask pattern 221 is formed to expose a portion of the top surface of thepackage body 210 by patterning the firstmask pattern material 221a. For example, after a first photo-sensitive layer pattern is formed on the firstmask pattern material 221a, a portion of the first mask pattern of the first photo-sensitive layer pattern 221a can be etched to expose a portion of the top surface of thepackage body 210 using the first photo-sensitive layer pattern as an etching mask. - Next, the
package body 210 is etched to form the cavity C using thefirst mask pattern 221 and thesecond mask pattern 222 covering the undersurface of thepackage body 210 as an etch mask. For example, thepackage body 210 can be wet-etched to form the cavity C using thefirst mask pattern 221 and thesecond mask pattern 222 as an etching mask. - In this instance, when the
package body 210 is a silicon substrate having a <100> crystal orientation, the etching process can be progressed in a declined direction to allow the cavity to have a wider width of the upper part than that of the lower part as shown inFig 3 . Further, the cavity C having such a shape has a more efficient optical reflectance. - Referring to
Fig. 4 , athird mask pattern 223 is formed on the undersurface of thepackage body 210 to expose a certain region thereof. For example, thethird mask pattern 223 can be formed by etching thesecond mask pattern 222 used in the formation of the cavity C to expose a portion of the undersurface of thepackage body 210. Further, after a second photo-sensitive layer pattern is formed on thesecond mask pattern 222, thethird mask pattern 223 can be formed by performing a dry etching process. - Alternatively, the
third mask pattern 223 can be separately formed after removing thesecond mask pattern 222. - Referring to
Fig. 5 , a plurality of discrete and separated three-dimensional-shaped indentations G are formed by etching a portion of the undersurface of thepackage body 210 using thethird mask pattern 223 as an etching mask. For example, the discrete and separated three-dimensional-shaped indentations G can be formed by wet-etching a portion of the undersurface of thepackage body 210 using thethird mask pattern 223 as an etching mask. Also, as shown inFig. 5 , the indentations G are discrete and separated from each other by a predetermined distance. - Further, the discrete and separated three-dimensional-shaped indentations G formed in the undersurface of the
package body 210 can have at least one of a pyramid shape, a frustrum of a pyramid shape, a prism shape, a circular cylinder shape and a circular truncated cone shape. The discrete and separated three-dimensional-shaped indentations G can also have a pyramid shape such as a quadrangular pyramid, a triangular pyramid, etc. or a prism shape such as triangular prism, a square prism, a circular cylinder, etc. - In addition, the discrete and separated three-dimensional-shaped indentations G improve the heat emission efficiency of the
package body 210 by expanding a heat emission area. For example, as illustrated in the magnified view ofFig. 5 , when a discrete and separated three-dimensional-shaped indentation G has a quadrangular pyramid shape, "a" represents the depth or height of the indentations G, "b" represents the width of the indentations G, and "c" represents the length of an oblique side of the indentations. Also, when thepackage body 210 is a silicon substrate having a <100> crystal orientation, the discrete and separated three-dimensional-shaped indentations G can be formed at an inclined angle of about 54.74°. - Further, when a discrete and separated three-dimensional-shaped indentation G is a quadrangular pyramid, the depth of the discrete and separated three-dimensional-shaped indentation G is "a" on the vertical sectional view one side of the square, the bottom of the quadrangular pyramid is "b", and the height of each of four triangles of the quadrangular pyramid is "c." In this instance, the area of the triangle is 1/2 X b X c, and c can be expressed as c = b/(2cos54.74°). Therefore, the area S of four triangles on the quadrangular pyramid can be expressed as S = 4 X 1/2 X b X b/(2cos54.71°) = 1.73b2.
- Accordingly, the embodiments of the present invention improve the heat emission efficiency by forming the discrete and separated three-dimensional-shaped indentations G in the undersurface of the
package body 210 to expand a heat emission area by about 70 % or more of from b2 to 1.73b2. - Next, and referring to
Fig. 6 , after thefirst mask pattern 221 and thethird mask pattern 223 are removed, aninsulating layer 240 is formed on thepackage body 210. Then, ametal layer 250 is formed on theinsulating layer 240. Further, theinsulating layer 240 can be formed of an insulating material such as a silicon oxide, a silicon nitride, AlN, and SiC. Theinsulating layer 240 can also be formed through a thermal oxidation process, etc. Theinsulating layer 240 is also formed to electrically isolate thepackage body 210 from themetal layer 250 or an external electrode layer sequentially formed on theinsulating layer 240. - In addition, the
metal layer 250, which is an electrode layer electrically connected to thelight emitting device 100, can be formed in a mono- or multi-layer. Also, because a contact between asolder 260 and theinsulating layer 240 can be weak, a metal can be formed in the discrete and separated three-dimensional-shaped indentations G in the undersurface of thepackage body 210. - Also, the
metal layer 250 can include afirst metal layer 251 serving as an electrode. In addition, a metal layer can be formed on theinsulating layer 240 on the discrete and separated three-dimensional-shaped indentations G to be connected to thefirst metal layer 251, or a third metal layer can be formed separately from thefirst metal layer 251. Further, thefirst metal layer 251 or asecond metal layer 252 can be extended to the discrete and separated three-dimensional-shaped indentations G of the undersurface of a chip, and thefirst metal layer 251 can be extended to the undersurface of the chip. - Also, the third metal layer can be formed on the undersurface of the chip separately from the
metal layer 250. The metal layer formed in the cavity C among themetal layer 250 can also be formed of a material having a high reflectance, or can be formed of a metal material having a high adhesive strength to resin material. In addition, when the metal layer is a multi-layer, the uppermost layer can be formed of a metal material including at least one of Al, Ag and APC (Ag+Pd+Cu). - Next, the
light emitting device 100 is disposed in the cavity C of thepackage body 210 and can be attached using an adhesive, for example. The adhesive can also be formed of a non-conductive material. Thelight emitting device 100 can also include at least one colored LED chip or UV chip, but is not limited thereto. - Further, the
light emitting device 100 is connected to themetal layer 250 through awire 280. Aresin material 230 is also formed in the cavity C. Theresin material 230 can be formed of a transparent epoxy or silicon material, and can include a fluorescent substance. Then, thepackage body 210 including thelight emitting device 100 can be attached to aPCB 300 using asolder 260. - Next,
Figs. 7 and8 are overviews illustrating a light emitting device package according to other embodiments of the present invention. As shown inFig. 7 , themetal layer 250 in the undersurface of the package body includes thefirst metal layer 251, thesecond metal layer 252 and athird metal layer 253. Alternatively,Fig. 8 illustrates themetal layer 250 in the undersurface of the package body includes thefirst metal layer 251 and thesecond metal layer 252. - Further, if the
light emitting device 100 is a vertical shape light emitting device, thelight emitting device 100 can be formed on themetal layer 250. For example, thelight emitting device 100 can be formed on thethird metal layer 253 as inFig. 7 or thelight emitting device 100 can be formed on thesecond metal layer 252 as inFig 8 . In this instance, onewire 280 can be connected to thelight emitting device 100. Also, thesolder 260 can be formed on themetal layer 250 and not be formed on the insulatinglayer 240. - Thus, as described above, the light emitting device package according to the embodiments of the present invention increases the heat emission efficiency by expanding a heat emission area through the discrete and separated three-dimensional-shaped indentations G formed in the
package body 210. - Also, when describing the embodiments, when a layer (or film) is referred to as being 'on/over' another layer or substrate, it can be directly on/over another layer or substrate, or intervening layers can also be present. Further, when a layer is referred to as being 'under/below' another layer, it can be directly under/below another layer and one or more intervening layers can also be present. In addition, when a layer is referred to as being 'between' two layers, it can be the only layer between the two layers or one or more intervening layers can also be present.
- Also, any reference in this specification to "one embodiment," "an embodiment," "example embodiment," etc., means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the invention. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with any embodiment, it is submitted that it is within the purview of one skilled in the art to affect such feature, structure, or characteristic in connection with other ones of the embodiments.
- Although embodiments have been described with reference to a number of illustrative embodiments thereof, numerous other modifications and embodiments can be devised by those skilled in the art that will fall within the spirit and scope of the principles of this disclosure. More particularly, various variations and modifications are possible in the component parts and/or arrangements of the subject combination arrangement within the scope of the disclosure, the drawings and the appended claims. In addition to variations and modifications in the component parts and/or arrangements, alternative uses will also be apparent to those skilled in the art.
Claims (15)
- A light emitting device package, comprising:a package body including a plurality of discrete andseparated three-dimensional-shaped indentations formed in an undersurface of the package body and configured to dissipate heat generated in the package body;a cavity in the package body; anda light emitting device including at least one emitting diode in the cavity of the package body and configured to emit light.
- The light emitting device package of claim 1, further comprising:first and second metal layers on inner surfaces of the cavity and extending from a portion near the light emitting device to opposite outside surfaces sides of the package body, respectively, said first and second metal layers functioning as electrodes for turning on and off the light emitting device.
- The light emitting device package of claim 2, further comprising:an insulating layer formed under the first and second metal layers on the package body and on the plurality of discrete and separated three-dimensional-shaped indentations.
- The light emitting device package of claim 3, wherein the insulating layer comprises at least one of a silicon oxide, a silicon nitride, AlN and SiC.
- The light emitting device package of claim 3, wherein the first and second metal layers extend around the package body and over the plurality of discrete and separated three-dimensional-shaped indentations with the insulating layer being disposed underneath the first and second metal layers.
- The light emitting device package of claim 2, wherein the first and second metal layers extending in the cavity comprise a metal material that reflects the light emitted by the light emitting device.
- The light emitting device package of claim 2, wherein the first and second metal layers extend underneath the light emitting device.
- The light emitting device package of claim 1, wherein the plurality of discrete and separated three-dimensional-shaped indentations in the undersurface of the package body comprise at least one of a pyramid shape, a prism shape and a circular cylinder shape.
- The light emitting device package of claim 1, wherein the package body includes a silicon substrate.
- The light emitting device package of claim 1, wherein the cavity has a wider width at an upper part than a width of a lower part thereof.
- The light emitting device package of claim 1, further comprising:a resin material in the cavity and covering the lightemitting device.
- The light emitting device package of claim 1, further comprising:a printed circuit board including the package body having the light emitting device and being mounted to the printed circuit board via solder.
- The light emitting device package of claim 1, wherein the cavity has outwardly inclined inner surfaces including a reflective material configured to reflect light emitted by the light emitting device.
- The light emitting device package of claim 2, wherein the first metal layer runs under the light emitting diode and the second metal layer stops short of the light emitting diode, and a wire connects the second metal layer to the light emitting diode for turning on and off the light emitting diode.
- The light emitting device package of claim 2, wherein the first and second metal layers stop short of the light emitting diode, and two wires respectively connect the first and second metal layers to the light emitting diode for turning on and off the light emitting diode.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020090013576A KR101063997B1 (en) | 2009-02-18 | 2009-02-18 | Light emitting device package and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
EP2221890A1 true EP2221890A1 (en) | 2010-08-25 |
EP2221890B1 EP2221890B1 (en) | 2016-03-23 |
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Application Number | Title | Priority Date | Filing Date |
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EP09178832.3A Not-in-force EP2221890B1 (en) | 2009-02-18 | 2009-12-11 | Light emitting device package |
Country Status (4)
Country | Link |
---|---|
US (1) | US8269249B2 (en) |
EP (1) | EP2221890B1 (en) |
KR (1) | KR101063997B1 (en) |
CN (1) | CN101807651B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012074423A (en) * | 2010-09-27 | 2012-04-12 | Panasonic Electric Works Sunx Co Ltd | Led module |
KR102170214B1 (en) * | 2014-01-24 | 2020-10-26 | 엘지이노텍 주식회사 | Light emittng device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6531328B1 (en) * | 2001-10-11 | 2003-03-11 | Solidlite Corporation | Packaging of light-emitting diode |
JP2003243718A (en) * | 2002-02-14 | 2003-08-29 | Matsushita Electric Works Ltd | Light emitting device |
US20060124953A1 (en) * | 2004-12-14 | 2006-06-15 | Negley Gerald H | Semiconductor light emitting device mounting substrates and packages including cavities and cover plates, and methods of packaging same |
US20060220036A1 (en) * | 2005-03-30 | 2006-10-05 | Samsung Electro-Mechanics Co., Ltd. | LED package using Si substrate and fabricating method thereof |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060097385A1 (en) | 2004-10-25 | 2006-05-11 | Negley Gerald H | Solid metal block semiconductor light emitting device mounting substrates and packages including cavities and heat sinks, and methods of packaging same |
KR200409165Y1 (en) | 2005-05-11 | 2006-02-20 | 콰사르 옵토일렉트로닉스, 인코포레이티드 | Light emitting diode light source model |
KR100631993B1 (en) * | 2005-07-20 | 2006-10-09 | 삼성전기주식회사 | Led package and fabricating method thereof |
TWI302758B (en) * | 2006-04-21 | 2008-11-01 | Silicon Base Dev Inc | Package base structure of photo diode and manufacturing method of the same |
JP5148849B2 (en) | 2006-07-27 | 2013-02-20 | スタンレー電気株式会社 | LED package, light emitting device using the same, and method of manufacturing LED package |
TWI336962B (en) * | 2007-02-08 | 2011-02-01 | Touch Micro System Tech | White light emitting diode package structure having silicon substrate and method of making the same |
-
2009
- 2009-02-18 KR KR1020090013576A patent/KR101063997B1/en active IP Right Grant
- 2009-12-11 EP EP09178832.3A patent/EP2221890B1/en not_active Not-in-force
- 2009-12-11 US US12/636,534 patent/US8269249B2/en not_active Expired - Fee Related
- 2009-12-30 CN CN2009102156475A patent/CN101807651B/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6531328B1 (en) * | 2001-10-11 | 2003-03-11 | Solidlite Corporation | Packaging of light-emitting diode |
JP2003243718A (en) * | 2002-02-14 | 2003-08-29 | Matsushita Electric Works Ltd | Light emitting device |
US20060124953A1 (en) * | 2004-12-14 | 2006-06-15 | Negley Gerald H | Semiconductor light emitting device mounting substrates and packages including cavities and cover plates, and methods of packaging same |
US20060220036A1 (en) * | 2005-03-30 | 2006-10-05 | Samsung Electro-Mechanics Co., Ltd. | LED package using Si substrate and fabricating method thereof |
Also Published As
Publication number | Publication date |
---|---|
EP2221890B1 (en) | 2016-03-23 |
US8269249B2 (en) | 2012-09-18 |
CN101807651A (en) | 2010-08-18 |
CN101807651B (en) | 2013-06-19 |
KR20100094247A (en) | 2010-08-26 |
KR101063997B1 (en) | 2011-09-08 |
US20100207144A1 (en) | 2010-08-19 |
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