EP2094603A1 - Verfahren zur herstellung von nicht ausgerichteten mikrohohlräumen mit verschiedener tiefe - Google Patents

Verfahren zur herstellung von nicht ausgerichteten mikrohohlräumen mit verschiedener tiefe

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Publication number
EP2094603A1
EP2094603A1 EP07857945A EP07857945A EP2094603A1 EP 2094603 A1 EP2094603 A1 EP 2094603A1 EP 07857945 A EP07857945 A EP 07857945A EP 07857945 A EP07857945 A EP 07857945A EP 2094603 A1 EP2094603 A1 EP 2094603A1
Authority
EP
European Patent Office
Prior art keywords
layer
face
micro
hole
cavities
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP07857945A
Other languages
English (en)
French (fr)
Inventor
Jean-Charles Barbe
Erwan Dornel
François DE CRECY
Joël EYMERY
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Publication of EP2094603A1 publication Critical patent/EP2094603A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00047Cavities
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B01PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
    • B01LCHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
    • B01L3/00Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
    • B01L3/50Containers for the purpose of retaining a material to be analysed, e.g. test tubes
    • B01L3/502Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
    • B01L3/5027Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00Specific applications of microelectromechanical systems
    • B81B2201/05Microfluidics
    • B81B2201/058Microfluidics not provided for in B81B2201/051 - B81B2201/054
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2203/00Basic microelectromechanical structures
    • B81B2203/03Static structures
    • B81B2203/0369Static structures characterized by their profile
    • B81B2203/0384Static structures characterized by their profile sloped profile

Definitions

  • the invention relates to a method for producing micro-cavities and / or non-aligned microchannels and arranged at different depths in a material such as silicon.
  • a material such as silicon
  • Micro-cavity will be understood as designating a micro-cavity or a micro-channel.
  • micro-cavities the dimensions of which can for example be between a few nanometers and several hundred micrometers, are used in many areas of applications: the "lab-on-chip"("lab-on-chip” in English) realizing chemical, biological, proteomic or DNA analyzes, or DNA amplifications by PCR ("Polymerase Chain Reaction” or for polymerase chain reaction amplification), or for manipulation, sorting or analysis biological cells or components of these biological cells: in such a device, a network of micro-cavities may, for example, be used to analyze one or more samples by different reagents without mixing the samples and / or reagents, the microelectromechanical systems ( MEMS) and electromechanical nanosystems (NEMS): by producing micro-cavities in a substrate to support a micro or nano-mechanical structure, it is possible to manufacture such a structure without subsequent release step of the structure relative to the rest of the substrate, - the high frequency electronics (HF): the micro-cavities can decouple electromagnetically the microwave
  • a network of micro-cavities made in a substrate can serve to reduce the apparent thermal conductivity of the substrate material on which the chips are made; a network of buried micro-cavities can also be used to control the temperature of the components made on the surface of the substrate by circulating a coolant, for example to cool these components; a network of micro-cavities filled with an electrically conductive material can also be used to control the temperature of the electronic components by circulating an electric current therein to adjust the temperature by Joule effect, the dissipated thermal power then being proportional to the current flowing in the conductive material, - electronic devices made on a substrate of the SON type ("Silicon On None" in English, or silicon on nothing),
  • Nenoimprint in which the definition of zones dedicated shapes can be used to create micro-cavities opening out on the surface of a substrate and then serve as a mold for the production of a mask dedicated to the so-called “nanoimprint” technique.
  • Microstructure Transformation of Silicon A Newly Developed Transformation Technology for Silicon Surfaces Patterning Using the Surface Migration of Silicon Atoms by Hydrogen Annealing by T. Sato et al. Japanese Journal of Applied Physics, Vol. 39, 2000, pages 5033 to 5038, describes for example such a technique.
  • etching such as a RIE ("Reactive Ion Etching")
  • RIE reactive Ion Etching
  • holes for example of substantially circular section, or trenches that are quite deep (for example, a few micrometers) in a semiconductor substrate
  • the substrate is annealed under hydrogen, at a pressure of between approximately 266 Pa and 100000 Pa and a temperature of between 750 ° C. and 1150 ° C.
  • micro-cavities thus obtained have smooth walls and the crystalline quality of the substrate material surrounding the micro-cavity is preserved.
  • the substrate used is based on monocrystalline silicon
  • the silicon reconstructed around the micro-cavity during annealing is also monocrystalline.
  • micro-cavities vertically aligned.
  • structures with several micro-cavities at different depths these micro-cavities are necessarily vertically aligned one above the other. This is a major disadvantage in a number of cases, for example when one wants to independently access each of these cavities to circulate a fluid or to fill a different material at each level.
  • An object of the present invention is to provide a method for the realization of micro-cavities on several levels of depth in a substrate and which are not aligned one above the other.
  • the present invention proposes a process for producing micro-cavities at different depths in a layer based on at least one monocrystalline or amorphous material, comprising at least the steps of:
  • micro-cavities arranged at different depths in the layer and aligned by relative to the others along the axis forming a non-zero angle with respect to a normal to said plane of the layer.
  • the realization of the well and / or the trench may be implemented by the steps of: - producing a hole in the layer, comprising at least side walls inclined at a non-zero angle relative to the plane normal of said face of the layer,
  • the present invention also relates to a device comprising at least one monocrystalline or amorphous layer, in which at least two micro-cavities are made at different depths obtained by the implementation of a process for producing micro-cavities on several levels of depths, object of the present invention.
  • Figures 1 to 10 show the steps of a method of producing micro-cavities at different depths, object of the present invention, according to a first embodiment
  • Figures 11 to 13 represent steps of a method for producing micro-cavities at different depths, object of the present invention, according to a second embodiment
  • FIGS. 1 to 10 show the steps of a method of producing micro-cavities at different depths, object of the present invention, according to a first embodiment
  • Figures 11 to 13 represent steps of a method for producing micro-cavities at different depths, object of the present invention, according to a second embodiment
  • FIG. 14 to 16 represent steps of a process for producing micro-cavities with different depths, object of the present invention, according to a third embodiment, - Figures 17 and 18 respectively show a top view and a sectional view of a device, also object of the present invention, comprising micro-cavities realized according to an embodiment of the present invention.
  • FIGS. 1 to 10 A method for producing non-aligned micro-cavities and at different depths, according to a first embodiment, will now be described with reference to FIGS. 1 to 10.
  • a device 100 shown in Figure 1, comprises a layer 102, for example flat or substantially flat, based on a monocrystalline or amorphous material, such as silicon.
  • the device 100 is a SOI (Silicon On Insulator) type substrate comprising monocrystalline or amorphous layer 102, at least one insulating layer 104 on which layer 102 is placed.
  • the insulating layer 104 itself being disposed on a substrate 106 for example based on silicon, and / or quartz and / or any other material compatible with the usual techniques for producing an SOI type substrate.
  • the insulating layer 104 may be formed by a stack of one or more insulating materials, for example silicon dioxide, silicon nitride or diamond carbon.
  • the insulating layer 104 may for example comprise a stack of three sublayers, respectively based on silicon dioxide, silicon nitride and silicon dioxide. dioxide of silicon, the silicon dioxide sublayers being in contact with the layer 102 and the substrate 106 to provide optimized bonding of the layer 102 on the insulating layer 104 and the insulating layer 104 on the substrate 106.
  • the monocrystalline or amorphous layer 102 may, for example, have a thickness of between approximately 10 nm and 20 ⁇ m, this thickness being able to be adjusted by etching if the original thickness of the layer 102 is too low, or by epitaxy (thus enabling conserve the crystalline nature of the layer 102) or deposition when the original thickness of the layer 102 is too low.
  • the insulating layer 104 may have a thickness equal to about 145 nm but its thickness may itself be adjusted during the production of the device 100.
  • this stack may be formed by a first underlayer based on silicon dioxide and having a thickness equal to about 5 nm, a second silicon nitride-based underlayer having a thickness of about 70 nm, and a third base-based sub-layer. silicon dioxide and a thickness of about 70 nm.
  • the substrate 106 may have a thickness of between about 500 ⁇ m and 800 ⁇ m. Preferably, the thickness of the substrate 106 is proportional to the width of the substrate 106 in order to ensure sufficient mechanical rigidity to avoid breakage of the substrate 106 during the process described.
  • the material of the layer 102 may also be based on silicon, and / or germanium, and / or silicon - germanium, and / or gallium arsenide, and / or indium phosphide, and / or indium arsenide, and / or gallium aluminum arsenide, and / or arsenide of gallium and indium, and / or quartz, and / or any other monocrystalline material.
  • This material may also be an amorphous material, for example silicon dioxide and / or silicon nitride.
  • an etching mask 108 for example based on silicon dioxide, and / or a stack of carbon dioxide, is produced, for example by photolithography, on an upper main surface 101 of the layer 102.
  • the pattern of the etching mask 108 represents the section, at the face 101, of a hole that will be made in the layer 102.
  • Anisotropic etching of the layer 102 is carried out according to the pattern formed by the mask 108.
  • this anisotropic etching is for example an etching made from a solution of potassium hydroxide (KOH) or TMAH (Tetra Methyl Ammonium Hydroxide).
  • KOH potassium hydroxide
  • TMAH Tetra Methyl Ammonium Hydroxide
  • the upper face 101 of the layer 102 having a crystalline orientation of the type (001) or (011), this etching makes it possible to reveal the dense planes (111), (as described in the document "Differences in anisotropic etching properties of KOH and TMAH solutions "by M.
  • a hole 110 is obtained which, in section in a plane perpendicular to the face 101, for example the (x, y) plane (along the x, y and z axes shown in FIGS. 3B), has a trapezoidal shape as shown in Figure 3A, the hole 110 then having side walls 109 and a horizontal bottom wall 107 parallel to the face 101, or triangular as shown in Figure 3B, the hole 110 having no 109.
  • the triangular shape of the hole 110 shown in FIG. 3B is obtained with a longer etching time than that making it possible to obtain a trapezoidal hole 110 of FIG. 3A, without having to modify the other parameters. engraving.
  • the section of the hole 110 in a plane parallel to the plane (z, x) (along the x, y and z axes represented in FIGS. 3A and 3B), that is to say in a plane parallel to the face 101 of the layer 102 may be rectangular, square, circular or any other shape.
  • the dimensions of the sides of this section of the hole 110 may be substantially similar to each other, the hole 110 then forming a well.
  • the dimensions of this section of the hole 110 may also be substantially different, for example greater along the z axis than along the x axis, the hole 110 then forming a trench in the layer 102, the largest dimension is for example the dimension along the z axis, for example between about 50 nm and several microns.
  • a layer 112 based on a material that can be etched selectively with respect to the monocrystalline or amorphous material of the layer 102 is deposited or epitaxially on the walls 107 and 109 of the hole 110.
  • the embodiment of the layer 112 by epitaxy on the layer 102 makes it possible to transmit the crystalline structure of the material of the layer 102 to the material of the layer 112.
  • the material of the layer 112 may for example be a silicon-based alloy. -germanium when the material of the layer 102 is silicon, as is the case in this embodiment.
  • the material of the layer 112 may be based on aluminum arsenide, and / or an aluminum alloy and / or gallium and / or arsenic.
  • a pair of materials of the layers 102 and 112 so that it is possible to carry out a hetero-epitaxy between these two materials, that is to say that it is possible to produce an epitaxy of the material of the layer 112 on that of the layer 102 and reciprocally, it is possible to achieve an epitaxy of the material of the layer 102 on that of the layer 112, such as silicon and silicon-germanium.
  • a layer 114 is deposited or epitaxially based on a material that can be similar to the material of the layer 102, on the layer 112 (FIG. 5).
  • the epitaxy of the layer 114 when it is possible to carry out a hetero-epitaxy of the materials of the layers 102 and 112, the epitaxy of the layer 114, then based on a material similar to the material of the layer 102, on the layer 112 makes it possible to recover the crystalline structure of the material of the layer 102 in the material of the layer 114.
  • the thickness of the layer 112 is preferably less than the critical relaxation thickness above which the material of the layer 114 comprises a density of dislocations, that is to say, crystalline defects, very important, no longer allowing the material of the layer 114 to have the same crystalline quality as the material of the layer 102.
  • the order of magnitude of the thickness not to be exceeded as a function of the x germanium content is for example presented in FIG. 1 of the publication "Calculation of critical layer th ickness versus lattice mismatch for Si / Ge x Sii x strained-layer heterostructures, by R. People and JC. Bean, APL 47, p. 322 or again from FIG. 13 of Strain relaxation kinetics in Si / Ge x Sii x heterostructures, DC Houghton, JAP 70 (4), p.2136.
  • the layer 114 forms a portion of the layer 102, filling the remainder of the hole 110 not occupied by the layer 112 by the monocrystalline or amorphous material of the layer 102.
  • a planning step is then carried out on the upper face of the device 100, for example by chemical mechanical polishing (CMP).
  • CMP chemical mechanical polishing
  • the mask 108 can serve as a stop layer for this polishing.
  • the etching mask 108 of the device 100 (FIG. 7) is then removed in order to be able to access the layer 112.
  • a selective etching of the material of the layer 112 with respect to the layers 102 and 114 is performed.
  • This etching can be carried out by etching or plasma etching, forming wells or trenches 116 on the place of the layer 112.
  • the space released by the layer 112 forms wells.
  • the layer 112 is not etched completely, a portion of the layer 112 being retained.
  • the remaining portion of the layer 112 is on the horizontal wall 107 at the bottom of the hole 110, delimiting the trenches 116.
  • Each of the trenches 116 is inclined with respect to the plane of the upper face 101 of the layer 102, that is to say that two sections of one of the trench 116 made, in two distinct planes parallel to the main face 101 of the layer 102, are aligned with each other along an axis forming an angle not zero with a normal to the plane of the main face 101 of the layer 102.
  • these two sections have a rectangular shape, and the alignment axis is the axis passing through the centers of the two rectangular sections.
  • This angle is a crystallographic datum: it is fixed and represents the angle between the revealed crystallographic direction and the orientation of the face of the substrate (100), and is, in the case where the chemically revealed crystallographic planes are the planes (111). ), equal to about 54.7 °.
  • the alignment axis is the axis passing through the centers of the two circular sections.
  • the walls 109 of the hole 110 form walls of the trenches 116.
  • an annealing under hydrogen is then carried out at a pressure of between approximately 266 Pa and 100000 Pa and at a temperature of between approximately 750 ° C. and 1150 ° C.
  • micro-cavities 118 are not arranged one above the other in the layer 102, that is to say that the micro-cavities 118 formed from one of the trenches 116 are aligned with respect to each other.
  • This axis is similar to the axis of alignment of two sections of the trenches and / or wells formed during the step of removing the layer 112 described above.
  • the material of the layer 102 being silicon and the material of the layer 112 being an alloy based on silicon and germanium
  • the germanium initially present diffuses into the silicon of the layer 102 and the material of the layer 102 surrounding the micro-cavities 118 after annealing is an alloy based on silicon and germanium whose concentration of germanium is lower than that of the original material of the layer 112.
  • the micro-cavities are then formed in a homogeneous material no longer having the coexistence of two materials and therefore an interface between these two materials, this interface being capable of preventing or delaying the formation of micro-cavities.
  • a photolithography step may then be implemented to access the micro-cavities 118, forming openings 120 in the layer 102, and connecting the upper face 101 of the layer 102 to the micro-cavities 118 (FIG. 10).
  • the dimensions of sections of the openings 120 may or may not be similar to the dimensions of the sections of the micro-cavities 118. In FIG. 10, the dimensions of the sections of the openings 120 are similar to the dimensions of the sections of the micro-cavities 118 .
  • etching mask 108 it is possible to eliminate the etching mask 108, for example by anisotropic etching, before implementing the steps of producing layers 112 and 114. This limits the risk of shading effect created by the overhang of the etching mask 108 above the inclined walls 109 during the production of the layer 112, this shading may give rise to the formation of a cavity that can be blocked during the production of the layer 114, then prohibiting access to the layer 112 for the next etching step. It is also possible to delete the etching mask 108 after the step of selectively etching the layer 112 if this layer 112 is accessible despite the presence of the mask 108.
  • a hole 110 for example similar to the hole 110 shown in FIG. 3A, is first produced in a device 200 comprising, for example, layers 102 and 104 and a substrate 106 similar to the identical reference elements described in the first embodiment of FIG. production.
  • the hole 110 has a trapezoidal shape.
  • One of the advantages of a trapezoidal hole 110 is that it is possible to epitaxially grow the material of the layer 112 at different speeds depending on whether this material is at the bottom wall 107 or at the 109. For example, one can have a growth rate on the side walls 109 which is higher than that on the bottom wall 107, the layer 112 obtained being shown in FIG. growth time, a thicker layer 112 at the side walls 109 than the rest of the layer 102.
  • An isotropic etching step of the layer 112 can then be implemented to remove the material of the layer 112 located on the horizontal surfaces, that is to say on the main face 101 of the layer 102 and the bottom wall 107 of the hole 110, while preserving the material of the layer 112 on the side walls 109 of the hole 110 ( Figure 12).
  • a third layer 114 is produced by a step of epitaxial growth of the material of the layer 102 in the hole 110, this third layer forming a portion 114 of the layer 102, then a chemical-mechanical polishing step making it possible to clear an access to the material of the layer 112.
  • This layer 112 is then selectively removed to form wells or trenches 116 (FIG. 13).
  • each of the trenches 116 is inclined relative to the plane of the upper face 101 of the layer 102, that is to say that two sections of one of the trenches 116 made in two distinct planes parallel to the main face 101 of the layer 102, are aligned with each other along an axis forming a non-zero angle with a normal to the plane of the main face 101 of the layer 102.
  • hydrogenated atmosphere annealing is then performed to form micro-cavities at different depth levels in the layer 102 and not vertically aligned with each other.
  • this second embodiment makes it possible to anneal the device 200 without the presence of a portion of the layer 112, and thus to preserve the initial nature of the material of the layer 102.
  • a hole 110 for example similar to the hole 110 shown in FIG. 3A, is first produced in a device 300 comprising, for example, layers 102 and 104 and a substrate 106 similar to the identical reference elements described in the first embodiment of FIG. production.
  • the hole 110 has a trapezoidal shape.
  • Deposition of the layer 112, which has a substantially uniform thickness over the entire layer 102, or a growth of the layer 102 from a material having a growth rate substantially, is carried out. uniform regardless of the walls on which growth is performed ( Figure 14).
  • Such growth can be obtained for an alloy of silicon and germanium growing on silicon as presented in the document "Growth kinetics of Si and SiGe on Si (100), Si ( IlO) and Si (III) surfaces of JM Hartmann et al., Journal of Crystal Growth, 2006, No. 294, pages 288-295.
  • An etching mask is then produced.
  • etching mask 126 covers the parts of the layer 112 located at the side walls 109 of the hole 110.
  • An isotropic etching step of the layer 112 can then be implemented to remove the material from the layer 112 which does not is not covered by the etching mask 126, that is to say lying on the horizontal surfaces (main face 101 of the layer 102 and bottom wall 107 of the hole 110), while preserving the material of the layer 112 located on the side walls 109 of the hole 110 ( Figure 15).
  • the etching mask 126 is then removed, and epitaxial growth of the material of the layer 102 is carried out in the hole 110 to obtain a third layer 114, forming a portion 114 of the layer 102.
  • a chemical-mechanical polishing step provides access to the material of the layer 112 when the layer 112 is not directly accessible. This layer 112 is then selectively removed to form wells or trenches 116 (see FIG.
  • each of the trenches 116 being inclined with respect to the plane of the upper face 101 of the layer 102, that is to say that two sections one of the trenches 116 made in two distinct planes parallel to the main face 101 of the layer 102, are aligned with each other along an axis forming a non-zero angle with a normal to the plane of the face main 101 of the layer 102.
  • hydrogenated atmosphere annealing is then performed to form micro-cavities at different depth levels in the layer 102 and which are not vertically aligned with each other.
  • This third embodiment offers the same advantages as the second embodiment, without using a material with several growth rates depending on the inclination of the walls on which the material is developed by the production of the layer 112.
  • Method of realization described above makes it possible to obtain devices comprising micro-cavities arranged at different depths and non-aligned vertically with respect to each other.
  • An example of such a device 400 is shown in Figures 17 and 18.
  • Figure 17 shows a top view of the device 400
  • the FIG. 18 represents a sectional view along the axis AA, shown in FIG. 17, of the device 400.
  • the device 400 is here a chemical analysis device capable of analyzing up to three samples simultaneously.
  • the device 400 comprises three micro-cavities 118a, 118b and 118c, each forming a microchannel disposed in the layer 102 at a different depth from each other. Openings 120a, 120b and 120c, allowing access to the micro-cavities 118, are made in the layer 102. In this embodiment, the openings 120a to 120c allow the samples to be injected into the micro-cavities 118, each micro-cavity 118 may contain a different sample. Apertures 120d, 120e and 120f also allowing access to micro-cavities 118, are made in layer 102, allowing the injection of a reagent into each microcavity 118 in order to react the samples with these reagents.
  • openings 120g, 120h and 120i again allowing access to the micro-cavities 118, are made in the layer 102 and serve to harvest the treated samples after their passage in the micro-cavities 118.
  • Non-aligned microcavity embodiments and at different depths can be implemented for all the fields of application of the micro-cavity devices described above.

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Micromachines (AREA)
EP07857945A 2006-12-21 2007-12-20 Verfahren zur herstellung von nicht ausgerichteten mikrohohlräumen mit verschiedener tiefe Withdrawn EP2094603A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0655817A FR2910455B1 (fr) 2006-12-21 2006-12-21 Procede de realisation de micro-cavites non alignees et a differentes profondeurs
PCT/EP2007/064324 WO2008074861A1 (fr) 2006-12-21 2007-12-20 Procede de realisation de micro-cavites non-alignees et a differentes profondeurs

Publications (1)

Publication Number Publication Date
EP2094603A1 true EP2094603A1 (de) 2009-09-02

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US (1) US8236698B2 (de)
EP (1) EP2094603A1 (de)
FR (1) FR2910455B1 (de)
WO (1) WO2008074861A1 (de)

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FR3021814B1 (fr) 2014-08-08 2018-06-15 Commissariat Energie Atomique Connecteur pour la connexion en matrice entre un boitier et un support, comportant un corps principal plie
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CN111298854B (zh) * 2020-02-27 2021-08-06 西人马联合测控(泉州)科技有限公司 芯片的成型方法以及晶圆

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FR2910455B1 (fr) 2009-04-03
WO2008074861A1 (fr) 2008-06-26
US20100230674A1 (en) 2010-09-16
FR2910455A1 (fr) 2008-06-27
US8236698B2 (en) 2012-08-07

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