EP1844382B1 - Filter circuit - Google Patents

Filter circuit Download PDF

Info

Publication number
EP1844382B1
EP1844382B1 EP06706268A EP06706268A EP1844382B1 EP 1844382 B1 EP1844382 B1 EP 1844382B1 EP 06706268 A EP06706268 A EP 06706268A EP 06706268 A EP06706268 A EP 06706268A EP 1844382 B1 EP1844382 B1 EP 1844382B1
Authority
EP
European Patent Office
Prior art keywords
regulating
filter circuit
output
connection
path
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP06706268A
Other languages
German (de)
French (fr)
Other versions
EP1844382A2 (en
Inventor
Martin Huber
Hendrik Köhler
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohde and Schwarz GmbH and Co KG
Original Assignee
Rohde and Schwarz GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohde and Schwarz GmbH and Co KG filed Critical Rohde and Schwarz GmbH and Co KG
Publication of EP1844382A2 publication Critical patent/EP1844382A2/en
Application granted granted Critical
Publication of EP1844382B1 publication Critical patent/EP1844382B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/59—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load
    • G05F1/595—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices including plural semiconductor devices as final control devices for a single load semiconductor devices connected in series

Definitions

  • the invention relates to a filter circuit for voltage stabilization of a power supply to which several consumers can be connected.
  • a data transmission of a spatially separated operating unit should be able to take place via the power supply line.
  • a supply voltage stabilization becomes necessary. Changes in the supply voltage dU b sufficient edge steepness, for example, by a sudden load change to a second consumer, would overlap the data signal and lead to misinterpretations in the evaluation of the data signal. For example, in the case of the Manchester code, a data signal with bandpass characteristic can be assumed which has no DC component.
  • the invention has for its object to provide a filter circuit with high control dynamics.
  • an RC low-pass circuit is provided such that the gain of the screening characteristics of the RC element is enhanced by the control element.
  • the voltage stabilization circuit according to the invention can be seen as low-pass filtering on the one hand and as regulating the output voltage on the other hand.
  • the data signal as well as the load changes dI v and dU b , are characterized by the fact that they can have higher-frequency components which are superimposed on the data in the frequency domain.
  • these higher-frequency components can be reduced and thus the supply voltage can be smoothed.
  • the resistor R 1 of this circuit can be designed very high impedance.
  • the FET in particular MOSFET, serves to amplify the low-pass effect and can be understood as a P-controller in the control arrangement.
  • bipolar transistors still flows a small emitter base current, which must be considered in the design of the low-pass filter.
  • the low base current must be compensated circuit technology by a correspondingly low parallel resistance R 1 .
  • the resistor R 1 can then be designed very high impedance.
  • the output voltages U 1 and U 3 in Fig. 1 arise as the sum of the reference voltage U 2 and U 4 on the capacitor and the almost fixed drain gate voltage U DG .
  • U 1 or U 2 is reduced by the drain-gate voltage U DG .
  • the series connection of two such circuits allows for a further screening of the supply voltage and the gradual adjustment or Targeted reduction of the desired output voltage U 3 with the help of these drain-gate voltages.
  • a voltage is thus available at the output which is smaller by n U DG than the original input voltage, eg. B.
  • n means the stages of the circuit.
  • an inductance can be provided which prevents feedback of the data on the filter circuit and in particular avoids a short circuit on the charging capacitor at the output of the filter circuit according to circuit ground.
  • a first stage S 1 is connected for voltage stabilization.
  • the current load of these consumers is summarized in the drawing with I v .
  • This first stage S 1 consists of a control element V 1 , which is preferably formed by a transistor, more preferably by a field effect transistor (FET in particular MOSFET).
  • the source-drain path forms a controlled system RS 1 .
  • Its control path input RE 1 which is formed by the source of the FET, is connected via a terminal E to the battery B.
  • the terminal E forms the input terminal of the screening circuit.
  • a first resistor R 1 connects the control path input RE 1 with a first control terminal RG 1 of the first control element V 1 of the first stage S 1 , z. B. with the gate of the FET, and together with the capacitor C 1 forms an RC low-pass circuit.
  • the capacitor C 1 is connected between the control terminal RG 1 and the circuit ground M.
  • a reference voltage U 2 drops, which forms the voltage U 1 together with the gate-drain voltage of the FET or with the base-collector voltage in the case of using a bipolar transistor.
  • the first stage S 1 of the filter circuit 1 for voltage stabilization and screening which is formed by the resistor R 1 , the capacitor C 1 and the control element V 1 , connects the input terminal E in the illustrated preferred embodiment with a second stage S 2 for further voltage stabilization and screening.
  • This second stage S 2 of the filter circuit 1 is constructed analogously to the first step S 1, a second resistor R 2 to the second control path input RE 2 connects to the second control terminal RG 2, and a second capacitor C 2 is connected to the control terminal RG 2, and connects this with the circuit ground M.
  • the reference voltage U 4 thereby drops across the capacitor C 2 and forms, together with the gate-drain or base-collector voltage of the FET or bipolar transistor, the voltage U 3 .
  • a charging capacitor C 3 is preferably arranged, which connects the controlled system output RA 2 of the second control element RE 2 with the circuit ground M.
  • an inductance L is provided, which connects the output A to one terminal of the capacitor C 3 and the second controlled system output RA 2 .
  • a line X 1 is preferably connected, which serves a not shown spatially separate operating unit with a Supply voltage as well as with data.
  • the line X 1 may be formed, for example, by a coaxial cable or a twisted pair line.
  • the data is coupled in at the output A of the filter circuit 1 via a suitable connection.
  • the inductance L is used to prevent a feedback of the data on the filter circuit 1 and in particular to prevent a short circuit on the capacitor C 3 to ground.
  • the total voltage applied to the output A on the line X 1 is in with Fig. 1 U rec .
  • this filter circuit 1 in preferably two stages, a suitable data transmission is made possible while stabilized power supply of an external device, such as a control unit, which is connected via the line X 1 to a central unit.
  • an external device such as a control unit
  • the invention is not limited to the illustrated and described embodiment.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Networks Using Active Elements (AREA)

Abstract

A filter circuit (1) is disclosed for filtering out an input voltage (Ub) applied to an input terminal (E) in order to generate a filtered output voltage (Ua) at an output terminal (A). The filter circuit (1) has at least one regulation element (V1) with a regulation terminal (RG1), and a regulation section (RS1) with a regulation section input (RE1) connected to the input terminal (E) and a regulation section output (RA1). The filter circuit (1) further has a capacitor (C1) connected to the regulation terminal (RG1) and a resistor (R1) which connects the regulation section input (RE1) to the regulation terminal (RG1).

Description

Die Erfindung betrifft eine Siebschaltung zur Spannungsstabilisierung einer Spannungsversorgung an der mehrere Verbraucher angeschlossen werden können. Zusätzlich soll über die Spannungsversorgungsleitung eine Datenübertragung einer räumlich getrennten Bedieneinheit stattfinden können.The invention relates to a filter circuit for voltage stabilization of a power supply to which several consumers can be connected. In addition, a data transmission of a spatially separated operating unit should be able to take place via the power supply line.

Wenn mehrere Verbraucher an einer Gleichstromquelle, z.B. an einer Batterie, angeschlossen sind, kommt es bei Laständerungen dIv über den Batterieinnenwiderstand Ri zu einer proportionalen Änderung dUb= Ri · dIv der Batteriespannung Ub (siehe Fig. 1).When multiple loads are connected to a DC power source, for example to a battery, it comes with load changes dIv across the battery internal resistance R i in a proportional change dU b = R i · dI v of the battery voltage U b (see Fig. 1 ).

Werden gleichzeitig Daten über die Strom- oder Spannungszuleitung zu und von der Bedieneinheit übertragen, so wird eine Versorgungsspannungsstabilisierung notwendig. Änderungen der Versorgungsspannung dUb genügender Flankensteilheit, z.B. durch eine plötzliche Laständerung an einem zweiten Verbraucher, würden sich dem Datensignal überlagern und zu Missinterpretationen bei der Auswertung des Datensignals führen. So kann z.B. im Falle des Manchester Codes von einem Datensignal mit Bandpasscharakteristik ausgegangen werden, das keinen Gleichanteil besitzt.If data is simultaneously transmitted to and from the operating unit via the current or voltage supply, a supply voltage stabilization becomes necessary. Changes in the supply voltage dU b sufficient edge steepness, for example, by a sudden load change to a second consumer, would overlap the data signal and lead to misinterpretations in the evaluation of the data signal. For example, in the case of the Manchester code, a data signal with bandpass characteristic can be assumed which has no DC component.

Spannungsregelschaltungen ohne Siebcharakteristik sind bekannt. So wird z. B. in der DE 101 49 827 A1 zur Spannungsstabilisierung als Längsregler ein Transistor eingesetzt . US 5668506 offenbart die Merkmale des Oberbegriffs vom Patentanspruch 1.Voltage regulating circuits without Siebcharakteristik are known. So z. B. in the DE 101 49 827 A1 used for voltage stabilization as a longitudinal regulator, a transistor. US 5668506 discloses the features of the preamble of claim 1.

Der Erfindung liegt die Aufgabe zugrunde, eine Siebschaltung mit hoher Regeldynamik zu schaffen.The invention has for its object to provide a filter circuit with high control dynamics.

Die Aufgabe wird durch die Merkmale des Anspruchs 1 gelöst. Vorteilhafte Weiterbildungen sind in den Unteransprüchen angegeben.The object is solved by the features of claim 1. Advantageous developments are specified in the subclaims.

Durch die Merkmale der Anspruchs 1 wird eine RC-Tiefpassschaltung bereitgestellt der Art, dass eine Verstärkung der Siebeigenschaften des RC-Gliedes durch das Regelelement erfolgt. Somit läßt sich die erfindungsgemäße Schaltung zur Spannungsstabilisierung zum einen als Tiefpassfilterung und zum anderen auch als Regelung der Ausgangsspannung sehen.By the features of claim 1, an RC low-pass circuit is provided such that the gain of the screening characteristics of the RC element is enhanced by the control element. Thus, the voltage stabilization circuit according to the invention can be seen as low-pass filtering on the one hand and as regulating the output voltage on the other hand.

Das Datensignal, wie auch die Laständerungen dIv bzw. dUb, zeichnen sich dadurch aus, dass diese höherfrequente Anteile besitzen können, die sich im Frequenzbereich den Daten überlagern. Durch geeignete Tiefpassfilterung vor der Einkoppelung der Daten können diese höherfrequenten Anteile reduziert werden und damit kann die Versorgungsspannung geglättet werden.The data signal, as well as the load changes dI v and dU b , are characterized by the fact that they can have higher-frequency components which are superimposed on the data in the frequency domain. By suitable low-pass filtering prior to the coupling of the data, these higher-frequency components can be reduced and thus the supply voltage can be smoothed.

Bei Verwendung eines Feldeffekttransistors für das Regelelement kann der Widerstand R1 dieser Schaltung sehr hochohmig ausgestaltet werden kann. Der FET, insbesondere MOSFET, dient dabei zur Verstärkung des Tiefpaßeffekts und läßt sich als P-Regler in der Regelanordnung begreifen. Bei der Verwendung bipolarer Transistoren fließt noch immer ein kleiner Emitter-Basisstrom, der bei der Auslegung des Tiefpasses berücksichtigt werden muß. Der geringe Basisstrom muß schaltungstechnisch durch einen entsprechend niedrig ausgelegten Parallelwiderstand R1 ausgeglichen werden. Bei Verwendung von FETs oder MOSFETs fließt dagegen kein Gatestrom. Damit besteht keine Verbindung zwischen Gate und Source-Drain-Kanal. Der Widerstand R1 kann dann sehr hochohmig ausgelegt werden.When using a field effect transistor for the control element, the resistor R 1 of this circuit can be designed very high impedance. The FET, in particular MOSFET, serves to amplify the low-pass effect and can be understood as a P-controller in the control arrangement. When using bipolar transistors still flows a small emitter base current, which must be considered in the design of the low-pass filter. The low base current must be compensated circuit technology by a correspondingly low parallel resistance R 1 . When using FETs or MOSFETs, however, no gate current flows. There is no connection between gate and source-drain channel. The resistor R 1 can then be designed very high impedance.

Die Ausgangsspannungen U1 bzw. U3 in Fig. 1 ergeben sich als Summe der Referenzspannung U2 bzw. U4 am Kondensator und der nahezu fixen Drain-Gate Spannung UDG. Dabei ist U1 bzw. U2 um die Drain-Gate Spannung UDG reduziert. Die Hintereinanderschaltung zweier solcher Schaltungen ermöglicht zum einen die weitere Siebung der Versorgungsspannung und die schrittweise Einstellung bzw. gezielte Reduzierung der gewünschten Ausgangsspannung U3 mit Hilfe dieser Drain-Gate Spannungen.The output voltages U 1 and U 3 in Fig. 1 arise as the sum of the reference voltage U 2 and U 4 on the capacitor and the almost fixed drain gate voltage U DG . In this case, U 1 or U 2 is reduced by the drain-gate voltage U DG . The series connection of two such circuits allows for a further screening of the supply voltage and the gradual adjustment or Targeted reduction of the desired output voltage U 3 with the help of these drain-gate voltages.

In der bevorzugten mehrstufigen Ausführung steht damit am Ausgang eine Spannung zur Verfügung, die um n UDG kleiner als die ursprüngliche Eingangsspannung, z. B. eine Batteriespannung, ist, wobei n die Stufen der Schaltung bedeutet.In the preferred multi-stage design, a voltage is thus available at the output which is smaller by n U DG than the original input voltage, eg. B. a battery voltage is, where n means the stages of the circuit.

Darüber hinaus kann vorteilhaft eine Induktivität vorgesehen sein, die eine Rückkoppelung der Daten auf die Siebschaltung verhindert und insbesondere einen Kurzschluß über den Lade-Kondensators am Ausgang der Siebschaltung nach Schaltungsmasse vermeidet.In addition, advantageously, an inductance can be provided which prevents feedback of the data on the filter circuit and in particular avoids a short circuit on the charging capacitor at the output of the filter circuit according to circuit ground.

Die Erfindung wird nachfolgend unter Bezugnahme auf die Zeichnung näher beschrieben. In der Zeichnung zeigt

Fig. 1
ein Schaltbild eines Ausführungsbeispiels der erfindungsgemäßen Siebschaltung.
The invention will be described in more detail with reference to the drawing. In the drawing shows
Fig. 1
a circuit diagram of an embodiment of the inventive filter circuit.

An einer Batterie B ist neben einem oder mehreren weiteren Verbrauchern eine erste Stufe S1 zur Spannungsstabilisierung geschaltet. Die Strom-Last dieser Verbraucher ist in der Zeichnung zusammenfassend mit Iv, gekennzeichnet.On a battery B, in addition to one or more other consumers, a first stage S 1 is connected for voltage stabilization. The current load of these consumers is summarized in the drawing with I v .

Diese erste Stufe S1 besteht aus einem Regelelement V1, das bevorzugt durch einen Transistor, besonders bevorzugt durch einen Feldeffekttransistor (FET insbesondere MOSFET) gebildet ist. Die Source-Drain-Strecke bildet eine Regelstrecke RS1. Dessen Regelstreckeneingang RE1, der durch die Source des FET gebildet ist, ist über einen Anschluß E mit der Batterie B verbunden. Der Anschluß E bildet den Eingangsanschluß der Siebsschaltung 1.This first stage S 1 consists of a control element V 1 , which is preferably formed by a transistor, more preferably by a field effect transistor (FET in particular MOSFET). The source-drain path forms a controlled system RS 1 . Its control path input RE 1 , which is formed by the source of the FET, is connected via a terminal E to the battery B. The terminal E forms the input terminal of the screening circuit. 1

Ein erster Widerstand R1 verbindet dabei den Regelstreckeneingang RE1 mit einem ersten Regelanschluß RG1 des ersten Regelelements V1 der ersten Stufe S1, z. B. mit dem Gate des FETs, und bildet zusammen mit dem Kondensator C1 eine RC-Tiefpassschaltung. Der Kondensator C1 ist dabei zwischen den Regelanschluß RG1 und die Schaltungsmasse M geschaltet.A first resistor R 1 connects the control path input RE 1 with a first control terminal RG 1 of the first control element V 1 of the first stage S 1 , z. B. with the gate of the FET, and together with the capacitor C 1 forms an RC low-pass circuit. The capacitor C 1 is connected between the control terminal RG 1 and the circuit ground M.

Am Kondensator C1 fällt eine Referenzspannung U2 ab, die zusammen mit der Gate-Drain-Spannung des FET bzw. mit der Basis-Kollektorspannung im Falle der Verwendung eines Bipolartransistors die Spannung U1 bildet.At the capacitor C 1 , a reference voltage U 2 drops, which forms the voltage U 1 together with the gate-drain voltage of the FET or with the base-collector voltage in the case of using a bipolar transistor.

Die erste Stufe S1 der Siebschaltung 1 zur Spannungsstabilisierung und Siebung, die durch den Widerstand R1, den Kondensator C1 und das Regelelement V1 gebildet ist, verbindet den Eingangsanschluß E im dargestellten bevorzugten Ausführungsbeispiel mit einer zweiten Stufe S2 zur weiteren Spannungsstabilisierung und Siebung.The first stage S 1 of the filter circuit 1 for voltage stabilization and screening, which is formed by the resistor R 1 , the capacitor C 1 and the control element V 1 , connects the input terminal E in the illustrated preferred embodiment with a second stage S 2 for further voltage stabilization and screening.

Diese zweite Stufe S2 der Siebschaltung 1 ist analog zu der ersten Stufe S1 aufgebaut, wobei ein zweiter Widerstand R2 den zweiten Regelstreckeneingang RE2 mit dem zweiten Regelanschluß RG2 verbindet und ein zweiter Kondensator C2 an den Regelanschluß RG2 angeschlossen ist und diesen mit der Schaltungsmasse M verbindet. Die Referenzspannung U4 fällt dabei über dem Kondensator C2 ab und bildet zusammen mit der Gate-Drain- bzw. Basis-Kollektor Spannung des FET bzw. Bipolartransistors die Spannung U3. Am Ausgang der zweiten Stufe S2 ist vorzugsweise ein Lade-Kondensator C3 angeordnet, der den Regelstreckenausgang RA2 des zweiten Regelelements RE2 mit der Schaltungsmasse M verbindet.This second stage S 2 of the filter circuit 1 is constructed analogously to the first step S 1, a second resistor R 2 to the second control path input RE 2 connects to the second control terminal RG 2, and a second capacitor C 2 is connected to the control terminal RG 2, and connects this with the circuit ground M. The reference voltage U 4 thereby drops across the capacitor C 2 and forms, together with the gate-drain or base-collector voltage of the FET or bipolar transistor, the voltage U 3 . At the output of the second stage S 2 , a charging capacitor C 3 is preferably arranged, which connects the controlled system output RA 2 of the second control element RE 2 with the circuit ground M.

Vor dem Ausgang A ist eine Induktivität L vorgesehen, die den Ausgang A mit einem Anschluß des Kondensators C3 sowie dem zweiten Regelstreckenausgang RA2 verbindet.Before the output A, an inductance L is provided, which connects the output A to one terminal of the capacitor C 3 and the second controlled system output RA 2 .

An den Ausgang A ist bevorzugt eine Leitung X1 angeschlossen, die dazu dient, eine nicht dargestellte räumlich getrennte Bedieneinheit mit einer Versorgungsspannung sowie mit Daten zu versorgen. Dabei kann die Leitung X1 z.B. durch ein Koaxialkabel oder eine Twisted-Pair-Leitung gebildet sein.To the output A, a line X 1 is preferably connected, which serves a not shown spatially separate operating unit with a Supply voltage as well as with data. In this case, the line X 1 may be formed, for example, by a coaxial cable or a twisted pair line.

Die Daten werden am Ausgang A der Siebschaltung 1 über eine geeignete Verbindung eingekoppelt. Dabei dient die Induktivität L dazu, eine Rückkoppelung der Daten auf die Siebschaltung 1 zu vermeiden und insbesondere einen Kurzschluß über den Kondensator C3 nach Masse zu verhindern. Die Gesamtspannung die am Ausgang A an der Leitung X1 anliegt, ist mit in Fig. 1 Uempf bezeichnet.The data is coupled in at the output A of the filter circuit 1 via a suitable connection. In this case, the inductance L is used to prevent a feedback of the data on the filter circuit 1 and in particular to prevent a short circuit on the capacitor C 3 to ground. The total voltage applied to the output A on the line X 1 , is in with Fig. 1 U rec .

Mit dieser Siebschaltung 1 in bevorzugt zwei Stufen wird eine geeignete Datenübertragung ermöglicht bei gleichzeitiger stabilisierter Spannungsversorgung eines externen Geräts, z.B. einer Bedieneinheit, die über die Leitung X1 an ein Zentralgerät angeschlossen ist.With this filter circuit 1 in preferably two stages, a suitable data transmission is made possible while stabilized power supply of an external device, such as a control unit, which is connected via the line X 1 to a central unit.

Die Erfindung ist nicht auf das dargestellte und beschriebene Ausführungsbeispiel beschränkt. Insbesondere ist es möglich, die Siebschaltung 1 auch nur einstufig mit der einzigen Stufe S1 oder bei Bedarf auch mit mehr als zwei Stufen auszubilden. Sämtliche beschriebene Elemente sind beliebig miteinander kombinierbar.The invention is not limited to the illustrated and described embodiment. In particular, it is possible to form the filter circuit 1 only in one stage with the single stage S 1 or, if necessary, with more than two stages. All described elements can be combined with each other as desired.

Claims (7)

  1. A filter circuit (1) for filtering an input voltage (Ub) present at an input connection (E) in order to generate a filtered output voltage (Ua) at an output connection (A), comprising
    at least one first regulating element (V1)' which provides a first regulating connection (RG1) and a first regulating path (RS1) with a first regulating-path input (RE1) and a first regulating-path output (RA1) connected to the input connection (E),
    a first capacitor (C1) connected to the first regulating connection (RG1) and
    a first resistor (R1), which connects the regulating-path input (RE1) of the first regulating element (V1) to its regulating connection (RG1),
    characterised in that
    a regulating-path output (RA1, RA2) is connected via an inductance (L) to the output connection (A), and that the output voltage (Ua) of the filter circuit (1) is transmitted via a line (X1) together with data which are supplied together with the output voltage (Ua) to the output connection (A).
  2. The filter circuit according to claim 1,
    characterised by
    a second regulating element (V2),
    which provides a second regulating connection (RG2) and a second regulating path (RS2) with a second regulating-path input (RE2) connected to the first regulating-path output (RA1) of the first regulating element (V1) and a second regulating-path output (RA2) connected to the output connection (A),
    a second capacitor (C2) connected to the second regulating connection (RG2) and
    a second resistor (R2), which connects the regulating-path input (RE2) of the second regulating element (V2) to its regulating connection (RG2).
  3. The filter circuit according to claim 2,
    characterised in that
    the first regulating-path output (RA1) and/or the second regulating-path output (RA2) is/are connected to a capacitor (C3).
  4. The filter circuit according to any one of claims 1 to 3,
    characterised in that
    the capacitors (C1, C2, C3) are connected to the circuit ground (M).
  5. The filter circuit according to any one of the preceding claims,
    characterised in that
    the input connection (E) of the filter circuit (1) is connected to a direct-voltage source, in particular, a battery (B).
  6. The filter circuit according to any one of the preceding claims,
    characterised in that
    the regulating elements (V1, V2) are transistors.
  7. The filter circuit according to claim 6,
    characterised in that
    the transistors are field-effect transistors.
EP06706268A 2005-01-31 2006-01-17 Filter circuit Active EP1844382B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102005004391A DE102005004391A1 (en) 2005-01-31 2005-01-31 filter circuit
PCT/EP2006/000373 WO2006081939A2 (en) 2005-01-31 2006-01-17 Filter circuit

Publications (2)

Publication Number Publication Date
EP1844382A2 EP1844382A2 (en) 2007-10-17
EP1844382B1 true EP1844382B1 (en) 2011-11-16

Family

ID=36709511

Family Applications (1)

Application Number Title Priority Date Filing Date
EP06706268A Active EP1844382B1 (en) 2005-01-31 2006-01-17 Filter circuit

Country Status (4)

Country Link
EP (1) EP1844382B1 (en)
DE (1) DE102005004391A1 (en)
IL (1) IL184839A (en)
WO (1) WO2006081939A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007052845B4 (en) * 2006-11-23 2016-06-09 Optis Cellular Technology, LLC (n. d. Ges. d. Staates Delaware) communication terminal
CN107608442A (en) * 2017-09-29 2018-01-19 深圳怡化电脑股份有限公司 A kind of accurate voltage-stabilizing circuit

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE422989C (en) * 1925-01-28 1925-12-16 Union Trust Company Casting mold for the production of bullets and lines
DE1513501B2 (en) * 1965-07-30 1972-02-24 Siemens AG, 1000 Berlin u. 8000 München DC FILTER ARRANGEMENT WITH TRANSISTORS
GB1222751A (en) * 1969-03-03 1971-02-17 Comm Consultants Ltd Stabilized d.c. power supply
JPS61173324A (en) * 1985-01-29 1986-08-05 Matsushita Electric Ind Co Ltd Power source device
US4870421A (en) * 1987-12-28 1989-09-26 General Electric Company Regulating switch for transmitting modules in a phased array radar
SE9100595D0 (en) * 1991-03-01 1991-03-01 Carlstedt Elektronik Ab ENERGY FREE POWER SUPPLY
EP0658004A3 (en) * 1993-12-07 1996-05-01 Meidensha Electric Mfg Co Ltd Digital temperature compensated crystal oscillator
US5559423A (en) * 1994-03-31 1996-09-24 Norhtern Telecom Limited Voltage regulator including a linear transconductance amplifier
JPH0830340A (en) * 1994-07-14 1996-02-02 New Eraa:Kk Dc/dc converter
EP0744836A3 (en) * 1995-05-25 1998-03-25 Kabushiki Kaisha Meidensha Temperature compensated crystal oscillator
DE19922467B4 (en) * 1999-05-18 2006-12-07 Jochen Bihl Method and device for separation of voltage source and data decoupling in AS-Interface
DE10149827A1 (en) * 2001-10-09 2003-04-30 Siemens Ag Stabilizing circuit has one switched mode supply stage output connected to one supply voltage pole, load coupled to other switched mode supply stage output and to other supply pole

Also Published As

Publication number Publication date
DE102005004391A1 (en) 2006-08-10
WO2006081939A3 (en) 2007-06-28
WO2006081939A2 (en) 2006-08-10
EP1844382A2 (en) 2007-10-17
IL184839A0 (en) 2007-12-03
IL184839A (en) 2012-06-28

Similar Documents

Publication Publication Date Title
DE3631099C2 (en) CMOS output stage
DE10134874B4 (en) line driver
DE102006028093B4 (en) Amplifier arrangement and method for amplifying a signal
DE102007011715B4 (en) Amplifier arrangement for amplifying a signal
DE102004052174B4 (en) An amplifier circuit comprising an amplifier with low-pass filtered feedback
EP1844382B1 (en) Filter circuit
EP2529482A1 (en) Differential amplifier having a rail-to-rail input voltage range
DE102005055426A1 (en) Circuit arrangement with a feedback, fully differential operational amplifier
DE10064207A1 (en) Circuit arrangement for low-noise, fully differential amplification
DE19854847C2 (en) amplifier arrangement
DE19604041C1 (en) High-side switch load current detection circuit
DE102004022991B3 (en) Sample differential amplifier and sample amplifier
EP0523266A1 (en) Integratable current mirror
DE102018116669B4 (en) Method for operating a low-drop voltage regulator without backup capacitor with a large voltage range
EP1078460A1 (en) Method and device for switching a field effect transistor
EP0696849A2 (en) Control apparatus with a circuit arrangement for its protection when the earth connection is interrupted
DE102007027448B4 (en) Amplifier circuit having an output transistor for driving a complex load
EP1198880B1 (en) Arrangement comprising a first and a second amplifier whereby a maximum of one of said amplifiers amplifies
DE102019116700B4 (en) Back-up capacitor-free low-drop voltage regulator with a large voltage range with a DIMOS transistor and method for its operation
DE102004025913B3 (en) Integrated circuit
EP1391035B1 (en) Circuit arrangement comprising cascaded field effect transistors
DE10235447A1 (en) Electronic switch uses FET control signal made up at least partly of correction signal generated from switched signal for at least one switch state for frequency-dependent voltage drop compensation
DE102018116667B4 (en) Back-up capacitor-free low-drop voltage regulator with a large voltage range with a DIMOS and an NMOS transistor as load transistor and voltage regulator system
DE3109441A1 (en) OPERATIONAL AMPLIFIER WITH INCREASED SUSPENSION SPEED
EP3387749B1 (en) High-side switch for supplying power to at least one sensor

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 20070504

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC NL PL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL BA HR MK YU

17Q First examination report despatched

Effective date: 20080129

DAX Request for extension of the european patent (deleted)
RBV Designated contracting states (corrected)

Designated state(s): DE FR GB IT TR

RBV Designated contracting states (corrected)

Designated state(s): DE FR GB IT TR

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB IT TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

Free format text: NOT ENGLISH

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 502006010597

Country of ref document: DE

Effective date: 20120119

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: TR

Payment date: 20120214

Year of fee payment: 7

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20120817

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 502006010597

Country of ref document: DE

Effective date: 20120817

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 11

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 12

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20140117

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 13

P01 Opt-out of the competence of the unified patent court (upc) registered

Effective date: 20230525

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20240119

Year of fee payment: 19

Ref country code: GB

Payment date: 20240124

Year of fee payment: 19

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20240131

Year of fee payment: 19

Ref country code: FR

Payment date: 20240118

Year of fee payment: 19