EP1777988B1

EP1777988B1 - Improvements to a public address system having zone isolator circuits

Info

Publication number: EP1777988B1
Application number: EP06255349A
Authority: EP
Inventors: Eric c/o Protec Fire Detection Plc Priest
Original assignee: Protec Fire Detection PLC
Current assignee: Protec Fire Detection PLC
Priority date: 2005-10-20
Filing date: 2006-10-17
Publication date: 2009-08-12
Anticipated expiration: 2026-10-17
Also published as: GB2432091A; GB2432091B; DE602006008402D1; EP1777988A3; EP1777988A2; ATE439744T1; GB0521337D0

Abstract

A public address network includes a driver unit (11) that comprises a high pass circuitry pass and a low pass circuitry pass. The high pass part drives an audio signal (14) on to a pair of signal wires (12). The low pass part comprises a gyrator circuit that drives a pilot signal (15) on to the pair of signal wires (12). The signal wires transmit the audio signal and deliver it to one or more audio output units (16). The signal wires also transmit the pilot signal and deliver it to one or more isolator circuits (20). Each isolator circuit is arranged to operatively isolate a section of the signal wires.

Description

The present invention relates in general to improvements to a public address system and in particular, but not exclusively, to improvements to a public address system used as a voice alarm speaker network in conjunction with a fire or safety alarm system.
Typically, a public address system comprises a plurality of speakers positioned at convenient locations around a building or other site, each coupled to a central control unit including an audio amplifier for driving a audio signal to the speaker units. It is desired to minimise the amount of wiring in a system, in order to minimise cost and complexity and to improve long term reliability. Ideally, it is desired to use a single pair of signal wires coupled to each speaker unit, with the speaker units typically being coupled across the signal wires in parallel. Using a single pair of signal wires minimises cabling costs and aids discrete installation. However, this arrangement has minimal redundancy and a fault such as a short circuit may occur at any point along the signal wires, leading to a malfunction of the system. A short circuit fault generally means that the system must be shut down in order to avoid damage to sensitive components, such as the audio amplifier. An open circuit fault, for example due to an accidental break in the signal wires, can often be tolerated, but loud speakers positioned after the break do not receive an audio signal.
One such system is described in EP0967833 filed by the present applicants.
The system of EP0967833 is advantageous in that it provides a public address system having greater fault tolerance, whilst requiring minimal wiring and is designed to maintain operation despite a short circuit fault or an open circuit fault occurring on a single pair of signal wires.
In the prior system there is provided an isolator circuit for use with signal wires, comprising: fault detection means for detecting a fault condition on the signal wires; and interrupt means for interrupting the signal wires, the interrupt means being responsive to the fault detection means. The interrupt means comprises an isolator circuit locatable in series at a predetermined position along the signal wires and the fault detection means comprises switch means for switching to a fault detected state when a predetermined fault condition is detected on the signal wires.
The fault detection means is generally an over-current trip-out switch which determines a short circuit fault condition when a load current on the signal wires exceeds a predetermined limit.
The interrupt means, generally a relay, is arranged to operatively interrupt at least one of the signal wires in response to a fault condition being detected by the fault detecting means. Preferably, the relay has contacts which are normally open, and which are held closed in normal operation to complete the signal path. Preferably, the relay is driven by a constant current source, which operates in response to the fault detecting means.
Figures 1 through 6 show the arrangements of the system of EP0967833 in more detail.
Referring to Figure 1, a schematic layout is shown for a network 10 comprising a control station 11 having an amplifier for driving an audio signal 14 and a pilot signal 15 on to signal wires 12. The signal wires 12 are divided into sections 12a, 12b, etc., by isolators 20. Each section is provided with one or more loud speaker units 16 or other devices.
In a preferred normal operating condition, the pilot signal 15 is detected by each isolator unit 20 which, in response, completes the signal path between relevant sections e.g. 12a, 12b of the signal wires. A successful operating condition is determined when the pilot signal 15 reaches an end of line monitor 13. In this normal condition, the audio signal 14 is supplied to each of the speaker units 16 arranged in parallel across the signal wires 12 such that, for example, an alarm message is heard simultaneously throughout a building.
The operation of each isolator unit 20 will now be described in more detail. Generally, each isolator unit 20 is of identical construction.
Referring to Figure 2, a basic structure of an isolator unit is shown in block diagram form. The isolator unit 20 comprises a relay 21 whose contacts are arranged to lie in a signal path between an input coupled to a first signal wire section 12a and an output coupled to a second signal wire section 12b. The signal wires 12a and 12b form adjacent sections to the isolator unit 20.
The relay 21 operates in accordance with a control signal from a relay driver circuit 22 which is coupled to a short circuit detector unit 23.
In a first embodiment of EP0967833 , the short circuit detector 23 comprises a voltage sensor for determining the load current drawn by an output section of the isolator, i.e. on the signal wires 12b. In a second embodiment, the short circuit detector is arranged to sense voltage developed across both the output load 12b and the input load 12a, such that the isolator circuit may operate bidirectionally.
In a normal operating condition, no short circuit condition will be detected and the driver 22 will operate to close the contacts of relay 21, thereby completing the signal path between the input 12a and the output 12b. However when a short circuit fault is detected by the control station 11, the pilot signal is interrupted thus removing power supply from the isolators, the relay 21 de-energises the contacts of the relay open, thereby interrupting the signal path.
Referring now to Figure 3, a more detailed block diagram of the isolator unit 20 is shown. In this arrangement, the signal wires 12 carry both an audio signal 14 and a pilot signal 15. The pilot signal is ideally a direct current signal. As shown in Figure 3, each isolator unit comprises means for detecting the pilot signal 15, suitably a low pass filter 24. The low pass filter 24 recovers the direct current component from the signals received at the input 12a to produce a direct current power supply, suitably of around 50 volts DC. In a normal operating condition, the active current source (or constant current generator) 221 supplies a predetermined constant current through a relay driver 222 to the coil of a relay 21 to keep the normally open contacts thereof closed and thereby complete the signal path. Conveniently, the constant current generator 221 provides a current of about 10 milliamps thereby underrunning the coil of relay 21. Advantageously, less power is dissipated and relay life expectancy is improved despite the relay coil being powered for most of the time in a normal operating condition.
Where the pilot signal 15 is not present at the input 12a to the isolator 20, no power supply is provided through the low pass filter 24 and the contacts of relay 21 remain open to interrupt the signal path through the isolator.
When the short circuit detector 23 detects a short circuit on the output line 12b, the relay driver 222 is switched to divert current from the coil of relay 21, thereby opening the contacts of the relay and interrupting the signal power through the isolator.
Referring now to Figure 4, a bi-directional isolator circuit 20 is shown.
The DC pilot signal 15 can be obtained from the first signal wire input 12a through a first low pass filter comprising inductor L1 and capacitor C2, or from the second signal wire input 12b through a second low pass filter comprising a second inductor L2 and a second capacitor C3. The DC pilot signal is supplied to power the remainder of the isolator circuit through a diode OR gate formed from diodes D1 and D2. The inductors L1 and L2 preferably have an inductance of approximately 90H, i.e. a relatively large value, to minimise loading of the isolator circuit on the audio components of the network.
As shown in Figure 4, the short circuit detector 23 comprises an AND gate formed of diodes D4 and D6 coupled to either side of the isolator 12a and 12b. Therefore, a single short circuit detector can be used, comprising zener diode Z1, bias resister R1 and power transistor T1. The relay 21 is closed only if the short circuit detector 23 detects a high resistance on both sides of the isolator 20, and, otherwise, the relay remains open.
Referring now to Figures 1 and 5, the preferred network will be described in more detail.
As shown in Figure 5, the audio signal 14 is driven onto the signal wire loop 12 through a transformer TX1. Typically, the transformer TX1 is a 100V line transformer taking an audio signal input from an audio amplifier 114 and providing this to both ends of the signal line loop 12.
A pilot signal driver 115 is used to superimpose the pilot signal, in this example a DC signal of about 65 volts, onto the loop 12 alongside the audio signal 14. Each loudspeaker unit 16 on the loop 12 filters out the pilot signal 15, such as by using a decoupling capacitor, to leave only the audio signal 14. Therefore, the pilot signal 15 does not affect the audio signal 14.
In a normal operating condition, the pilot signal 15 travels from one end only all the way along the signal line loop 12 to reach an end of line monitor 13 which produces a normal condition signal and operator feedback, such as a green LED.
When an open circuit fault occurs on the signal loop 12, the pilot signal does not reach the end of line monitor 13 and an open circuit fault condition is detected. A control circuit 14 provides operator feedback, such as a red LED, and closes line relays RLA1 and RLA2. As shown in Figure 5, closing relays RLA1 and RLA2 connects both ends of the loop 12 (shown as A and A', and B and B', respectively) such that the pilot signal 15 is now supplied to both ends of the loop 12. The network is therefore able to detect an open circuit fault and maintain full operation.
Referring now to Figure 6, the control circuit 14 comprises a global overcurrent trip detector 141 for detecting a short circuit on the network. If a short circuit is detected by the overcurrent trip circuit 141 or if the pilot signal does not reach the end of line circuit 13, the control circuit 14 causes the network to be shutdown, thereby avoiding possible damage to sensitive components such as the audio amplifier 114. The pilot signal 15 no longer reaches any of the isolators 20, each of which thereby isolate respective sections of the signal wire loop 12.
After a predetermined delay, reboot circuit 143 causes the pilot signal 115 and the audio signal 114 to be reapplied to the signal loop 12. The isolators 20 will each in turn assess adjacent sections of the signal loop 12 for the short circuit fault, and reconnect the signal path only if the short circuit fault does not occur in the adjacent line sections. For example, referring again to Figure 1, isolator 20b tests for a short circuit in sections 12a and 12b and will connect the signal path 12a to 12b only if no short circuit is detected.
As discussed above in relation to Figure 5, line relay control circuit 142 will, in this fault condition, close line relays RLA1 and RLA2 such that the pilot signal 15 is driven from both ends of the loop 12. In this configuration, the pilot signal 15 and the audio signal 14 thereby reach all parts of the signal loop 12, except for the section containing the short circuit fault which is isolated by isolator units 20 at either side thereof.
Whilst the above system is an excellent one and is extremely fault tolerant and robust, it does have a couple of key disadvantages in terms of the cost and bulk of components required to implement it.
In particular, the size and construction of the transformer TX1 (which is a triple wound component) shown in Figure 5 and used to combine the audio signal with the DC Pilot signal has considerable cost implications and it would be preferable to be able to omit this feature and replace with components which are susceptible of integration.
It is an aim of preferred embodiments of the invention to provide a system for combining a DC pilot signal with an audio signal for use with serially connected isolator circuits of the type used and described above in relation to EP0967833 , wherein the means for combining the pilot signal and audio signal is susceptible of a greater level of integration.
It is another aim of preferred embodiments of the invention to provide a public address system using a single pair of signal lines, wherein the public address system is fault tolerant and will maintain operation despite a short circuit fault or an open circuit fault occurring and wherein the system is susceptible of a good degree of integration.
According to a first aspect of the invention, there is provided a public address network comprising a driver unit (11) for driving an audio signal (14) on to a pair of signal wires (12) for delivery to one or more audio output units (16), and for driving a pilot signal (15) on to the signal wires (12) for delivery to one or more isolator circuits (20), wherein each isolator circuit (20) is arranged to operatively isolate a section of the signal wires (12) and wherein the network is characterised in that the means for driving the audio signal and the pilot signal onto the signal wires comprises a high pass circuitry part and a low pass circuitry part, the low pass part being arranged to present the pilot signal to the line, whilst the high pass part presents the audio signal to the line, the low pass circuitry part comprising a gyrator circuit.
According to a second aspect of the invention, there is provided a method of operating a public address network having a series signal path including a pair of signal wires (12) coupled to one or more audio output units (16) and one or more isolators (20) for isolating sections of the signal wires (12), comprising the steps of:

driving an audio signal (14) on to the signal wires (12) for delivery to the audio output units (16);
driving a pilot signal (15) on to the signal wires (12) for delivery to the isolators (20);
detecting the pilot signal at a first end of the series signal path using an end of line detector (13);
if the pilot signal (15) is not present at the end of line detector (13), then driving the audio signal (14) and the pilot signal (15) from both ends of the audio signal path, the method being characterised in that the steps of driving the audio signal and the pilot signal on to the signal wires comprise, respectively, applying the audio signal to a high pass circuitry part and applying the pilot signal to a low pass circuitry part, the low pass part being arranged to present the pilot signal to the line, whilst the high pass part presents the audio signal to the line, the low pass circuitry part comprising a gyrator circuit.

For a better understanding of the invention and to show how embodiments of the same may be put into effect, preferred embodiments of the invention will now be described, by way of example only, with reference to the following figures.

Figure 7 shows in schematic block diagram form a section of fault tolerant public address in which a pilot signal and an audio signal may in principle be combined using high pass and low pass circuitry parts;
Figure 8 shows in schematic block diagram form a section of fault tolerant public address in which a pilot signal and an audio signal may be combined and in which the low pass part comprises a gyrator circuit;
Figure 9 shows in more detail, but still in schematic block diagram form, a gyrator part of the section shown in of Figure 8;
Figure 10 explains in schematic block diagram form a preferred implementation of component parts of the gyrator of Figure 9; and
Figure 11 is a circuit diagram showing an implementation of the preferred implementation of Figure 10.

In the description that follows, where appropriate, like reference numerals will be utilised to refer to like components throughout. In particular, it will be appreciated that the arrangements of Figures 7 to 10 as described herein relate to improvements/replacements for components of the circuitry referred to in the prior art arrangements of Figures 1 to 6 for combining the pilot signal and the audio signal.
As was mentioned previously, a shortcoming of the prior circuitry is that the size and construction of the transformer TX1 used to combine the audio signal with the DC Pilot signal make the transformer costly and that it would be preferable to be able to omit this feature and replace with components which are susceptible of integration.
In Figure 6, there is shown an alternative means of combining the audio signal with the DC pilot signal using parts designated LPF and HPF referring to a Low Pass Filter Part and a High Pass Filter Part respectively.
Referring now to Figure 7, there is shown a combining section of a public address system controller in which a pilot signal and an audio signal may be combined with one another using an LPF and a HPF. The diagram of Figure 7 shows a 2-wire signal line output 12, an inductor L and a capacitor C. The inductor L (having input/output connections X/Y) is a simple LPF which receives the DC Pilot signal 15 at its input end X, whilst an audio signal 14 is a.c. coupled onto the signal lines 12 via capacitor C which is a simple HPF. This simplified circuit shows in basic form how a DC signal part and an AC signal part can be used to provide a combined AC/DC signal output onto the signal wires without the need for a triple wound transformer. The disadvantage of this simplified circuit however is that the size of the inductor L needed to implement such an arrangement is prohibitively large.
Referring now to Figure 8, there is shown in schematic block diagram form a figure similar to the figure 7 implementation which in accordance with the teachings of the present application forms the combining section of a public address system controller in which a pilot signal and an audio signal may be combined with one another. The diagram of Figure 8 (as with figure 7) shows a 2-wire signal line output 12, which as in Figures 1 to 6 carries the combined audio signal 14 and a pilot signal 15 - typical values of these two signals being 64V DC for the pilot signal and 100V RMS a.c. for the audio signal - a full wave gyrator circuit G and a capacitor C. The gyrator circuit G (having input/output connections X/Y) receives the DC Pilot signal 15 at its input end X, whilst an audio signal 14 from an audio amplifier such as Audio Amp 114 of figure 5 is a.c. coupled onto the signal lines 12 via capacitor C.
As will be understood by the skilled man, a gyrator circuit is, in itself not new and is an established method of replacing a passive inductive component. However, the particular demands of the isolator circuits for public address system described herein are such that a conventional gyrator circuit may not be directly employed.
Usually, gyrators are utilised within environments in which there is a relatively high DC signal component relative to the AC component, so that large negative voltage swings do not need to be catered for. In the present invention, the reverse is the case in that a.c. audio signal voltages of 100v rms, around 300v peak-to-peak, need to be catered for along with a relatively smaller DC pilot signal of 64v. In these particular cases therefore it is somewhat of a problem to devise an appropriate gyrator circuit that utilises discrete component control circuitry which needs to be unaffected by 300v variation in signal voltage.
Figure 9 shows in more detail, the basic design of the two port x/y construction of gyrator G of Figure 8. Here, the gyrator G comprises two half-cycle gyrators G_P and G_N - being a positive half-cycle gyrator and a negative half-cycle gyrator respectively - and diodes D_P and D_N. Here, the diode/gyrator pair D_P/G_P perform the gyrator function during positive going parts of the line input waveform, whilst the diode/gyrator pair D_N/G_N perform the gyrator function during the negative going parts of the line input.
Referring now to Figure 10, a detailed look at the gyrator circuit G is given. Here, each of the half-cycle gyrators may be broken down into a transimpedance stage, an error comparator stage, a transimpedance stage and a common full-wave integration stage. Thus, in Figure 10 the positive half-cycle gyrator comprises: positive transimpedance stage Z_P, positive transconductance stage gmp, and positive error comparator stage ERR_P, whilst the negative half-cycle gyrator comprises: negative transimpedance stage Z_N, negative transconductance stage gm_N, and negative error comparator stage ERR_N, with the negative and positive error comparator stages are commonly connected to a reference input REF1 and a full wave integration stage INT.
Here, it is noted that a transimpedance stage is one which provides an output voltage that is a function of input current, whilst a transconductance stage is one that converts an input voltage to a current.
Node Y is connected to signal line 12 that carries (when present) the 100v rms audio signal and node X is connected to receive the 64v DC pilot signal that is to be combined with it.
The circuit of Figure 10 functions by controlling operation of the transconductance stage according to the states of both an output voltage signal ERR and a reference voltage signal Vref. The reference voltage signal, rather than being a constant voltage is a variable one that is derived by performing an integration function upon the signal 12 appearing on the signal wires at Y.
To illustrate the above, if it is assumed that there is currently no DC offset upon the signal wire at Y and that the ac audio signal 14 present upon them is symmetrical, then the integration value taken over a full wave period is zero. Whereas if there is a DC offset, such as 64volts, then the integration value will reflect that DC offset.
We will now consider the basic functions of the transconductance stage and transimpedance stage. The transconductance stage is essentially a variable constant current source that provides a constant current output which is a function of its input voltage, and the magnitude of the output constant current is determined by a control signal CNTRL provided to it by the error comparator stage. The transimpedance stage on the other hand is one which will provide an output voltage which is a function of the input current. Together therefore a serially coupled transconductance stage and transimpedance stage will provide a buffered DC voltage to the signal wires at node Y which will vary according to the magnitude of the control signal CNTRL.
Concerning the value of the variable reference voltage V_ref, let us assume that at relatively low frequencies of signal appearing on the wires 12, the voltage V_ref will track such changes. In this way, as an ac signal on the wires 12 increases positively, V_ref also increases positively. Error Comparator stage ERR_P compares the rising reference voltage V_ref and the error signal ERR and if the reference voltage is greater than the error signal, then the output signal CNTRL of error Comparator stage ERR_P increases to cause the transconductance stage to increase its output current and accordingly to cause a larger DC value output voltage to be produced by the transimpedance stage. In this manner, for a relatively low frequency varying ac audio signal, a rise at node Y in instantaneous voltage magnitude due to an increasing audio signal voltage, causes a rise in the current through the positive side of the gyrator, which is in phase with the rise in voltage across the positive gyrator.
In similar fashion to the above, if there is a relatively low frequency decreasing ac audio signal voltage on the line at Y, then the Vref will follow this voltage and Vref will become less than ERR - in which case, the control signal CNTRL is arranged to reduce in magnitude, and thereby reduce the current flow in the transconductance stage and accordingly reduce the DC voltage imposed to the line at Y via the transimpedance stage.
The same arguments and explanations apply to the negative half cycle gyrator side in that Vref follows a slow moving ac varying signal and as Vref increases negatively after going below zero volts, the positive half cycle gyrator side will have turned off and the control signal -CNTRL responds to the difference between negative error signal -ERR and the negative reference voltage -Vref to cause the transconductance stage to provide an increased negative current that is in phase with the negative voltage across the negative side of the gyrator.
In all of the above, the reference voltage Vref is a value that is related to the changing voltage on signal wires 12 and has an associated time constant. Vref is such that for signals for which the time constant is less than the period of the ac signal then the reference voltage follows the input waveform, whereas for signals wherein the time constant is much greater than the period, the reference voltage Vref tends towards a constant value. Accordingly, for a high frequency audio signal, the reference voltage may be assumed to be relatively constant and the DC current level imposed on the signal wires 12 at node Y via the transconductance and transimpedance stage will therefore also tends towards a constant current value and, as the skilled man will realise, the fundamental characteristic of a constant current generator is to exhibit an infinite impedance. Naturally, the practicalities mean that the impedance of a constant current generator is actually finite - but very high.
Referring now to Figure 11, there is shown a practical implementation of the block diagram of Figure 10.
In the figure, the transconductance stages Gm_N and Gm_P are field effect transistors (FETs) Q1 and Q2 respectively, the transimpedance stages Z_N and Z_P are resistors R1, R2 coupled to the outputs of the FETs, the error comparator stages ERR_N and ERR_P are operational amplifiers U1 and U2 respectively, the error signals ERR_P and ERR_N are taken from the FET outputs and the reference voltage V_ref is taken from a mid point of an RC chain which acts as an integrator with a corner frequency of approximately 50Hz.
According to the previous explanations, the FETs act as variable constant current sources under control of a control signal CNTRL output by the relevant Op-Amp and this control signal varies according to variation of both Vref and the error signal ERR. As the current provided by the FETs is varied, so is the voltage output at node Y.
Consider the operation of the circuit with DC only across X and Y. Here, if X is positive and Y is negative, then D_N will be reverse biased, disabling Q1, R1 and U1. Current will flow through R and charge C. Vref will increase exponentially causing Q2 drain current to ramp up to a maximum value, limited only by the value of R2, Rds of Q2, and the terminal voltage across X and Y.
If, on the other hand, the voltage across X and Y is reversed (i.e. X is negative and Y is positive), then D_P is reverse biased, disabling Q2, R2 and U2. D1 is now forward biased enabling Q1, R1, and U1. Current now flows through R and charges C. Vref will increase exponentially causing the drain current of Q1 to ramp up to a negative maximum value which is limited only by the value of R1, Rds of Q1 and the terminal voltage across Y and X.
The above description can be seen to mimic the action of an inductor if such an inductor were to be placed across a DC supply voltage at X, Y. In other words, if such an inductor were in place then current would ramp up to a maximum value limited only by the DC resistance of its windings and the voltage across its terminals.
If we consider now the imposition of a low frequency AC voltage across X, Y (low here meaning a frequency whose period is much longer than the time constant of RC), then Vref will follow the amplitude of this low frequency AC voltage (with a slight delay), causing the current to ramp up and down virtually in phase with the voltage, the current being limited by Q1 Rds (on) plus R1, in the negative half cycle and by Q2 Rds (on) plus R2 in the positive half cycle, together with the peak negative and peak positive voltage of the low frequency AC voltage.
As the skilled man will appreciate, the low frequency AC behaviour of this circuit is again mimicking the action of an inductor in that a suitable value of inductance connected across a low frequency AC supply presents a low inductive reactance.
Finally now, let us consider the situation in which a relatively high frequency AC voltage is placed across X, Y (high meaning a frequency whose period is shorter than the time constant of R1C1). In such cases, with a symmetrical AC waveform, Vref is arranged to become the average of the high frequency signal and as the frequency rises will tend towards a value of zero - resulting in an increase in both Q1 Rds and Q2 Rds as the frequency rises, until the point at which Vref becomes virtually zero and Q1 and Q2 turn off completely presenting a very high impedance across X, Y.
The skilled man will realise that the high frequency behaviour of the circuit is that of a high inductive reactance.
In the above specification, there has been described a manner in which a public address system of the type set out in EP0967833 can be improved by the use of a specially developed arrangement for combining the a.c. audio part and DC pilot signal part using low pass and high pass filters, wherein in the low pass portion a novel full wave gyrator design is utilised. Particularly advantageous to the design is the use of a variable reference voltage that enables operation of the gyrator within voltage ranges that are normally not dealt with correctly by conventional gyrator design and to work with relatively low values of dc signal within a high a.c. voltage environment.
The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.
All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive.
Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.
The invention is not restricted to the details of the foregoing embodiment(s). The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.

Claims

A public address network comprising a driver unit (11) for driving an audio signal (14) on to a pair of signal wires (12) for delivery to one or more audio output units (16), and for driving a pilot signal (15) on to the signal wires (12) for delivery to one or more isolator circuits (20), wherein each isolator circuit (20) is arranged to operatively isolate a section of the signal wires (12) and wherein the network is characterised in that the means for driving the audio signal and the pilot signal onto the signal wires comprises a high pass circuitry part and a low pass circuitry part, the low pass part being arranged to present the pilot signal to the signal wires (12), whilst the high pass part presents the audio signal to the signal wires (12), the low pass circuitry part comprising a gyrator circuit.
A method of operating a public address network having a series signal path including a pair of signal wires (12) coupled to one or more audio output units (16) and one or more isolators (20) for isolating sections of the signal wires (12), comprising the steps of:
driving an audio signal (14) on to the signal wires (12) for delivery to the audio output units (16);

driving a pilot signal (15) on to the signal wires (12) for delivery to the isolators (20);

detecting the pilot signal at a first end of the series signal path using an end of line detector (13);

if the pilot signal (15) is not present at the end of line detector (13), then driving the audio signal (14) and the pilot signal (15) from both ends of the audio signal path, the method being characterised in that the steps of driving the audio signal and the pilot signal on to the signal wires comprise, respectively, applying the audio signal to a high pass circuitry part and applying the pilot signal to a low pass circuitry part, the low pass part being arranged to present the pilot signal to the line, whilst the high pass part presents the audio signal to the line, the low pass circuitry part comprising a gyrator circuit.
The network of claim 1 or the method of claim 2, wherein the low pass part and the high pass part share a common output node (Y) at which the audio signal and pilot signal are combined.
The network or method of claim 3, wherein the gyrator circuit comprises a pair of matched circuits, one of which is a positive gyrator circuit arranged to operate during positive going half cycles of the audio signal to impose the pilot signal upon the signal wires (12), and the other of which is a negative gyrator circuit arranged to operate during negative going half cycles of the audio signal to impose the pilot signal upon the signal wires (12).
The network or method of claim 4, wherein the positive and negative gyrator circuits are buffered from a pilot signal generator by isolator diodes (D_P, D_N).
The network or method of claim 4 or 5, wherein the positive and negative gyrator circuits each comprise a transconductance stage, a transimpedance stage and an error comparator stage, both circuits including a common reference voltage input node.
The network or method of claim 6, wherein the reference voltage node is arranged to present a reference voltage to the positive and negative circuits that is a variable one that is derived by performing an integration function upon the signal appearing on the signal wires (12).
The network or method of claim 7, wherein in the case where there is no pilot signal present and where the audio signal (14) is present and symmetrical, then the reference voltage is zero.
The network or method of claim 7 or 8, wherein in the case where the pilot signal is present as a DC offset, then the reference voltage value will reflect that DC offset.
The network or method of claim 6, 7, 8 or 9, wherein the reference voltage Vref is a value that is related to the changing voltage on signal wires (12) and has an associated time constant.
The network or method of claim 10, wherein Vref is such that for signals for which the time constant is less than the period of the audio signal, the reference voltage follows the input waveform, whereas for signals wherein the time constant is much greater than the period, the reference voltage Vref tends towards a constant value.
The network or method of claim 10 or 11, wherein for a high frequency audio signal, the reference voltage is relatively constant and the DC current level imposed on the signal wires (12) via the transconductance and transimpedance stage will tend towards a constant current value
The network or method of any of claims 6 to 12, wherein the transconductance stage comprises a variable constant current source that provides a constant current output which is a function of its input voltage.
The network or method of claim 13, wherein the magnitude of the output constant current of the transconductance stage is determined by a control signal CNTRL provided to it by the error comparator stage.
The network or method of claim 14, wherein the transimpedance stage provides an output voltage which is a function of the input current provided to it by the transconductance stage to provide a buffered DC voltage to the signal wires (12) which will vary according to the magnitude of the control signal CNTRL.
The network or method of claim 15, wherein for a slow varying a.c. signal the voltage V_ref tracks such changes so that as the ac signal on the signal wires (12) increases positively, V_ref increases positively.
The network or method of any of claims 6 to 16, wherein the Error Comparator stage compares the reference voltage V_ref and the error signal ERR and if the reference voltage is greater than the error signal, then the output signal CNTRL of the error comparator stage increases to cause the transconductance stage to increase its output current and accordingly to cause a larger DC value output voltage to be produced by the transimpedance stage.
The network or method of any of claims 6 to 17, wherein the Error Comparator stage compares the reference voltage V_ref and the error signal (ERR) and if the reference voltage is less than the error signal then the control signal CNTRL is arranged to reduce in magnitude, and thereby reduce the current flow in the transconductance stage and accordingly reduce the DC voltage imposed to the signal wires (12) via the transimpedance stage.
The network or method of any of claims 6 to 18, wherein the transconductance stages comprise field effect transistors (FETs), the transimpedance stages comprise resistors coupled to the outputs of the FETs, and the error comparator stages comprise operational amplifiers.
The network or method of claim 19, wherein error signals ERR_P and ERR_N are taken from the FET outputs.
The network or method of claim 20, wherein the reference voltage V_ref is taken from a mid point of an RC chain which acts as an integrator with a corner frequency of approximately 50Hz.