EP1350327A1 - Method and system for coding or decoding - Google Patents

Method and system for coding or decoding

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Publication number
EP1350327A1
EP1350327A1 EP01991699A EP01991699A EP1350327A1 EP 1350327 A1 EP1350327 A1 EP 1350327A1 EP 01991699 A EP01991699 A EP 01991699A EP 01991699 A EP01991699 A EP 01991699A EP 1350327 A1 EP1350327 A1 EP 1350327A1
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EP
European Patent Office
Prior art keywords
bits
information
bit
coding
information bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
EP01991699A
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German (de)
French (fr)
Inventor
Tim Fingscheidt
Matthias Marke
Wen Xu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
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Siemens AG
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Publication of EP1350327A1 publication Critical patent/EP1350327A1/en
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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3994—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using state pinning or decision forcing, i.e. the decoded sequence is forced through a particular trellis state or a particular set of trellis states or a particular decoded symbol

Definitions

  • the invention relates to a method and an arrangement for coding an information bit sequence as well as a method and an arrangement for decoding, which are used in particular in the context of multi-rate coding.
  • Source signals or source information such as voice, sound,
  • Image and video signals almost always contain statistical redundancy, i.e. redundant information.
  • This redundancy can be greatly reduced by source coding, so that an efficient transmission or storage of the source signal is made possible.
  • This reduction in redundancy eliminates redundant signal contents based on the prior knowledge of e.g. statistical parameters of the signal curve are based. After the transmission, these parts are added to the signal again during source decoding, so that there is little or no loss of quality.
  • the bit rate of the source-coded information which is composed of so-called net bits, is also called the net bit rate.
  • channel coding it is customary to add redundancy by channel coding to the information bits resulting from the source coding in order to largely recognize and possibly also correct the influence of the transmission on channel interference in the receiver or in the decoder.
  • a predetermined number NK of redundant error protection bits is added to a predetermined number K of information bits or net bits, resulting in N so-called code bits or gross bits, which before finally being transmitted over the disturbed transmission channel.
  • the bit rate of the channel-coded information, ie the gross bits, is also called the gross bit rate.
  • a simple type of channel coding is to simply repeat the information bits to be transmitted.
  • newer channel coding methods which are also known per se, are based on convolutional coding.
  • ratio of the gross bit rate to the net bit rate is often around 2: 1, which enables efficient channel coding and decoding.
  • adaptive source and / or channel coding including adaptive decoding has been proposed, which should make it possible to source signals depending on the quality requirements of the information transmission or depending on the transmission conditions within the framework of a To remove source coding more or less redundant information and / or to add more or less redundant information as part of a channel coding for error protection.
  • AMR Adaptive Multirate
  • Such multi-rate coding methods are also described by their associated code modes and channel modes. Different code modes have different net bit rates, whereas different channel modes have different gross bit rates. Different code modes can exist within a channel mode.
  • such a multi-rate coding method can work in good half-channel (HR) channel mode under good channel conditions and / or in highly utilized radio cells. Under poor channel conditions and / or in low-capacity radio cells, the system should switch dynamically to the fill rate (FR) channel mode and vice versa.
  • the gross bit rate after the channel coding is constant, for example, within a channel mode; for example in the fill rate (FR) channel mode it is 22.8 kbit / sec. and in Half Rate (HR) channel mode 11.4 Kbit / sec. Since the gross bit rate with a variable net bit rate within a channel mode should be uniform after the channel coding, the channel coding is adapted accordingly and the information bits during the channel coding have a correspondingly adapted variable number of errors. protection bits added. It is also known to carry out convolutional coding in the context of multi-rate coding.
  • the rate adaptation from the net bit rate to the desired gross bit rate can be carried out by puncturing and / or repeating bits and / or inserting previously known dummy bits together with or as part of the channel coding.
  • the invention is based on the problem of specifying a method and an arrangement for coding or for decoding which makes it possible to transmit information sequences with a variable net bit rate with good quality and little effort.
  • At least one deliberately selected information bit sequence with a low net bit rate which results from a source coding with a variable net bit rate, is added as error protection bits to at least known dummy bits at previously known bit positions of the information bit sequence in order to generate one or more uniform gross bit rates.
  • "Variable net bit rate” also means at least two different adjustable net bit rates.
  • the information bit sequences with a low net bit rate also include a bit sequence (case 1) or not (case 2) representing the background noise of a DTX (discontinous transmission) mode.
  • a bit sequence (case 1) or not (case 2) representing the background noise of a DTX (discontinous transmission) mode.
  • DTX discrete transmission
  • the use of a DTX (discontinous transmission) mode in speech processing to reduce interference and power consumption is known as such. For example, if dummy bits are to be added to the two information bit sequences with the two lowest net bit rates, this means in case 1 that this is the background noise of a DTX
  • the invention in particular the targeted and selective use of the insertion of previously known dummy bits for rate adaptation in multi-rate coding, is based on simulation results which were determined by means of complex simulation tools which were created especially for this purpose. In these simulations, it was found that the insertion of dummy bits for the purpose of rate adaptation in the context of multi-rate coding is particularly advantageous if at least the
  • Information bit sequences with the lowest non-zero net bit rate in particular only the information bit sequence with the lowest non-zero net bit rate, at least known dummy bits are added to known bit positions of the information bit sequence as error protection bits. No dummy bits for rate adaptation are added to the information bit sequences with higher net bit rates; The rate adaptation for these information bit sequences can take place in another way. Depending on the net bit rate of the information bit sequence, a switch is made between different rate adaptation methods.
  • the information bit sequences to which dummy bits have been added for error protection are convolutionally coded, a systematic or recursive-systematic code being used for the convolutional coding, and after the convolutional coding, the bits systematic for the dummy bits are at least partially be removed.
  • This has the advantage that the dummy bits are processed in order to achieve better error protection in the convolutional coding, but the resulting systematic bits, which can be found in the convolutionally coded bit sequence, do not have to be transmitted because their value and position are received is previously known and therefore these previously known systematic bits can be inserted into the received bit sequence at the previously known positions before the convolutional decoding.
  • a particularly advantageous embodiment variant of the invention or one of its further developments, as was shown in the above-mentioned simulations, provides for dummy bits to be added to the rate adaptation only if the gross bit rate to be implemented is particularly large, in particular if the gross bit rate to be implemented is largest of the gross bit rates occurring within the multi-rate coding. For example, dummy bits are only added to the two information bit sequences with the lowest or the two lowest net bit rates if their net bit rate is to be converted into the largest or second largest gross bit rate occurring within the multi-rate coding.
  • the rate adaptation is determined in further refinements
  • Information bit sequences with certain selected net bit rates are not only realized by adding dummy bits as described above, but are also punctured or repeated before or after the addition of dummy bits.
  • Information about the addition of dummy bits is used as a priori information for decoding an information bit sequence coded according to one of the abovementioned methods.
  • an arrangement for coding and an arrangement for decoding are also specified, which are set up in particular to carry out the method according to the invention or one of its developments.
  • Figure 1 simplified flow diagram of a method for multi-rate coding
  • Figure 2 block diagram of a processor device.
  • FIG. 1 shows multi-rate coding on the basis of a simplified scheme of a message transmission chain.
  • source signals are first compressed in the context of a source coding QC into information bit sequences of variable net bit rate nbr.
  • the different net bit rates from 6.8kbps to 24.0 kbps generated by the variable source coding characterize different code modes cml - cm8.
  • the information bit sequences with a variable net bit rate become one by means of various channel coding methods KC0 -KC19 Channel coding KC subjected, the component of which may be the rate adaptation according to the invention.
  • the channel coding KC converts the variable net bit rates into one or more uniform gross bit rates, which in turn characterize different channel modes km1 - km3.
  • bit sequences or code bits which are coded in this way, are further processed in a modulator (not shown) and then transmitted via a transmission link CH. Interference such as fading or noise occurs during transmission.
  • the transmission path CH lies between the transmitter and a receiver.
  • the receiver E optionally contains an antenna, not shown, for receiving the signals transmitted via the transmission link CH, a sampling device, a demodulator for demodulating the signals and an equalizer for eliminating the intersymbol interference. For simplification reasons, these facilities were not shown in FIG. 1 either. Possible interleaving and deinterleaving is also not shown.
  • An equalizer outputs reception values of a reception sequence. The received values have values' which deviate from "+1" and "-l" due to the disturbances in the transmission over the transmission link CH. Finally, in a channel decoder, the channel coding is undone.
  • the Viterbi algorithm is advantageously used for decoding convolutional codes.
  • the following is based on the first channel mode kml with a gross bit rate of 68 kbps, within which eight (shown) or nine (not shown) code modes cml, cm2 - cm8 with variable net bit rate of 6.8 kbps, 8.0 kbps, 10.0 kbps - 24.0 kbps are implemented , the coding in more detail wrote.
  • the gross bitrate of 68 kbps is the largest gross bitrate that occurs within multi-rate coding.
  • the remaining code modes or the corresponding information bit sequences are brought to 68 kbps gross bit rate by means of gross bit repetition and reception-side addition or simply by means of convolutional coding and puncturing; there is no provision for dummy bits known a priori.
  • This transmission-side coding with an effective total rate 1/10 of the code mode with the lowest net bit rate of 6.8 kbps is illustrated using the following scheme, the following abbreviations being used: apbB: bit known a priori; FC: convolutional coding; a, b: information bits; 0: apbB; ?: redundant bit due to convolutional coding.
  • apbB bit known a priori
  • A, B information bits
  • 0 Software for apbB
  • ? unknown software
  • 0 decoded apbB
  • FD convolutional decoding
  • the convolutional decoder is operated at three times the net bit rate due to the addition of the a priori known bits (dummy bits), which means an increase in complexity. It is therefore provided that dummy bits are inserted only in low-rate code modes. For example, in the example described, the three times the net bit rate of the lowest rate code with 3 * 6.8 kbps still corresponds approximately to the net bit rate and thus the decoding complexity of the highest rate code mode of 24 kbps.
  • the AMR-WB speech codec Adaptive Multirate Wideband
  • the EDGE / GERAN half rate channel in connection with the AMR speech codec (narrowband).
  • the AMR-WB speech codec has net bit rates between about 6 kbps and about 24 kbps, while the gross bit rate in the EDGE / GER N full rate channel is about 68 kbps.
  • FIG. 2 shows a program-controlled processor device PE, such as a microcontroller, which can also include a processor CPU and a memory device SPE.
  • Processor device PE which can be contained in particular in a communication device, such as a base station or a mobile station, is set up to carry out the methods explained above.
  • further components such as a digital signal processor or further memory devices, the basic function of which is associated with a processor, can be arranged inside or outside the processor device PE, such as a digital signal processor or other memory devices, which are assigned to the processor device, belong to the processor device, are controlled by the processor device or control the processor device
  • Processor device for controlling a mobile station is sufficiently known to a person skilled in the art, and which is therefore not dealt with in more detail at this point.
  • the different components can exchange data with the processor CPU via a bus system BUS or the input / output interfaces and, if appropriate, suitable controllers.
  • the memory device SPE which can also be one or more volatile and / or non-volatile memory modules, or parts the storage device SPE as part of the processor device
  • PE (shown in the figure) can be implemented or can be implemented as an external memory device (not shown in the figure) which is located outside the processor device PE and is connected to the processor device PE by means of suitable interfaces or a suitable bus system.
  • the program data such as, for example, the control commands or control procedures that are used to control the execution of the above-described methods, are stored in the storage device SPE.

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  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)

Abstract

According to the invention, at least dummy bits, which are known beforehand and which are located at bit positions of an information bit string that are also known beforehand, are added as error protection bits to at least the information bit string having the lowest net bit rate, which emerges from a source coding having a variable net bit rate.

Description

Beschreibungdescription
Verfahren und Anordnung zur Codierung bzw. DecodierungMethod and arrangement for coding or decoding
Die Erfindung betrifft ein Verfahren und eine Anordnung zur Codierung einer Informationsbitfolge sowie ein Verfahren und eine Anordnung zur Decodierung, welche insbesondere im Rahmen einer Multiratencodierung Einsatz finden.The invention relates to a method and an arrangement for coding an information bit sequence as well as a method and an arrangement for decoding, which are used in particular in the context of multi-rate coding.
Quellensignale bzw. Quelleninformationen wie Sprach-, Ton-,Source signals or source information such as voice, sound,
Bild- und Videosignale beinhalten fast immer statistische Redundanz, also redundante Informationen. Durch eine Quellencodierung kann diese Redundanz stark verringert werden, so dass eine effiziente Übertragung bzw. Speicherung des Quellensig- nals ermöglicht wird. Diese Redundanzreduktion beseitigt vor der Übertragung redundante Signalinhalte, die auf der Vorkenntnis von z.B. statistischen Parametern des Signalverlaufs beruhen. Nach der Übertragung werden bei der Quellendecodierung diese Anteile dem Signal wieder zugesetzt, so dass kein oder allenfalls ein geringer Qualitätsverlust entsteht. Die Bitrate der quellencodierten Informationen, welche sich aus sogenannten Nettobits zusammensetzt, wird auch Nettobitrate genannt .Image and video signals almost always contain statistical redundancy, i.e. redundant information. This redundancy can be greatly reduced by source coding, so that an efficient transmission or storage of the source signal is made possible. This reduction in redundancy eliminates redundant signal contents based on the prior knowledge of e.g. statistical parameters of the signal curve are based. After the transmission, these parts are added to the signal again during source decoding, so that there is little or no loss of quality. The bit rate of the source-coded information, which is composed of so-called net bits, is also called the net bit rate.
Auf der anderen Seite ist es üblich, den aus der Quellencodierung hervorgehenden Informationsbits gezielt Redundanz durch Kanalcodierung wieder hinzuzufügen, um die Beeinflussung der Übertragung durch KanalStörungen im Empfänger bzw. im Decoder weitgehend erkennen und eventuell auch korrigieren zu können. Dabei wird in der Regel jeweils einer vorgegebenen Anzahl K von Informationsbits oder Nettobits eine vorgegebenen Anzahl N-K von redundanten Fehlerschutzbits hinzugefügt, wodurch N sogenannte Codebits oder Bruttobits entstehen, wel- ehe schließlich über den gestörten Übertragungskanal übertragen werden. Die Kanalcodierung wird dabei auch oft durch ihre Rate R=K/N beschrieben. Die Bitrate der kanalcodierten Informationen, also der Bruttobits, wird auch Bruttobitrate ge- nannt. Eine einfache Art der KanalCodierung besteht darin, die zu übertragenden Informationsbits einfach zu wiederholen. Neuere, an sich ebenfalls bekannte Kanalcodierungsverfahren basieren dagegen auf einer Faltungscodierung.On the other hand, it is customary to add redundancy by channel coding to the information bits resulting from the source coding in order to largely recognize and possibly also correct the influence of the transmission on channel interference in the receiver or in the decoder. As a rule, a predetermined number NK of redundant error protection bits is added to a predetermined number K of information bits or net bits, resulting in N so-called code bits or gross bits, which before finally being transmitted over the disturbed transmission channel. The channel coding is often described by its rate R = K / N. The bit rate of the channel-coded information, ie the gross bits, is also called the gross bit rate. A simple type of channel coding is to simply repeat the information bits to be transmitted. In contrast, newer channel coding methods, which are also known per se, are based on convolutional coding.
Häufig liegt das Verhältnis der Bruttobitrate zur Nettobitrate bei etwa 2:1, was eine effiziente KanalCodierung und Decodierung ermöglicht. Jüngst finden aber auch Verhältnisse von 10:1 Einsatz, was zwar einen sehr guten Fehlerschutz ermöglicht, aber bei der Verwendung von Faltungscodes der Rate R=l/l0 sehr komplexe Kanaldecodierer erfordert.The ratio of the gross bit rate to the net bit rate is often around 2: 1, which enables efficient channel coding and decoding. However, ratios of 10: 1 have recently also been used, which allows very good error protection, but requires very complex channel decoders when using convolutional codes of the rate R = l / l0.
Bisher wurde dieses Komplexitätsproblem dadurch gelöst, dass sendeseitig etwa mit einem konventionellen Rate R=l/4 Faltungscode codiert wurde. Drei der vier Bruttobits (al, bl, cl, dl) , die jedes Informationsbit generiert, werden dann z.B. zweimal wiederholt, so dass sich insgesamt 1 + 3 + 2*3 = zehn Bruttobits (al, bl, b2, b3 , cl, c2 , c3 , dl, d2, d3) pro Informationsbit ergeben, die dann zu übertragen sind. Dabei gilt bl=b2=b3, cl=c2=c3, und dl=d2=d3. Diese Lösung hat den Vorteil, dass empfangsseitig aus je zehn Softwerten (AI, Bl, B2, B3, Cl, C2, C3, Dl, D2 , D3 , dies sind nun mehrwertige Eingangswerte für den Kanaldecodierer) wieder leicht vier Softwerte (A, B, C, D) gemacht werden können, indem die jeweils wiederholten Softwerte zum ursprünglichen Softwert ad- diert werden: A=A1, B=B1+B2+B3 , C=C1+C2+C3 , D=D1+D2+D3. Die sich so ergebenden vier Softwerte (A,B,C,D) sind dann der In- put eines R=l/4 Kanaldecodierers, der effizient genug zu rea- lisieren ist. Allerdings weisen derartige Wiederholungscodes schlechte Korrektureigenschaften auf.So far, this complexity problem has been solved by coding on the transmission side using a conventional rate R = 1/4 convolutional code. Three of the four gross bits (al, bl, cl, dl) that each information bit generates are then repeated twice, for example, so that a total of 1 + 3 + 2 * 3 = ten gross bits (al, bl, b2, b3, cl, c2, c3, dl, d2, d3) per information bit, which are then to be transmitted. Here bl = b2 = b3, cl = c2 = c3, and dl = d2 = d3. This solution has the advantage that on the receiving side, from each of ten software (AI, B1, B2, B3, Cl, C2, C3, Dl, D2, D3, these are now multi-valued input values for the channel decoder), four software (A, B , C, D) can be made by adding the respectively repeated software values to the original software value: A = A1, B = B1 + B2 + B3, C = C1 + C2 + C3, D = D1 + D2 + D3. The resulting four software values (A, B, C, D) are then the input of an R = 1/4 channel decoder that is efficient enough to react lize is. However, such repeat codes have poor correction properties.
Kürzlich wurde eine adaptive Quellen- und/oder Kanalcodierung samt adaptiver Decodierung, als sogenannte adaptive Multira- tenencodierung (Adaptive Multirate (AMR) Codecs,) vorgeschlagen, welche es ermöglichen soll, Quellensignalen je nach Qualitätsanforderung der Informationsübertragung bzw. je nach Übertragungsbedingungen im Rahmen einer Quellencodierung mehr oder weniger redundante Information zu entziehen und/oder im Rahmen einer Kanalcodierung zum Fehlerschutz mehr oder weniger redundante Information hinzuzufügen. Derartige Multiratencodierverfahren werden dabei auch durch deren zugehörige Codemodi und Kanalmodi beschrieben. Unterschiedliche Codemodi weisen dabei verschiedene Nettobitraten auf, wohingegen unterschiedliche Kanalmodi verschiedene Bruttobitraten aufweisen. Innerhalb eines Kanalmodus kann es dabei verschiedene Codemodi geben.Recently, adaptive source and / or channel coding including adaptive decoding, as so-called adaptive multirate coding (Adaptive Multirate (AMR) Codecs), has been proposed, which should make it possible to source signals depending on the quality requirements of the information transmission or depending on the transmission conditions within the framework of a To remove source coding more or less redundant information and / or to add more or less redundant information as part of a channel coding for error protection. Such multi-rate coding methods are also described by their associated code modes and channel modes. Different code modes have different net bit rates, whereas different channel modes have different gross bit rates. Different code modes can exist within a channel mode.
Beispielsweise kann ein derartiges Multiratencodierverfahren unter guten Kanalbedindungen und/oder in hoch ausgelasteten Funkzellen im Half Rate (HR) -Kanalmodus arbeiten. Es soll unter schlechten Kanalbedingungen und/oder in niedrig ausgelasteten Funkzellen dynamisch in den Füll Rate (FR) -Kanalmodus gewechselt werden und umgekehrt. Die Bruttobitrate nach der KanalCodierung ist dabei beispielsweise innerhalb eines Kanalmodus konstant; sie beträgt beispielsweise im Füll Rate (FR) -Kanalmodus 22,8 Kbit/sek. und im Half Rate (HR) - Kanalmodus 11,4 Kbit/sek. Da die Bruttobitrate bei variabler Nettobitrate innerhalb eines Kanalmodus nach der Kanalcodierung einheitlich sein soll, wird die Kanalcodierung entsprechend angepaßt und den Informationsbits bei der Kanalcodierung eine entsprechend angepaßte variable Anzahl von Fehler- schutzbits hinzugefügt. Auch im Rahmen der Multiratencodie- rung ist es bekannt eine Faltungscodierung durchzuführen.For example, such a multi-rate coding method can work in good half-channel (HR) channel mode under good channel conditions and / or in highly utilized radio cells. Under poor channel conditions and / or in low-capacity radio cells, the system should switch dynamically to the fill rate (FR) channel mode and vice versa. The gross bit rate after the channel coding is constant, for example, within a channel mode; for example in the fill rate (FR) channel mode it is 22.8 kbit / sec. and in Half Rate (HR) channel mode 11.4 Kbit / sec. Since the gross bit rate with a variable net bit rate within a channel mode should be uniform after the channel coding, the channel coding is adapted accordingly and the information bits during the channel coding have a correspondingly adapted variable number of errors. protection bits added. It is also known to carry out convolutional coding in the context of multi-rate coding.
Aufgrund der Komplexität der Faltungscodierung wird üblicher- weise ein einziger oder einige wenige Faltungcodes (Muttercodes) in einem Übertragungssystem verwendet. Zur Realisierung einer Multiraten-Faltungscodierung ist es bekannt, durch Punktierung (Entfernung) von Codebits (punctured convolutio- nal/PC code) und/oder durch Wiederholung (Repetierung) von Codebits (repetition convolutional/RC code) nach der Faltungscodierung die gewünschte Rate der Kanalcodierung und somit die gewünschte Bruttobitrate einzustellen. Alternativ dazu ist der Einsatz sogenannter Insertion Convolutional (IC) Codes vorgeschlagen, die durch Einfügen von bekannten Dummy- Bits an bekannten Positionen in die Informationsbitfolge vor der Faltungscodierung realisiert wird. Beispielsweise können vor einer Faltungscodierung mit R=l/4 zu jedem Informations- bit zwei a priori bekannte Dummy-Bits hinzugefügt werden. Daraus ergeben sich dann (1+2) * 4 = 12 Bruttobits pro origi- nalem Informationsbit. Die hinzugefügten a priori bekannten Bits haben Werte (0 oder 1) und Positionen, die fest sind, oder die dem Encoder und dem Decoder gleichermassen a priori (d.h. ohne Übertragung) bekannt sind. Verwendet man rekursiv- systematische Faltungscodes, so lassen sich die beiden syste- matischen a priori bekannten Bits wegpunktieren (d.h. sie müssen nicht übertragen werden, da sie als Bruttobits a priori bereits bekannt sind) . Damit ergeben sich effektiv 12 - 2 = 10 Bruttobits, d.h. eine R=l/10 Codierung. Die Ratenadaption von Nettobitrate zu gewünschter Bruttobitrate kann dabei mittels Punktierung und/oder Wiederholung von Bits und/oder Einfügen vorbekannter Dummy-Bits zusammen mit bzw. als Teil der Kanalcodierung erfolgen. Der Erfindung liegt nun das Problem zugrunde, ein Verfahren und eine Anordnung zur Codierung bzw. zur Decodierung anzugeben, das es ermöglicht, Informationsfolgen mit variabler Nettobitrate mit guter Qualität und geringem Aufwand zu übertragen.Due to the complexity of the convolutional coding, a single or a few convolutional codes (parent codes) are usually used in a transmission system. To implement a multi-rate convolutional coding, it is known to puncture (remove) code bits (punctured convolutional / PC code) and / or by repeating (repetition) code bits (repetition convolutional / RC code) after the convolutional coding the desired rate Channel coding and thus to set the desired gross bit rate. As an alternative to this, the use of insertion convolutional (IC) codes is proposed, which is implemented by inserting known dummy bits at known positions in the information bit sequence before the convolutional coding. For example, prior to convolutional coding with R = 1/4, two dummy bits known a priori can be added to each information bit. This then results in (1 + 2) * 4 = 12 gross bits per original information bit. The added bits known a priori have values (0 or 1) and positions that are fixed or that are known a priori (ie without transmission) to the encoder and the decoder. If recursive-systematic convolutional codes are used, the two systematic bits known a priori can be punctured away (ie they do not have to be transmitted since they are already known as gross bits a priori). This effectively results in 12 - 2 = 10 gross bits, ie an R = 1/10 coding. The rate adaptation from the net bit rate to the desired gross bit rate can be carried out by puncturing and / or repeating bits and / or inserting previously known dummy bits together with or as part of the channel coding. The invention is based on the problem of specifying a method and an arrangement for coding or for decoding which makes it possible to transmit information sequences with a variable net bit rate with good quality and little effort.
Dieses Problem wird durch die Merkmale der unabhängigen Patentansprüche gelöst. Weiterbildungen der Erfindung ergeben sich aus den abhängigen Ansprüchen.This problem is solved by the features of the independent claims. Further developments of the invention result from the dependent claims.
Erfindungsgemäß wird demnach zumindest einer gezielt ausgewählten Informationsbitfolge mit geringer Nettobitrate, welche aus einer Quellencodierung mit variabler Nettobitrate hervorgeht, als Fehlerschutzbits zumindest vorbekannte Dummy- Bits an vorbekannte Bitpositionen der Informationsbitfolge hinzugefügt, um eine oder mehrere einheitliche Bruttobitraten zu generieren. Unter "variabler Nettobitrate" versteht man dabei auch zumindest zwei verschiedene einstellbare Nettobit- raten.According to the invention, at least one deliberately selected information bit sequence with a low net bit rate, which results from a source coding with a variable net bit rate, is added as error protection bits to at least known dummy bits at previously known bit positions of the information bit sequence in order to generate one or more uniform gross bit rates. "Variable net bit rate" also means at least two different adjustable net bit rates.
Je nach Ausführungsvariante umfassen dabei die Informations- bitfolgen mit geringer Nettobitrate auch eine das Hintergrundgeräusch eines DTX (Discontinous Transmission) -Modus repräsentierende Bitfolge (Fall 1) oder nicht (Fall 2) . Der Einsatz eines DTX (Discontinous Transmission) -Modus in der Sprachverarbeitung zur Reduzierung von Interferenzen und des Stromverbrauchs ist als solches bekannt. Sollen beispielsweise den beiden Informationsbitfolgen mit den beiden niedrigsten Nettobitraten Dummy-Bits hinzugefügt werden, so bedeutet dies in Fall 1, dass der das Hintergrundgeräusch eines DTXDepending on the design variant, the information bit sequences with a low net bit rate also include a bit sequence (case 1) or not (case 2) representing the background noise of a DTX (discontinous transmission) mode. The use of a DTX (discontinous transmission) mode in speech processing to reduce interference and power consumption is known as such. For example, if dummy bits are to be added to the two information bit sequences with the two lowest net bit rates, this means in case 1 that this is the background noise of a DTX
(Discontinous Transmission) -Modus repräsentierenden Bitfolge und einer weiteren Informationsbitfolge mit der ansonsten niedrigsten Nettobitrate Dummy-Bits hinzugefügt werden. Im Fall 2 bedeutet dies, dass - unabhängig davon, ob in der aktuellen Sprachverarbeitung ein DTX-Modus Einsatz findet oder nicht - den beiden Informationsbitfolgen mit den beiden niedrigsten Nettobitrate Dummy-Bits hinzugefügt werden, welche nicht das Hintergrundgeräusch eines DTX (Discontinous Transmission) -Modus repräsentieren.(Discontinous Transmission) mode representing bit sequence and a further information bit sequence with the otherwise lowest net bit rate dummy bits are added. in the Case 2 means that - regardless of whether a DTX mode is used in current speech processing or not - dummy bits are added to the two information bit sequences with the two lowest net bit rate, which do not include the background noise of a DTX (discontinous transmission) mode represent.
Die Erfindung, insbesondere der gezielte und selektive Einsatz der Einfügung vorbekannter Dummy-Bits zur Ratenadaption in einer Multiratencodierung beruht auf Simulationsergebnissen, welche durch aufwendige, eigens für diesen Zweck erstellte Simulationswerkzeuge ermittelt wurden. Bei diesen Simulationen wurde festgestellt, dass die Einfügung von Dummy- Bits zum Zwecke einer Ratenadaption im Rahmen einer Multira- tencodierung besonders vorteilhaft ist, wenn zumindest derThe invention, in particular the targeted and selective use of the insertion of previously known dummy bits for rate adaptation in multi-rate coding, is based on simulation results which were determined by means of complex simulation tools which were created especially for this purpose. In these simulations, it was found that the insertion of dummy bits for the purpose of rate adaptation in the context of multi-rate coding is particularly advantageous if at least the
Informationsbitfolge mit der niedrigsten von Null verschiedenen Nettobitrate, insbesondere nur der Informationsbitfolge mit der niedrigsten von Null verschiedenen Nettobitrate, als Fehlerschutzbits zumindest vorbekannte Dummy-Bits an vorbe- kannte Bitpositionen der Informationsbitfolge hinzugefügt werden. Den Informationsbitfolgen mit höheren Nettobitraten werden dabei keine Dummy-Bits zur Ratenadaption hinzugefügt; die Ratenadaption bei diesen Informationsbitfolgen kann dabei auf andere Weise erfolgen. Je nach Nettobitrate der Informa- tionsbitfolge wird demnach zwischen verschiedenen Ratenadaptionsverfahren umgeschaltet.Information bit sequences with the lowest non-zero net bit rate, in particular only the information bit sequence with the lowest non-zero net bit rate, at least known dummy bits are added to known bit positions of the information bit sequence as error protection bits. No dummy bits for rate adaptation are added to the information bit sequences with higher net bit rates; The rate adaptation for these information bit sequences can take place in another way. Depending on the net bit rate of the information bit sequence, a switch is made between different rate adaptation methods.
Weiterbildungen der Erfindung sehen vor, insbesondere nur den Informationsbitfolgen mit den beiden bzw. drei niedrigsten von Null verschiedenen Nettobitraten als Fehlerschutzbits zumindest vorbekannte Dummy-Bits an vorbekannte Bitpositionen der Informationsbitfolge hinzuzufügen. Auch dies stellte sich bei den obengenannten Simulationen hinsichtlich Übertragungs- qualität und Aufwand als besonders vorteilhaft heraus.Further developments of the invention provide, in particular, only to add at least known dummy bits at previously known bit positions of the information bit sequence to the information bit sequences with the two or three lowest non-zero net bit rates as error protection bits. This also turned out in the above-mentioned simulations in terms of transmission quality and effort as particularly advantageous.
Eine andere Weiterbildung sieht vor, dass insbesondere die Informationsbitfolgen, denen Dummy-Bits zum Fehlerschutz hinzugefügt wurden, faltungscodiert werden, wobei zur Faltungscodierung ein systematischer oder rekursiv-systematischer Code verwendet wird, und nach der Faltungscodierung die für die Dummy-Bits systematischen Bits zumindest teilweise entfernt werden. Dies hat den Vorteil, dass die Dummy-Bits zwar zur Erreichung eines besseren Fehlerschutzes bei der Faltungscodierung mitverarbeitet werden, aber die daraus resultierenden systematischen Bits, welche sich in der faltungscodierten Bitfolge wiederfinden, nicht übertragen werden müssen, da de- ren Wert und Position empfangsseitig vorbekannt ist und daher diese vorbekannten systematischen Bits vor der Faltungsdeco- dierung an die vorbekannten Positionen in die empfangene Bit- folge eingefügt werden können.Another development provides that, in particular, the information bit sequences to which dummy bits have been added for error protection are convolutionally coded, a systematic or recursive-systematic code being used for the convolutional coding, and after the convolutional coding, the bits systematic for the dummy bits are at least partially be removed. This has the advantage that the dummy bits are processed in order to achieve better error protection in the convolutional coding, but the resulting systematic bits, which can be found in the convolutionally coded bit sequence, do not have to be transmitted because their value and position are received is previously known and therefore these previously known systematic bits can be inserted into the received bit sequence at the previously known positions before the convolutional decoding.
Eine - wie sich bei den obengenannten Simulationen zeigte - besonders vorteilhafte Ausführungsvariante der Erfindung oder einer ihrer Weiterbildungen, sieht vor, nur dann Dummy-Bits zur Ratenadaption hinzuzufügen, wenn die zu realisierende Bruttobitrate besonders groß ist, insbesondere dann, wenn die zu realisierende Bruttobitrate die größte der innerhalb der Multiratencodierung vorkommenden Bruttobitraten ist. Beispielsweise werden also nur dann der bzw. den beiden Informationsbitfolgen mit der niedrigsten bzw. den beiden niedrigsten Nettobitraten Dummy-Bits hinzugefügt, wenn deren Netto- bitrate in die größte bzw. zweitgrößte innerhalb der Multiratencodierung vorkommende Bruttobitrate umgesetzt werden soll. In weiteren Ausgestaltungen wird die Ratenadaption bestimmterA particularly advantageous embodiment variant of the invention or one of its further developments, as was shown in the above-mentioned simulations, provides for dummy bits to be added to the rate adaptation only if the gross bit rate to be implemented is particularly large, in particular if the gross bit rate to be implemented is largest of the gross bit rates occurring within the multi-rate coding. For example, dummy bits are only added to the two information bit sequences with the lowest or the two lowest net bit rates if their net bit rate is to be converted into the largest or second largest gross bit rate occurring within the multi-rate coding. The rate adaptation is determined in further refinements
Informationsbitfolgen mit bestimmten ausgewählten Nettobitraten nicht nur wie oben beschrieben durch das Hinzufügen von Dummy-Bits realisiert, sondern darüber hinaus vor oder nach der Hinzufügung von Dummy-Bits Bits punktiert oder repetiert.Information bit sequences with certain selected net bit rates are not only realized by adding dummy bits as described above, but are also punctured or repeated before or after the addition of dummy bits.
Zur Decodierung einer nach einem der obengenannten Verfahren codierten Informationsbitfolge werden Informationen über das Hinzufügen von Dummy-Bits als a priori Informationen genützt.Information about the addition of dummy bits is used as a priori information for decoding an information bit sequence coded according to one of the abovementioned methods.
Zur Lösung der Aufgabe ist ferner eine Anordnung zur Codierung und eine Anordnung zur Decodierung angegeben, welche insbesondere zur Durchführung der erfindungsgemäßen Verfahren oder einer ihrer Weiterbildungen eingerichtet sind.To achieve the object, an arrangement for coding and an arrangement for decoding are also specified, which are set up in particular to carry out the method according to the invention or one of its developments.
Die Erfindung wird im Folgenden anhand bevorzugter Ausführungsbeispiele näher beschrieben, zu deren Erläuterung nachstehend aufgelistete Figuren dienen:The invention is described in more detail below on the basis of preferred exemplary embodiments, the figures listed below serving to explain them:
Figur 1 vereinfachtes Ablaufdiagramm eines Verfahrens zur Multiratencodierung; Figur 2 Prinzipschaltbild einer Prozessoreinrichtung.Figure 1 simplified flow diagram of a method for multi-rate coding; Figure 2 block diagram of a processor device.
Figur 1 zeigt eine Multiratencodierung anhand eines verein- fachten Schemas einer Nachrichtenübertragungskette. In einem Sender werden Quellensignale zunächst im Rahmen einer Quellencodierung QC in Informationbitfolgen variabler Nettobitrate nbr komprimiert. Die durch die variable Quellencodierung erzeugten verschiedenen Nettobitraten von 6.8kbps bis 24.0 kbps kennzeichnen dabei verschiedene Codemodi cml - cm8. Je nach gewünschter Bruttobitrate bbr von 17.0 kbps bis 68.0 kbps werden die Informationbitfolgen mit variabler Nettobitrate durch verschiedene Kanalcodierverfahren KC0 -KC19 einer Kanalcodierung KC unterzogen, deren Bestandteil die erfindungsgemäße Ratenadaption sein kann. Durch die Kanalcodierung KC werden die variablen Nettobitraten in eine oder mehrere einheitliche Bruttobitraten umgesetzt, welche wiederum ver- schiedene Kanalmodi kml - km3 kennzeichnen.FIG. 1 shows multi-rate coding on the basis of a simplified scheme of a message transmission chain. In a transmitter, source signals are first compressed in the context of a source coding QC into information bit sequences of variable net bit rate nbr. The different net bit rates from 6.8kbps to 24.0 kbps generated by the variable source coding characterize different code modes cml - cm8. Depending on the desired gross bit rate bbr from 17.0 kbps to 68.0 kbps, the information bit sequences with a variable net bit rate become one by means of various channel coding methods KC0 -KC19 Channel coding KC subjected, the component of which may be the rate adaptation according to the invention. The channel coding KC converts the variable net bit rates into one or more uniform gross bit rates, which in turn characterize different channel modes km1 - km3.
Diese derart kanalcodierten Bitfolgen oder Codebits werden in einem nicht dargestellten Modulator weiterverarbeitet und anschließend über eine Übertragungsstrecke CH übertragen. Bei der Übertragung treten Störungen, wie beispielsweise Fading, oder Rauschen auf.These bit sequences or code bits, which are coded in this way, are further processed in a modulator (not shown) and then transmitted via a transmission link CH. Interference such as fading or noise occurs during transmission.
Die Übertragungsstrecke CH liegt zwischen dem Sender und einem Empfänger. Der Empfänger E enthält gegebenenfalls eine nicht dargestellte Antenne zum Empfang der über die Übertragungsstrecke CH übertragenen Signale, eine Abtasteinrichtung, einen Demodulator zum Demodulieren der Signale und einen Entzerrer zum Eliminieren der Intersymbolstörungen. Diese Einrichtungen wurden ebenfalls aus Vereinfachungsgründen in Fi- gur 1 nicht dargestellt. Auch ein mögliches Interleaving und Deinterleaving ist nicht dargestellt. Ein Entzerrer gibt Empfangswerte einer Empfangsfolge aus. Die Empfangswerte haben aufgrund der Störungen bei der Übertragung über die Übertragungsstrecke CH Werte', die von "+1" und " -l" abweichen. In einem Kanaldecodierer wird schließlich die KanalCodierung rückgängig gemacht. Vorteilhaft wird zur Decodierung von Faltungscodes der Viterbi-Algorithmus verwendet.The transmission path CH lies between the transmitter and a receiver. The receiver E optionally contains an antenna, not shown, for receiving the signals transmitted via the transmission link CH, a sampling device, a demodulator for demodulating the signals and an equalizer for eliminating the intersymbol interference. For simplification reasons, these facilities were not shown in FIG. 1 either. Possible interleaving and deinterleaving is also not shown. An equalizer outputs reception values of a reception sequence. The received values have values' which deviate from "+1" and "-l" due to the disturbances in the transmission over the transmission link CH. Finally, in a channel decoder, the channel coding is undone. The Viterbi algorithm is advantageously used for decoding convolutional codes.
Im folgenden wird anhand des ersten Kanalmodus kml mit einer Bruttobitrate von 68 kbps, innerhalb dessen acht (dargestellt) oder neun (nicht dargestellt) Codemodi cml,cm2 - cm8 mit variabler Nettobitrate von 6.8 kbps, 8.0 kbps, 10.0 kbps - 24.0 kbps realisiert sind, die Codierung detaillierter be- schrieben. Die Bruttobitrate von 68 kbps sei dabei die größte innerhalb der Multiratencodierung vorkommende Bruttobitrate.The following is based on the first channel mode kml with a gross bit rate of 68 kbps, within which eight (shown) or nine (not shown) code modes cml, cm2 - cm8 with variable net bit rate of 6.8 kbps, 8.0 kbps, 10.0 kbps - 24.0 kbps are implemented , the coding in more detail wrote. The gross bitrate of 68 kbps is the largest gross bitrate that occurs within multi-rate coding.
Je nach Ausführungsvariante wird der Codemodus bzw. die ent- sprechende Informationsbitfolge mit der niedrigsten Nettobitrate oder die beiden Codemodi mit den beiden niedrigsten Nettobitraten mittels Einfügung a priori bekannter Dummy-Bits an vorbekannten Stellen innerhalb der Informationsbitfolge und der Verwendung einer R=l/4 rekursiv-systematischen Faltungs- Codierung und anschließender Punktierung auf die Bruttobitrate von 68 kbps gebracht. Im Gegensatz dazu werden die übrigen Codemodi bzw. die entsprechenden Informationsbitfolgen mittels Bruttobitwiederholung und empfangsseitiger Addition oder einfach nur mittels Faltungscodierung und Punktierung auf 68 kbps Bruttobitrate gebracht; eine Einfügung a priori bekannter Dummy-Bits ist dabei nicht vorgesehen. Diese sendeseitige Codierung mit einer effektiven Gesamtrate 1/10 des Codemodus mit der niedrigsten Nettobitrate von 6.8 kbps wird anhand des folgenden Schemas verdeutlicht, wobei folgende Abkürzungen verwendet werden: apbB: a priori bekanntes Bit; FC: Faltungscodierung; a,b: Informationsbits; 0 : apbB; ?: redundantes Bit durch Faltungscodierung.Depending on the design variant, the code mode or the corresponding information bit sequence with the lowest net bit rate or the two code modes with the two lowest net bit rates becomes recursive by inserting dummy bits known a priori at previously known locations within the information bit sequence and using an R = 1/4 systematic convolutional coding and subsequent puncturing brought to the gross bit rate of 68 kbps. In contrast to this, the remaining code modes or the corresponding information bit sequences are brought to 68 kbps gross bit rate by means of gross bit repetition and reception-side addition or simply by means of convolutional coding and puncturing; there is no provision for dummy bits known a priori. This transmission-side coding with an effective total rate 1/10 of the code mode with the lowest net bit rate of 6.8 kbps is illustrated using the following scheme, the following abbreviations being used: apbB: bit known a priori; FC: convolutional coding; a, b: information bits; 0: apbB; ?: redundant bit due to convolutional coding.
Vor FC : a | b | ...Before FC: a | b | ...
Nach apbB-Insertion: a 0 0 | b 0 0 | ...After apbB insertion: a 0 0 | b 0 0 | ...
Nach syst. FC: a??? 0??? 0??? | b??? 0??? 0??? | ... Entfernung der apbB's: a??? ??? ??? | b??? ??? ??? | .. Die systematischen bekannten Bits müssen dabei nicht übertragen werden; sie werden empfangsseitig als sichere Softwerte wieder hinzugefügt .After syst. FC: a ??? 0 ??? 0 ??? | b ??? 0 ??? 0 ??? | ... removal of apbB's: a ??? ??? ??? | b ??? ??? ??? | .. The systematic known bits do not have to be transmitted; they are added again as secure software at the receiving end.
Im folgenden das Schema für die empfangsseitige Decodierung, wobei folgende Abkürzungen verwendet werden: apbB: a priori bekanntes Bit; A, B: Informationsbits; 0: Softwert zu apbB; ?: unbekannter Softwert; 0: decodiertes apbB; FD: Faltungsdecodierung.In the following the scheme for the decoding at the receiving end, using the following abbreviations: apbB: bit known a priori; A, B: information bits; 0: Software for apbB; ?: unknown software; 0: decoded apbB; FD: convolutional decoding.
Nach Deinterleaving: ???? ??? ??? | ???? ??? ??? | ... Hinzufügen der apbBvs ???? 0??? 0??? | ???? 0??? 0??? | ...After deinterleaving: ???? ??? ??? | ???? ??? ??? | ... adding the apbB v s ???? 0 ??? 0 ??? | ???? 0 ??? 0 ??? | ...
Nach FD: A O O | B 0 0 | • • •According to FD: A O O | B 0 0 | • • •
Entfernung apbB's: A | B | ...Distance apbB's: A | B | ...
Dadurch ist es möglich als Faltungsdecodierer einen konventi- onellen Decodierer der Rate R=l/4 zu verwenden. Verglichen mit einem Decodierer für Wiederholungscodes wird der Faltungsdecodierer aufgrund der Hinzufügung der a priori bekannten Bits (Dummy-Bits) mit der dreifachen Nettobitrate betrieben, was eine Erhöhung der Komplexität bedeutet. Daher ist vorgesehen, dass das Einfügen von Dummy-Bits ausschließlich bei niedrigratigen Codemodi erfolgt. Beispielsweise entspricht im beschriebenen Beispiel die dreifache Nettobitrate des niedrigratigsten Codemus mit 3 * 6,8 kbps immer noch in etwa der Nettobitrate und damit der Decodierkomplexität des höchstratigen Codemodus von 24 kbps.This makes it possible to use a conventional decoder with the rate R = 1/4 as the convolution decoder. Compared to a decoder for repetition codes, the convolutional decoder is operated at three times the net bit rate due to the addition of the a priori known bits (dummy bits), which means an increase in complexity. It is therefore provided that dummy bits are inserted only in low-rate code modes. For example, in the example described, the three times the net bit rate of the lowest rate code with 3 * 6.8 kbps still corresponds approximately to the net bit rate and thus the decoding complexity of the highest rate code mode of 24 kbps.
Simulationen zeigten, dass die Stärke dieses Verfahrens insbesondere bei sehr niedrigen Nettobitraten zum Tragen kommt . Dies ermöglicht den Einsatz zum Beispiel im EDGE/GERAN-Simulations showed that the strength of this method is particularly evident at very low net bit rates. This enables use, for example, in the EDGE / GERAN
Vollratenkanal in Verbindung mit dem AMR-WB-Sprachcodec (A- daptive Multirate Wideband) oder im EDGE/GERAN-Halbratenkanal in Verbindung mit dem AMR-Sprachcodec (Narrowband) . Der AMR- WB-Sprachcodec hat zum Beispiel Nettobitraten zwischen etwa 6 kbps und etwa 24 kbps, während im EDGE/GER N-Vollratenkanal die Bruttobitrate etwa 68 kbps beträgt.Full rate channel in connection with the AMR-WB speech codec (Adaptive Multirate Wideband) or in the EDGE / GERAN half rate channel in connection with the AMR speech codec (narrowband). For example, the AMR-WB speech codec has net bit rates between about 6 kbps and about 24 kbps, while the gross bit rate in the EDGE / GER N full rate channel is about 68 kbps.
Figur 2 zeigt eine programmgesteuerte Prozessoreinrichtung PE, wie beispielsweise einen MikroController, der auch einen Prozessor CPU und eine Speichereinrichtung SPE umfassen kann. Prozessoreinrichtung PE, die insbesondere in einer Kommunikationseinrichtung, wie einer Basisstation oder einer Mobilstation enthalten sein kann ist zur Durchführung der oben erläu- terten Verfahren eingerichtet.FIG. 2 shows a program-controlled processor device PE, such as a microcontroller, which can also include a processor CPU and a memory device SPE. Processor device PE, which can be contained in particular in a communication device, such as a base station or a mobile station, is set up to carry out the methods explained above.
Je nach Ausführungsvariante können dabei innerhalb oder außerhalb der Prozessoreinrichtung PE weitere - der Prozessoreinrichtung zugeordnete, zur Prozessoreinrichtung gehörende, durch die Prozessoreinrichtung gesteuerte oder die Prozessoreinrichtung steuernde - Komponenten, wie beispielsweise ein digitaler Signalprozessor oder weitere Speichereinrichtungen angeordnet sein, deren prinzipielle Funktion im Zusammenhang mit einer Prozessoreinrichtung zur Steuerung einer Mobilsta- tion einem Fachmann hinreichend bekannt ist, und auf welche daher an dieser Stelle nicht näher eingegangen wird. Die unterschiedlichen Komponenten können über ein Bussystem BUS o- der Ein-/Ausgabeschnittstellen und gegebenenfalls geeignete Controller mit dem Prozessor CPU Daten austauschen.Depending on the design variant, further components, such as a digital signal processor or further memory devices, the basic function of which is associated with a processor, can be arranged inside or outside the processor device PE, such as a digital signal processor or other memory devices, which are assigned to the processor device, belong to the processor device, are controlled by the processor device or control the processor device Processor device for controlling a mobile station is sufficiently known to a person skilled in the art, and which is therefore not dealt with in more detail at this point. The different components can exchange data with the processor CPU via a bus system BUS or the input / output interfaces and, if appropriate, suitable controllers.
Je nach Ausführungsvariante kann die Speichereinrichtung SPE, bei der es sich auch um einen oder mehrere flüchtige und/oder nicht flüchtige Speicherbausteine handeln kann, oder Teile der Speichereinrichtung SPE als Teil der ProzessoreinrichtungDepending on the embodiment variant, the memory device SPE, which can also be one or more volatile and / or non-volatile memory modules, or parts the storage device SPE as part of the processor device
PE (in Figur dargestellt) realisiert sein oder als externe Speichereinrichtung (in Figur nicht dargestellt) realisiert sein, die außerhalb der Prozessoreinrichtung PE lokalisiert ist und mittels geeigneter Schnittstellen oder eines geeigneten Bussystems mit der Prozessoreinrichtung PE verbunden ist.PE (shown in the figure) can be implemented or can be implemented as an external memory device (not shown in the figure) which is located outside the processor device PE and is connected to the processor device PE by means of suitable interfaces or a suitable bus system.
In der Speichereinrichtung SPE sind die Programmdaten, wie beispielsweise die Steuerbefehle oder Steuerprozeduren, die zur Steuerung des Ablaufs der oben beschriebenen Verfahren herangezogen werden, gespeichert.The program data, such as, for example, the control commands or control procedures that are used to control the execution of the above-described methods, are stored in the storage device SPE.
Neben den oben erläuterten Äusführungsvarianten der Erfindung liegt eine Vielzahl weiterer AusführungsVarianten im Rahmen der Erfindung, welche hier nicht weiter beschrieben werden, aber anhand der erläuterten Ausführungsbeispiele einfach in die Praxis umgesetzt werden können. In addition to the embodiment variants of the invention explained above, there are a large number of further embodiment variants within the scope of the invention, which are not further described here, but can simply be put into practice on the basis of the exemplary embodiments explained.

Claims

Patentansprüche claims
1. Verfahren zur Codierung einer Informationsbitfolge,1. method for coding an information bit sequence,
- bei dem die Informationsbitfolge aus einer Quellencodie- rung (QC) mit variabler Nettobitrate (nbr) hervorgeht,- in which the information bit sequence is derived from a source coding (QC) with a variable net bit rate (nbr),
- bei dem Informationsbitfolgen mit variabler Nettobitrate (nbr) Fehlerschutzbits derart hinzugefügt werden, dass sie nach der Codierung (KC) eine oder mehrere einheitliche Brut- tobitraten (bbr) aufweisen, und - bei dem zumindest der Informationsbitfolge mit der niedrigsten Nettobitrate als Fehlerschutzbits zumindest vorbekannte Dummy-Bits an vorbekannte Bitpositionen der Informationsbitfolge hinzugefügt werden.- in which information bit sequences with variable net bit rate (nbr) error protection bits are added in such a way that they have one or more uniform gross bit rates (bbr) after coding (KC), and - in which at least the information bit sequence with the lowest net bit rate is at least known as error protection bits Dummy bits are added at previously known bit positions in the information bit sequence.
2. Verfahren nach Anspruch 1,2. The method according to claim 1,
-bei dem zumindest den Informationsbitfolgen mit den beiden niedrigsten Nettobitraten als Fehlerschutzbits zumindest vorbekannte Dummy-Bits an vorbestimmten Bitpositionen der Informationsbitfolge hinzugefügt werden.in which at least the information bit sequences with the two lowest net bit rates as error protection bits are added at least previously known dummy bits at predetermined bit positions of the information bit sequence.
3. Verfahren nach Anspruch 1 ,3. The method according to claim 1,
-bei dem den Informationsbitfolgen mit den drei niedrigsten Nettobitraten als Fehlerschutzbits zumindest vorbekannte Dummy-Bits an vorbestimmten Bitpositionen der Informationsbit- folge hinzugefügt werden.in which at least previously known dummy bits are added to the information bit sequences with the three lowest net bit rates as error protection bits at predetermined bit positions of the information bit sequence.
4. Verfahren nach einem der vorhergehenden Ansprüche,4. The method according to any one of the preceding claims,
-bei dem zur Hinzufügung von Fehlerschutzbits zumindest die Informationsbitfolge mit der niedrigsten Nettobitrate samt den als Fehlerschutzbits hinzugefügten vorbekannten Dummy-in which at least the information bit sequence with the lowest net bit rate, together with the previously known dummy added as error protection bits, is used to add error protection bits.
Bits faltungscodiert wird. Bits are convolutionally coded.
5. Verfahren nach Anspruch 4,5. The method according to claim 4,
-bei dem zur Faltungscodierung ein systematischer oder rekursiv-systematischer Code verwendet wird und nach der Faltungscodierung die für die Dummy-Bits systematischen Bits zu- mindest teilweise entfernt werden.in which a systematic or recursive-systematic code is used for the convolutional coding and after the convolutional coding the bits which are systematic for the dummy bits are at least partially removed.
6. Verfahren zur Decodierung einer nach einem der vorhergehenden Ansprüche codierten Informationsbitfolge,6. A method for decoding an information bit sequence coded according to one of the preceding claims,
-bei dem Informationen über das Hinzufügen von Dummy-Bits als a priori Informationen genützt werden.-in which information about the addition of dummy bits is used as a priori information.
7. Verfahren zur Decodierung einer nach Anspruch 5 codierten Informationsbitfolge,7. A method for decoding an information bit sequence coded according to claim 5,
-bei dem Informationen über das Entfernen von systematischen Bits als a priori Informationen genützt werden, wobei die bei der Codierung entfernten systematischen Bits vor der Fal- tungsdecodierung an den entsprechenden Bitpositionen wieder hinzugefügt werden .in which information about the removal of systematic bits is used as a priori information, the systematic bits removed during coding being added again at the corresponding bit positions before the fold decoding.
8. Anordnung zur Codierung einer Informationsbitfolge variabler Nettobitrate mit einer Prozessoreinrichtung (PE) , die derart eingerichtet ist, dass Informationsbitfolgen mit variabler Nettobitrate Fehlerschutzbits derart hinzugefügt werden, dass sie nach der Codierung eine oder mehrere einheitliche Bruttobitraten aufweisen, und dass zumindest der Informationsbitfolge mit der niedrigsten Nettobitrate als Fehlerschutzbits zumindest vorbekannte Dummy-Bits an vorbestimmten Bitpositionen der Informationsbitfolge hinzugefügt werden.8. Arrangement for coding an information bit sequence of variable net bit rate with a processor device (PE), which is set up in such a way that information bit sequences with variable net bit rate error protection bits are added in such a way that they have one or more uniform gross bit rates after coding, and that at least the information bit sequence with the lowest net bit rate as error protection bits, at least previously known dummy bits are added at predetermined bit positions of the information bit sequence.
9. Anordnung nach Anspruch 8 ,9. Arrangement according to claim 8,
-bei der zumindest den Informationsbitfolgen mit den beiden niedrigsten Nettobitraten als Fehlerschutzbits zumindest vor- bekannte Dummy-Bits an vorbestimmten Bitpositionen der Informationsbitfolge hinzugefügt werden.at least before the information bit sequences with the two lowest net bit rates as error protection bits known dummy bits are added at predetermined bit positions of the information bit sequence.
10. Anordnung nach Anspruch 8, -bei der den Informationsbitfolgen mit den drei niedrigsten Nettobitraten als Fehlerschutzbits zumindest vorbekannte Dummy-Bits an vorbestimmten Bitpositionen der Informationsbi - folge hinzugefügt werden.10. The arrangement as claimed in claim 8, in which at least previously known dummy bits at predetermined bit positions of the information sequence are added to the information bit sequences with the three lowest net bit rates as error protection bits.
11. Anordnung nach einem der Ansprüche 8 bis 10,11. Arrangement according to one of claims 8 to 10,
-bei der zur Hinzufügung von Fehlerschutzbits zumindest die Informationsbitfolge mit der niedrigsten Nettobitrate samt den als Fehlerschutzbits hinzugefügten vorbekannten Dummy- Bits faltungscodiert wird.in which at least the information bit sequence with the lowest net bit rate together with the previously known dummy bits added as error protection bits is convolutionally coded to add error protection bits.
12. Anordnung nach Anspruch 11,12. Arrangement according to claim 11,
-bei der zur Faltungscodierung ein systematischer oder rekursiv-systematischer Code verwendet wird und nach der Faltungscodierung die für die Dummy-Bits systematischen Bits zu- mindest teilweise entfernt werden.in which a systematic or recursive-systematic code is used for the convolutional coding and after the convolutional coding the bits which are systematic for the dummy bits are at least partially removed.
13. Anordnung zur Decodierung einer nach einem der Ansprüche 1 bis 5 codierten Informationsbitfolge,13. Arrangement for decoding an information bit sequence coded according to one of claims 1 to 5,
-mit einer Prozessoreinrichtung (PE) , die derart eingerich- tet ist, dass Informationen über das Hinzufügen von Dummy- Bits als a priori Informationen genützt werden.With a processor device (PE), which is set up in such a way that information about the addition of dummy bits is used as a priori information.
14. Anordnung zur Decodierung einer nach Anspruch 5 codierten Informationsbitfolge, -mit einer Prozessoreinrichtung (PE) , die derart eingerichtet ist, dass Informationen über das Entfernen von systematischen Bits als a priori Informationen genützt werden, wobei die bei der Codierung entfernten systematischen Bits vor der14. Arrangement for decoding an information bit sequence coded according to claim 5, with a processor device (PE) which is set up in such a way that information about the removal of systematic bits is used as a priori information, wherein the systematic bits removed during coding before
Faltungsdecodierung an den entsprechenden Bitpositionen wieder hinzugefügt werden . Convolutional decoding can be added again at the corresponding bit positions.
EP01991699A 2001-01-09 2001-12-27 Method and system for coding or decoding Withdrawn EP1350327A1 (en)

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