EP1325384A2

EP1325384A2 - High-density wire bond microdisplay

Info

Publication number: EP1325384A2
Application number: EP01975597A
Authority: EP
Inventors: Kevin Kristopher Day; Nicoll Ryan Edwards
Original assignee: Three Five Systems Inc
Current assignee: Three Five Systems Inc
Priority date: 2000-10-03
Filing date: 2001-10-01
Publication date: 2003-07-09
Also published as: WO2002029480A3; WO2002029480A2; AU2001294908A1

Abstract

A microdisplay system havng an improved packaging that is particularly useful in a high-density wire bonding system is herein provided. A frame structure helps support a flexible printed circuit having an extended portion. The extended permits standard-sized via placement using conventional drilling processes. The extended portion may be folded and creased out of the way and adhered to the underside of the display system. An increased number of traces is provided in a given area while maintaining the space and trace width requirements for cost effective manufacturing.

Description

HIGH-DENSITY WIRE BOND MICRODISPLAY

Cross Reference to Related Applications

This application claims priority from U.S. Provisional Application No. 60/158,985 filed on October 12, 1999. Field of Invention

The present invention relates generally to display systems, in particular to packaging microdisplay systems. Background of the Invention One area of interest in the display industry is in the field of microdisplay s.

These small displays provide high resolution images (e.g., 1024 X 768 and beyond) on a screen generally less than 25 mm square. Microdisplays provide a high content of information in a wide variety of electronic devices such as projection-type devices and near-to-the-eye applications. For example, images may be projected from the small display onto a projection TV and front and back projectors. High tech equipment such as medical devices, digital cameras, virtual reality goggles, cellular phones, and many other devices, which require a small display with high resolution, are suitable implementations for microdisplays.

Industry and consumer demands continue to drive the sizes of microdisplay systems smaller and the resolution higher. These demands often result in a smaller effective area with which to wire bond (electrically connect) the microdisplay to the circuit driving the display, along with an increased number (density) of wire bonds. For example, in the past few years a typical display was about 1 inch wide and 1 inch long with about 30 to 50 wire bond connections. Today, microdisplays are being manufactured that are half this size (i.e., ^lΛ inch by ^X inch) and have twice as many bond pad connections (e.g., 60 to 100). The size of the display system is directly proportional to the cost of the end products. In particular, the more displays that can suitably fit on a semiconductor wafer, the lower the cost of manufacture. Thus, due to these and other industry demands, the problems associated with packaging of microdisplays have become a significant issue. Figure 1 illustrates a typical connection site of a microdisplay system of the prior art. A silicon die 102 having a number of bond pads 100 is placed in close proximity to a printed circuit (e.g., a flexible printed circuit) 106 having an equal number of bond pads 104. Standard silicon processing permits etching of very small fine features on the silicon. As demonstrated in Figure 1, pads 100 on the silicon are about 0.1 mm x 0.1 mm and are placed very close together (e.g., 0.01 mm apart). In contrast, due to design, post, and manufacturing constraints, pads 104 on the printed circuit are much larger in size and spaced farther apart than their counterpart pads 100. Wires 108 connect pads 100 in a 1-to-l ratio with pads 104 using standard wire bond technology. As demonstrated by the exemplary spacing in Figure 1, the placement of pads 100 to pads 104 can create a strain on wires 108 as the distance between the corresponding pads increases. Increasing the strain on relatively thin wires (e.g., ~ 25 μ) increases the risk of wire breakage. In addition, due to undesirable electrical effects, the wires cannot cross or touch each other; thus, the longer the wire, the less unused area there is available for various other electrically-related functions.

Referring now to Figure 2, one prior art technique proposed to solve some of the problems with packaging microdisplays is illustrated. A microdisplay system 200 having a staggered land pattern including a number of micro-vias 202 is shown. To increase the number of lands or pads available on the printed circuit, a double row of staggered pads is proposed. A first row 204 is situated in a similar manner as previously described for pads 104 of Figure 1. The second row consists of a number of very small micro-vias 202 which are laser cut through a wire-bond land region 206 of circuit 208 (e.g., a flex circuit). Micro-vias 202 provide traces to the backside of the flex circuit, therefore, twice as many traces are possible in a given area while maintaining the space and trace width requirements.

The technique however, generally illustrated as Figure 2, has some shortcomings. The via size required to obtain the desired staggered land pattern is very small compared to standard flexible circuitry design practices. The micro-vias are laser cut using advanced and expensive technologies. For example, the cost of fabricating the flex using laser technologies can increase the overall cost of the display by as much as five times. In addition, this technique is not compatible with large volume manufacturing due in part to the increased cost, lower yields, advanced flex circuit processes, and the like. Summary of the Invention

A system according to various aspects of the present invention overcomes the problems outlined above and provides an improved microdisplay apparatus and method particularly suited for high-density wire bond displays. The microdisplay system suitably comprises a flexible printed circuit having an extended portion. The flex circuit is disposed between a frame structure which defines a protective pocket for the display. The extended portion is pulled through an opening and exposed on the backside of the display. Standard size vias may be drilled in high volume and with a higher yield on the extended portion. A wire bond land region includes a plurality of bonds wherein some of the bonds connect to the vias located on the extended portion.

In one embodiment, the extended portion is creased, folded out of the way and adhered to a display substrate. In yet another embodiment, the frame further defines a region where an encapsulant is deposited to protect the bond region. Brief Description of the Drawings

These and other features, aspects and advantages of the present invention will become better understood with reference to the following description, appending claims, and accompanying drawings where: Figures 1 and 2 illustrate bond connection sites of microdisplays in the prior art;

Figure 3A illustrates a side view of a non-pocket microdisplay configuration of the prior art;

Figure 3B illustrates a side cross-sectional view of a pocket microdisplay configuration in accordance with one aspect of the present invention; Figures 4 and 5 illustrate back and front views respectively of microdisplay systems in accordance with various embodiments of the present invention;

Figure 6 illustrates a front view of a portion of a microdisplay system in accordance with one embodiment of the present invention; and

Figure 7 illustrates a side cross-sectional view of a microdisplay system in accordance with one embodiment of the present invention. Detailed Description of Exemplary Embodiments

The present system relates to an improved apparatus and method for packaging microdisplays. The present system is particularly suited for use in connection with microdisplays using high-density wire bond connections. As a result, the exemplary embodiments of the present invention are conveniently described in that context. It should be recognized, however, that such description is not intended as a limitation on the use or applicability of the present invention, but rather, is provided merely to discuss possible applications. Accordingly, various aspects of the present invention may be suited for a wide array of applications and systems. The present system provides an area available for wire-bonding and the like without increasing the size of the display system. In addition, the system provides a "pocket" design that provides further bonding area.

Figures 3 A and 3B illustrate respective side views of a "non-pocket" design of the prior art, and a "pocket" design in accordance with one aspect of the present invention. The non-pocketed design includes a circuit board 302 which is preferably a flexible circuit, a display including a piece of transparent material 304 (e.g., glass) and a piece of silicon 306, and wire bonds 308 connecting the silicon surface to the circuit surface. A bottom surface of glass 304 includes a layer of conductive clear metal, such as ITO (indium tin oxide) 310, that electrically comiects to circuit 302. Typically a conductive "slug" 311 is placed between the glass and the circuit surface to form an electric contact. Accurately depositing or forming slug 311 can be challenging and is not very conducive to high volume manufacturing processes.

Figure 3B illustrates a cross-sectional side view of a "pocket" configuration for a display system that does not require a conductive slug. Transparent material 304 is placed in close proximity to the circuit 318 by, for example, cutting a hole in the flex and dropping the display into the pocket. Similar to the non-pocketed design, the display includes a silicon portion 312; however in the pocketed design, silicon portion 312 of the display "countersinks" such that the top of the silicon is substantially flush with the circuit 318. A number of wires 314 electrically connect silicon 312 of the display to circuit 318. Wires 314 are generally under less stress than wires 308 due in part to the smaller angle of connection. A few drops 316 or a thin film of a conductive epoxy, such as a silver filled epoxy or the like, may be used to electrically couple glass 304 to circuit 318. Thus, the pocketed design is substantially easier to manufacture than the non-pocketed design and reduces the stress on the wire bonds.

A display system according to various aspects of the present invention makes use of the pocketed design. Referring now to Figure 4, a microdisplay system 400 in accordance with another embodiment of the present invention is illustrated. Microdisplay 400 includes a printed circuit 402 having an extended portion 408, a frame structure comprising a primary frame 404 and a secondary frame 406, a substrate 412, and an opening 410. Printed circuit 402 electrically connects a driver circuit (not shown) to the display system through a plurality of trace lines. Printed circuit 402 is preferably a flexible printed circuit. In general, the flexible printed circuit (or "flex") may be a laminate consisting of alternating layers of copper conductor and polyimide dielectric. In addition, the flex may be a multi-layered circuit comprising copper and polyimide alternating layers sandwiched between two polyimide coverlays on the outer layers (i.e., to protect the etched traces from exposure and corrosion). A multi-layered flex may be capable of supporting traces, for example, on a top surface of the flex and bottom surface of the flex.

Flex 402 further includes an extended portion 408 disposed through an opening 410 of the frame structure. The extended portion provides additional area for circuitry as well as an area suitable for standard size vias (not shown). As previously mentioned, in the pocket design, a portion of the flex is cut away to provide a countersink area for the display. In the present embodiment, the cut away portion of flex is not discarded, but rather is slipped through opening 410 and becomes the extended portion 408 of the flex. It should be appreciated that extended portion 408 provides an area for bonding and various placements of the extended portion may be provided and are intended to be included in the present system. Extended portion 408 is generally slightly smaller in size than substrate 412.

The frame structure includes a primary (upper) frame 404 and a secondary (lower) frame 406. Lower frame 406 suitably defines the pocket area. The frame structure is suitably made from a low TCE (thermal coefficient of expansion) material and even more preferably, a LCP (liquid crystal polymer) resin which has a 0 TCE. There are various types of plastics that have a low TCE and are easy in manufacture. The thickness of the material, such as a plastic, is selected to provide a desired depth of the countersink for the display system and can vary depending upon the particular application, display size, and the like. Upper frame 404 is typically made from the same material as lower frame 406.

The substrate 412 may be bonded to the frame structure and can serve as a suitable part of a support unit for the display system. In general, the substrate is roughly the size of the transparent material and is generally flat. The material of the substrate is suitably chosen to minimize the difference in TCE between the substrate and the semiconductor surface of the display and, preferably, is made from a material that is substantially TCE matched with the semiconductor material. Suitable materials for substrate 412 include, but are not limited to, ceramics, plastics, some metals, and glass. Figure 5 illustrates a frontal view of microdisplay system 400 in accordance with the present embodiment of the invention. Microdisplay 400 further includes a display 502 and a wire bonding region 504. The display size can vary depending upon the application (e.g., from about Vi inch by V-- inch). However, it should be appreciated that as industry demands and future developments further reduce the size of the display, the spirit of the present invention will remain and is not limited by the size limitations of the current industry standards.

Display 502 is a multi-layered integrated circuit device. Typically, the layers include a layer of semiconductor material, a thin layer of liquid crystal, and a transparent piece of material, such as glass. The transparent piece suitably includes a thin layer of conducting material, such as ITO, on the underside. The lower surface of the display suitably comprises a conventional semiconductor substrate material such as silicon (Si) or polysilicon, however, various other materials such as gallium arsenide (GaAs), germanium (Ge), and combinations of the like may be used. In one embodiment, the semiconductor material is silicon and substrate 412 is a ceramic compound of about 90-98% alumina. A conductive joint (not shown) between the display and the flex circuit electrically couples the ITO and the flex. Wire bonding region 504 suitably includes a plurality of bond pads used to electrically connect flex 402 to display 502. Typically, a plurality of small wires are placed from the bond pads included in bonding region 504 to a suitable bond area (not shown) on display 502. Wire bonding region 504 may suitably include an encapsulant deposited over the wire bonding area to protect the delicate wire bonds. For example, a clear protective material, usually in liquid form, is placed over the wire bonds and allowed to cure. Upper frame 404 may suitably define the encapsulant area and contain the liquid encapsulant while it cures.

Referring now to Figure 6, a portion of a front view of a microdisplay in accordance with the present invention is illustrated. The flex circuit includes a wire bonding region 602, a folded area 603, and an extended portion 605. Wire bonding region 602 may include a double row of pads in the quantity desired. A first row 604 may be connected to one layer of a multi-layered flex by trace lines (not shown). A second row 606 may be connected to vias 608 by similar trace lines. For example, a few exemplary trace lines 610-613 connect four of the pads from row 606 to four of the vias 608. The trace lines are etched on the flex circuit using, for example, conventional semiconductor processes prior to packaging the display. The exemplary embodiment of Figure 6 is merely intended for demonstration; more or less bond pads may be included and various other vias configurations may be applied. Nias 608 may be suitably drilled using conventional processes for placement of standard-sized vias. Nias 608 allow additional connections to, for example, the bottom surface of flex circuit. The diameter of the standard-size via is about 10-20 mils, which is roughly three times larger than the micro-vias 202 of the prior art display 200. Conventional drilling processes can be used to place vias 608 on the extended portion 605 in contrast to the expensive laser cutting processing often required for placing micro-vias.

Figure 6 illustrates one exemplary drilling pattern for vias 608. The drilling pattern slightly resembles a "bowling pin arrangement." In one aspect of this embodiment, the vias are patterned to form a number of rows of increasing via density. In general, the vias are drilled and plated by a conducting material such as copper. To avoid electrical interference, it is desirable to include a small distance between the individual trace lines as well as each of the vias. The bowling pin arrangement of the present exemplary embodiment facilitates the desire to distance the trace lines by allowing a greater distance between the vias in closest proximity to bond region 602. A greater number of trace lines can suitably be placed between the first row of vias and extend outward to the next rows, thereby increasing the overall number of allowable vias on the flex. It should be appreciated that the via pattern exemplified in Figure 6 is merely one embodiment and should not be construed as limiting. Rather, the pattern of via placement on the extended portion of the flex can be tailored according to the particular application such as, for example, the number of desired vias and the size of the extended flex portion.

With combined reference to Figure 7, which illustrates a cross sectional side view of a microdisplay system 700 in accordance with the present embodiment, the extended portion 605 of flexible circuit 710 is suitably "folded" to form the folded area 603. Extended portion 605 is disposed through an opening 712 (generally illustrated as a dashed line) and placed across the pocket area 614. As previously mentioned, pocket area 614 may be defined by the frame structure (not shown in Figures 6 and 7). In the present embodiment, the folded area 603 permits the extended portion 605 to "tucked" under the substrate 708 and preserving the desired compact design of display systems. Additionally, the extended portion 605 may be suitably bonded to the substrate 708. Display 700 includes a display 702 comprising a transparent portion 704 and a semiconductor portion 706. Display 702 is suitably attached to substrate 708 by a die attachment adhesive or other mechanism. Display 700 and substrate 708 may comprise any of the previously mentioned materials for display 400. Example An exemplary microdisplay having an increased number of trace lines and vias on a flexible printed circuit may be packaged according to the present invention. A flexible printed circuit (flex), is suitably designed to include two layers and an extended portion at one of the ends. Using standard drilling processes, about 10 mil size vias are suitably placed on the extended portion. The vias are arranged in a series of rows where each row contains a number of vias ranging from sparsely populated to densely populated. The vias are copper plated for conductivity. The flex further includes a wire bonding region having a double row of bonds. Trace lines are etched in the flex using standard photoetching processes. One row of bonds is suitably coupled to trace lines on one side of the flex. The other row of bonds is coupled to the vias on the extended portion of the flex by trace lines using the same photoetching process. The vias route the trace lines to an underside of the flex (second layer). A polyimide coverlay is applied over both sides of the flex to protect the trace lines (e.g., from corrosion and exposure). The exposed bonds are plated with a non-corroding material, like gold, that both protects the bonds and facilitates wire bonding. The flex is then die cut to a finished desired shape per the intended application. A frame structure having an upper and lower frame is fabricated from a low

TCE such as liquid crystal polymer (LCP) plastic. The upper frame is suitably shaped to provide support and a "well portion" for subsequent molding of a protective encapsulant in the wire bonding region. The lower frame is suitably shaped to provide a pocket area for the subsequent placement of a display unit. The finished flex is bonded to the upper and lower frames using pressure sensitive adhesive (or other types of adhesives used in laminates - e.g., thermal set adhesive). The frame structure includes a small opening near the pocket configured to allow the extended portion of the flex to be pulled through.

A ceramic substrate is bonded to the frame structure. In this example, preferably the substrate is a compound of about 96% alumina having a low TCE that is substantially matched to the silicon section of the display. The extended portion of the flex is adhered to the ceramic substrate with, for example, a pressure sensitive adhesive strip.

A display having a thin layer of liquid crystal sa ndwiched between a clear glass top portion and a silicon circuit is attached to the ceramic substrate. A conductive epoxy-like substance electrically connects a thin layer of ITO on the underside of the glass to the flex.

The wire-bonding portion of the flex, having a number of bond pads, is suitably coupled to the display with thin conducting wires. Each bond pad is wired to the silicon surface of the display using standard wire bonding techniques. A clear encapsulant is formed over the wire bonding region to protect the wire bonds from exposure and to help lock the wires into position. The encapsulant area is defined by the upper frame, which provides a "well region" for the encapsulant.

It should be appreciated that the particular implementations and examples shown and described herein are illustrative of the invention and its best mode and are not intended to limit the scope of the present invention in any way. Indeed, for the sake of brevity, conventional techniques for signal processing, data transmission, signaling, and network control, and other functional aspects of the systems (and components of the individual operating components of the systems) may not be described in detail herein. Furthermore, the connecting lines shown in the various figures contained herein are intended to represent exemplary functional relationships and/or physical couplings between the various elements. It should be noted that many alternative or additional functional relationships or physical connections may be present in a practical display system.

The present invention has been described above with reference to exemplary embodiments. However, changes and modifications may be made to the embodiments without departing from the scope of the present invention. For example, the materials described herein may be substituted and the number of vias and via pattern can be changed according to particular design needs. These and other changes or modifications are intended to be included within the scope of the present invention, as expressed in the following claims.

Claims

1. A display system comprising: a frame structure; a flexible circuit having an extended portion and a bonding region, the flexible circuit disposed at least partially through the frame structure; a plurality of vias located on the extended portion of the flexible circuit; and a display disposed in the frame structure and coupled to the bonding region of the flexible circuit.

2. The display system of claim 1 wherein the flexible circuit comprises multiple layers capable of supporting multiple layers of traces.

3. The display system of claim 2 wherein the flexible circuit comprises a first layer on a top surface of the flexible circuit and a second layer on a bottom surface of the flexible circuit.

4. The display system of claim 3 wherein the flexible circuit comprises a plurality of traces on the top surface and a plurality of traces on the bottom surface.

5. The display system of claim 4 wherein the bonding region comprises a plurality of bond pads, wherein at least one of the bond pads is coupled to at least one of the traces on the top surface and at least one of the bond pads is coupled to at least one of the traces on the bottom surface.

6. The display system of claim 1 comprising a pocketed design.

7. The display system of claim 6 wherein the frame structure defines a pocket for the display.

8. The display system of claim 1 further comprising a substrate coupled to the display, wherein the extended portion of the flexible circuit is folded under the substrate.

9. The display system of claim 1 further comprising an encapsulant formed in the bonding region.

10. The display system of claim 1 wherein the display comprises a semiconductor material, a transparent piece of material, and a layer of liquid crystal disposed between the semiconductor material and the transparent piece.

11. The display system of claim 8 wherein the substrate comprises a material having a low thermal coefficient of expansion.

12. The display system of claim 8 wherein the substrate comprises a material having a thermal coefficient of expansion substantially matched to a semiconductor layer of the display.

13. The display system of claim 8 wherein the substrate substantially comprises alumina.

14. The display system of claim 1 wherein the frame structure defines an opening and wherein the extended portion of the flexible circuit is disposed through the opening.

15. The display system of claim 1 wherein the vias comprise a diameter of 10-20 mils.

16. A microdisplay system comprising: a display having a layer of semiconductor material, a layer of liquid crystal, and a layer of glass; a frame structure having an opening and defining a pocket region for placement of the display; and a printed circuit having a plurality of trace lines and an extended portion having a plurality of vias, wherein the extended portion is disposed through the opening and the printed circuit is disposed at least partially tlirough the frame structure and electrically coupled to the display.

17. The microdisplay system of claim 16 further comprising a substrate bonded to the display.

18. The microdisplay system of claim 16 wherein the vias comprise a row configuration of increasing density.

19. The microdisplay system of claim 17 wherein the substrate comprises at least one of ceramic, plastic, metal and glass.

20. The microdisplay system of claim 16 wherein the printed circuit comprises a multi-layered flexible circuit.

21. The microdisplay system of claim 16 wherein the printed circuit comprises a wire bonding region having a plurality of wire bond pads.

22. The microdisplay system of claim 21 wherein the printed circuit comprises a multi-layered circuit and the wire bonding region comprises first and second rows of wire bond pads, wherein the first row is coupled to a first layer of the circuit and a second row is coupled to a second layer of the circuit.

23. The microdisplay system of claim 22 wherein at least one of the trace lines is coupled to at least one of the vias on the extended portion.

24. The microdisplay system of claim 17 wherein the extended portion is folded under the substrate.

25. The microdisplay system of claim 24 wherein the extended portion is adhered to the substrate.

26. A method for packaging a display system comprising the steps of: forming vias in an extended portion of a flexible circuit; forming traces in the flexible circuit wherein a plurality of the traces are coupled to a plurality of bond pads through the vias; disposing the extended portion of the flexible circuit through an opening in a frame structure; disposing a display unit in the frame structure; and electrically connecting the flexible circuit to the display unit.

27. The method of claim 25 wherein the step of forming the vias comprises: drilling standard-sized vias using standard drilling processes; and plating the vias with a conducting material.

28. The method of claim 25 wherein the step of forming traces comprises: photoetching trace lines in the flexible circuit; and applying a coverlay over the trace lines.

29. The method of claim 25 further comprising the step of plating the bond pads with a non-corrosive material.

30. The method of claim 25 further comprising the step of forming a pocket area in the frame structure.

31. The method of claim 30 further comprising the step of bonding a substrate to the frame structure in the pocket area.

32. The method of claim 31 further comprising the step of bonding the extended portion to the substrate.

33. The method of claim 31 further comprising the step of bonding the display unit to the substrate.

34. The method of claim 25 wherein the step of electrically bonding comprises wire bonding the display unit to a plurality of bond pads on the flexible circuit.

35. The method of claim 25 further comprising the step of forming a well region partially around a wire bonding region of the flexible circuit.

36. The method of claim 35 further comprising the step of depositing an encapsulant in the well region.

37. The method of claim 27 further comprising the step of drilling 10 to 20 mil-sized vias.