EP1261120B1 - Power optimized input circuit - Google Patents

Power optimized input circuit Download PDF

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Publication number
EP1261120B1
EP1261120B1 EP02360135A EP02360135A EP1261120B1 EP 1261120 B1 EP1261120 B1 EP 1261120B1 EP 02360135 A EP02360135 A EP 02360135A EP 02360135 A EP02360135 A EP 02360135A EP 1261120 B1 EP1261120 B1 EP 1261120B1
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EP
European Patent Office
Prior art keywords
transistor
current source
input circuit
resistor
input
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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EP02360135A
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German (de)
French (fr)
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EP1261120A1 (en
Inventor
Kassen Oldewurtel
Rainer. Schüle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel CIT SA
Alcatel Lucent SAS
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Alcatel CIT SA
Alcatel SA
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/18—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using Zener diodes

Definitions

  • the invention relates to an input circuit.
  • Input circuits are used in all areas of electrical engineering and Electronics used. They are used for example for galvanic isolation. For this purpose, for example, an opto-coupler in the input circuit used.
  • Fig. 1 shows a known input circuit comprising an opto-coupler O and a current source ST1.
  • the current source ST1 includes an ohmic resistor R V , a Zener diode S, a transistor T 1 and a series resistive resistor R S1.
  • the value of the series resistor R V 10 kOhm
  • that of the series resistor R S1 2.2 kOhm
  • the turn-on voltage of the Zener diode S 4.7 volts.
  • the transistor T 1 is, for example, an npn transistor, through which a 1.8 mAmpère current is set.
  • Series resistor R V and Zener diode S are connected in series.
  • Series resistor R S1 , transistor T 1 and opto-coupler O are also connected in series.
  • the base of the transistor T 1 is connected to the series resistor R V and Zener diode S.
  • the positive input of the input circuit is connected to the series resistor R V and the opto-coupler O, the negative input with Zener diode S and series resistor R S. Between positive and negative input is the input voltage U E.
  • the input circuit is designed for an input voltage range of 10 volts to 72 volts. Such relatively high fluctuations in the input voltage occur, for example, in the railway signaling technology sector and there in an assembly for the parallel input / output.
  • Low input voltages lead to a low power loss, high input voltages lead to a high power loss.
  • a high power loss leads to a high self-heating of the input circuit.
  • the series resistor R V generates a lot of heat, resulting in a high power consumption results and requires additional equipment for cooling to counteract overheating.
  • EP 0 477 596 A2 discloses a DC blocking converter circuit disclosed.
  • the circuit includes a voltage divider, one Base circuit, an oscillating circuit and an output circuit as well as for the feedback and regulation of the output voltage Comparator and an optocoupler.
  • the circuit includes in particular a first current source having a first transistor, a second current source with a second transistor, an intermediate resistor and a Assembly for galvanic isolation, wherein the first transistor with the negative input of the input circuit is connected and wherein the second transistor on the one hand with the positive input of the Input circuit and the other with the base of the second transistor connected is.
  • DE 3432567 C1 is a circuit arrangement for Short circuit monitoring revealed. It will come in series with the Consumer switched first transistor and one of it Basic voltage divider ratio changing, with its base with the Realized collector of the first transistor connected second transistor.
  • an input circuit which is a current source includes, which has a current limiting resistor with is connected to an optocoupler.
  • the object of the invention is a power-optimized input circuit provide.
  • Fig. 1 Compared with the prior art of Fig. 1 can significantly more Inputs are realized, which processes more information can be.
  • the power dissipation e.g. to the Factor 11, may e.g. 11 times the number of inputs can be realized.
  • the power loss (heat generation) at constant Number of inputs can be reduced by a factor of 11.
  • Fig. 2 shows a schematic representation of an inventive Input circuit.
  • the input circuit according to the invention includes two current sources ST1, ST2, a device for electrical isolation as well as an ohmic intermediate resistor R Z.
  • the component for galvanic isolation is designed as an opto-coupler O. At the output of the opto-coupler O is the output voltage U A of the input circuit.
  • the arrangement of the two current sources ST1, ST2 may be referred to as antiserial.
  • Intermediate resistor (R Z ) and opto-coupler (O) are each connected between the two current sources (ST 1 , ST 2 ).
  • Current source ST 1 includes transistor T 1 , Zener diode S 1 and ohmic series resistance R S1 .
  • Current source ST 2 includes transistor T 2 , Zener diode S 2 and ohmic series resistance R S2 .
  • the transistor T 1 is, for example, an npn transistor, through which a 1.8 mAmpère current is set.
  • the transistor T 2 is, for example, a pnp transistor, through which a 0.59 mAmpère current is set.
  • the value of the intermediate resistance R Z is for example 220 kOhm.
  • the power loss P at the second current source ST 2 is a value of 3.1 mWatt for an input voltage of 10 volts and a value of 39 mWatt for an input voltage of 72 volts.
  • the power loss at the input voltage 72 volts is more than a factor of 11 below the power loss in the prior art input circuit in Fig. 1.
  • a current source includes a transistor, a Zener diode and a resistor.
  • the power source can also a self-conducting field effect transistor with or without resistance exhibit.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Dc-Dc Converters (AREA)
  • Electronic Switches (AREA)

Abstract

The arrangement has a first current source (ST1), a unit for electrical isolation, an intermediate resistance (RZ) and a second current source (ST2). The unit for electrical isolation and the intermediate resistance are both connected between the two current sources. Each current source contains a transistor (T1,T2), a resistor (RS1,RS2) and a Zener diode (S1,S2). AN Independent claim is also included for a parallel input/output unit for railway signaling.

Description

Die Erfindung betrifft eine Eingangsschaltung.The invention relates to an input circuit.

Eingangsschaltungen werden in allen Bereichen der Elektrotechnik und Elektronik eingesetzt. Sie dienen beispielsweise der galvanischen Trennung. Dazu wird beispielsweise ein Opto-Koppler in der Eingangsschaltung verwendet.Input circuits are used in all areas of electrical engineering and Electronics used. They are used for example for galvanic isolation. For this purpose, for example, an opto-coupler in the input circuit used.

Fig. 1 zeigt eine bekannte Eingangschaltung beinhaltend einen Opto-Koppler O und eine Stromquelle ST1. Am Ausgang des Opto-Kopplers O liegt die Ausgangsspannung UA der Eingangsschaltung an. Die Stromquelle ST1 beinhaltet einen ohmschen Vorwiderstand RV, eine Zener-Diode S, einen Transistor T1 sowie einen ohmschen Serienwiderstand RS1 Es ist beispielsweise gewählt der Wert des Vorwiderstands RV= 10 kOhm, der des Serienwiderstand RS1 = 2,2 kOhm, die Durchschaltspannung der Zener-Diode S = 4,7 Volt. Der Transistor T1 ist z.B. ein npn-Transistor, durch den ein 1,8 mAmpère Strom eingestellt ist. Vorwiderstands RV und Zener-Diode S sind in Reihe geschaltet. Serienwiderstand RS1, Transistor T1 und Opto-Koppler O sind ebenfalls in Reihe geschaltet. Die Basis des Transistors T1 ist mit Vorwiderstands RV und Zener-Diode S verbunden. Der positive Eingang der Eingangsschaltung ist mit Vorwiderstand RV und Opto-Koppler O verbunden, der negative Eingang mit Zener-Diode S und Serienwiderstand RS. Zwischen positivem und negativem Eingang liegt die Eingangsspannung UE.Fig. 1 shows a known input circuit comprising an opto-coupler O and a current source ST1. At the output of the opto-coupler O is the output voltage U A of the input circuit. The current source ST1 includes an ohmic resistor R V , a Zener diode S, a transistor T 1 and a series resistive resistor R S1. For example, the value of the series resistor R V = 10 kOhm, that of the series resistor R S1 = 2.2 kOhm , the turn-on voltage of the Zener diode S = 4.7 volts. The transistor T 1 is, for example, an npn transistor, through which a 1.8 mAmpère current is set. Series resistor R V and Zener diode S are connected in series. Series resistor R S1 , transistor T 1 and opto-coupler O are also connected in series. The base of the transistor T 1 is connected to the series resistor R V and Zener diode S. The positive input of the input circuit is connected to the series resistor R V and the opto-coupler O, the negative input with Zener diode S and series resistor R S. Between positive and negative input is the input voltage U E.

Die Eingangsschaltung ist für einen Eingangsspannungsbereich von 10 Volt bis 72 Volt ausgelegt. Solch relativ hohe Schwankungen der Eingangsspannung kommen beispielsweise vor im Eisenbahnsignaltechnikbereich und dort in einer Baugruppe für die parallele Ein-/Ausgabe. Für die Verlustleistung PV am Vorwiderstand RV gilt PV = RxI2 = U2/R. Mit R = RV = 10 kOhm ergibt sich für eine Eingangsspannung UE = 10 Volt eine Verlustleistung PV = 2,8 mWatt und für eine Eingangsspannung UE = 72 Volt eine Verlustleistung PV = 453 mWatt. Geringe Eingangsspannungen führen zu einer geringen Verlustleistung, hohe Eingangsspannungen führen zu einer hohen Verlustleistung. Eine hohe Verlustleistung führt zu einer hohen Eigenerwärmung der Eingangsschaltung. Bei hohen Eingangsspannungen erzeugt der Vorwiderstands RV sehr viel Wärme, woraus zum einem ein hoher Stromverbrauch resultiert und zum anderen zusätzliches Equipment zur Kühlung erfordert, um einem Überhitzen entgegenzuwirken.The input circuit is designed for an input voltage range of 10 volts to 72 volts. Such relatively high fluctuations in the input voltage occur, for example, in the railway signaling technology sector and there in an assembly for the parallel input / output. For the power loss P V at the resistor R V , P V = RxI 2 = U 2 / R. With R = R V = 10 kOhm results for an input voltage U E = 10 volts power loss P V = 2.8 mWatt and for an input voltage U E = 72 volts power loss P V = 453 mWatt. Low input voltages lead to a low power loss, high input voltages lead to a high power loss. A high power loss leads to a high self-heating of the input circuit. At high input voltages, the series resistor R V generates a lot of heat, resulting in a high power consumption results and requires additional equipment for cooling to counteract overheating.

In EP 0 477 596 A2 ist eine Gleichspannungssperrwandlerschaltung offenbart. Die Schaltung beinhaltet einen Spannungsteiler, einen Basisstromkreis, eine Schwingschaltung und einen Ausgangsstromkreis sowie zur Rückkopplung und Regelung der Ausgangsspannung einen Komparator und einen Optokoppler. Die Schaltung beinhaltet insbesondere eine erste Stromquelle mit einem ersten Transistor, eine zweite Stromquelle mit einem zweiten Transistor, einen Zwischenwiderstand und eine Baugruppe zur galvanischen Trennung, wobei der erste Transistor mit dem negativen Eingang der Eingangsschaltung verbunden ist und wobei der zweite Transistor zum einen mit dem positiven Eingang der Eingangsschaltung und zum anderen mit der Basis des zweiten Transistors verbunden ist.EP 0 477 596 A2 discloses a DC blocking converter circuit disclosed. The circuit includes a voltage divider, one Base circuit, an oscillating circuit and an output circuit as well as for the feedback and regulation of the output voltage Comparator and an optocoupler. The circuit includes in particular a first current source having a first transistor, a second current source with a second transistor, an intermediate resistor and a Assembly for galvanic isolation, wherein the first transistor with the negative input of the input circuit is connected and wherein the second transistor on the one hand with the positive input of the Input circuit and the other with the base of the second transistor connected is.

In DE 3432567 C1 ist eine Schaltungsanordnung zur Kurzschlußüberwachung offenbart. Sie wird durch einen in Reihe mit dem Verbraucher geschalteten ersten Transistor und einen dessen Basisspannungsteilerverhältnis verändernden, mit seiner Basis mit dem Kollektor des ersten Transistor verbundenen zweiten Transistor realisiert.In DE 3432567 C1 is a circuit arrangement for Short circuit monitoring revealed. It will come in series with the Consumer switched first transistor and one of it Basic voltage divider ratio changing, with its base with the Realized collector of the first transistor connected second transistor.

In US 6,043,703 ist eine Eingangsschaltung offenbart, die eine Stromquelle beinhaltet, die über einen zur Stromlimitierung dienenden Widerstand mit einem Optokoppler verbunden ist.In US 6,043,703 an input circuit is disclosed which is a current source includes, which has a current limiting resistor with is connected to an optocoupler.

Aufgabe der Erfindung ist es, eine leistungsoptimierte Eingangsschaltung bereitzustellen.The object of the invention is a power-optimized input circuit provide.

Gelöst wird die Aufgabe durch eine Eingangsschaltung gemäß Patentanspruch 1.The problem is solved by an input circuit according to Claim 1.

Durch die Verwendung einer zweiten Stromquelle anstelle des ohmschen Vorwiderstands kann die Verlustleistung bei hohen Eingangsspannungen deutlich reduziert werden.By using a second power source instead of ohmic Series resistance can reduce the power loss at high input voltages be significantly reduced.

Verglichen mit dem Stand der Technik nach Fig. 1 können deutlich mehr Eingänge realisiert werden, wodurch mehr Informationen verarbeitet werden können. Durch die Verringerung der Verlustleistung, z.B. um den Faktor 11, kann z.B. die 11-fache Anzahl an Eingängen realisiert werden. Alternativ kann die Verlustleistung (Wärmeentwicklung) bei gleichbleibender Anzahl der Eingänge um den Faktor 11 reduziert werden. Alternativ kann auch die Anzahl der Eingänge um den Faktor 4 erhöht und gleichzeitig die Verlustleistung (Wärmeentwicklung) ca. um den Faktor 3 reduziert werden.Compared with the prior art of Fig. 1 can significantly more Inputs are realized, which processes more information can be. By reducing the power dissipation, e.g. to the Factor 11, may e.g. 11 times the number of inputs can be realized. Alternatively, the power loss (heat generation) at constant Number of inputs can be reduced by a factor of 11. Alternatively, you can also increases the number of inputs by a factor of 4 and at the same time the Power loss (heat generation) can be reduced by a factor of about 3.

Im folgenden wird ein Ausführungsbeispiel der Erfindung unter Zuhilfenahme von Fig. 2 erläutert.In the following an embodiment of the invention is under With the aid of Fig. 2 explained.

Fig. 2 zeigt eine schematische Darstellung einer erfindungsgemäßen Eingangsschaltung.Fig. 2 shows a schematic representation of an inventive Input circuit.

Die erfindungsgemäße Eingangsschaltung beinhaltet zwei Stromquellen ST1, ST2, ein Bauelement zur galvanischen Trennung sowie einen ohmschen Zwischenwiderstand RZ. Das Bauelement zur galvanischen Trennung ist als Opto-Koppler O ausgeführt. Am Ausgang des Opto-Kopplers O liegt die Ausgangsspannung UA der Eingangsschaltung an.The input circuit according to the invention includes two current sources ST1, ST2, a device for electrical isolation as well as an ohmic intermediate resistor R Z. The component for galvanic isolation is designed as an opto-coupler O. At the output of the opto-coupler O is the output voltage U A of the input circuit.

Die Anordnung der beiden Stromquellen ST1, ST2 kann als antiseriell bezeichnet werden. Zwischenwiderstand (RZ) und Opto-Koppler (O) sind jeweils zwischen die beiden Stromquellen (ST1, ST2) geschaltet.The arrangement of the two current sources ST1, ST2 may be referred to as antiserial. Intermediate resistor (R Z ) and opto-coupler (O) are each connected between the two current sources (ST 1 , ST 2 ).

Stromquelle ST1 beinhaltet Transistor T1, Zener-Diode S1 und ohmschen Serienwiderstand RS1. Stromquelle ST2 beinhaltet Transistor T2, Zener-Diode S2 und ohmschen Serienwiderstand RS2. Es ist beispielsweise gewählt der Wert des Serienwiderstand RS1 = 2,2 kOhm, die Durchschaltspannung der Zener-Diode S1 = 4,7 Volt. Der Transistor T1 ist z.B. ein npn-Transistor, durch den ein 1,8 mAmpère Strom eingestellt ist. Es ist beispielsweise gewählt der Wert des Serienwiderstand RS2= 6,8 kOhm, die Durchschaltspannung der Zener-Diode S1 = 4,7 Volt. Der Transistor T2 ist z.B. ein pnp-Transistor, durch den ein 0,59 mAmpère Strom eingestellt ist. Der Wert des Zwischenwiderstands RZ ist beispielsweise 220 kOhm.Current source ST 1 includes transistor T 1 , Zener diode S 1 and ohmic series resistance R S1 . Current source ST 2 includes transistor T 2 , Zener diode S 2 and ohmic series resistance R S2 . For example, the value of the series resistance R S1 = 2.2 kOhm, the turn-on voltage of the zener diode S 1 = 4.7 volts, is selected. The transistor T 1 is, for example, an npn transistor, through which a 1.8 mAmpère current is set. For example, the value of the series resistor R S2 = 6.8 kOhm, the turn-on voltage of the zener diode S 1 = 4.7 volts. The transistor T 2 is, for example, a pnp transistor, through which a 0.59 mAmpère current is set. The value of the intermediate resistance R Z is for example 220 kOhm.

Serienwiderstands RS2, Transistor T2 und Zener-Diode S1 sind in Reihe geschaltet. Zener-Diode S2, Opto-Koppler O, Transistor T1 und Serienwiderstand RS1 sind ebenfalls in Reihe geschaltet. Die Basis des Transistors T2 ist mit Zwischenwiderstand RZ, Zener-Diode S2 und Opto-Koppler O verbunden. Die Basis des Transistors T1 ist mit Zwischenwiderstand RZ , Zener-Diode S1 und Transistor T2 verbunden. Der positive Eingang der Eingangsschaltung ist mit Serienwiderstand RS2 und Zener-Diode S2 verbunden, der negative Eingang mit Zener-Diode S1 und Serienwiderstand RS1. Zwischen positivem und negativem Eingang liegt die Eingangsspannung UE.Series resistance R S2 , transistor T 2 and Zener diode S 1 are connected in series. Zener diode S 2 , opto-coupler O, transistor T 1 and series resistor R S1 are also connected in series. The base of the transistor T 2 is connected to intermediate resistor R Z , Zener diode S 2 and opto-coupler O. The base of the transistor T 1 is connected to intermediate resistor R Z , Zener diode S 1 and transistor T 2 . The positive input of the input circuit is connected to series resistor R S2 and Zener diode S 2 , the negative input to Zener diode S 1 and series resistor R S1 . Between positive and negative input is the input voltage U E.

Für die Verlustleistung P an der zweiten Stromquelle ST2 ergibt sich ein Wert von 3,1 mWatt für eine Eingangsspannung von 10 Volt und ein Wert von 39 mWatt für eine Eingangsspannung von 72 Volt. Damit liegt die Verlustleistung bei der Eingangsspannung 72 Volt um mehr als den Faktor 11 unterhalb der Verlustleistung in der Eingangsschaltung des Standes der Technik in Fig. 1. Es liegt somit eine deutlich Reduktion der Verlustleistung vor, die zu einer substantiellen Reduktion der Erwärmung der Eingangsschaltung führt.For the power loss P at the second current source ST 2 is a value of 3.1 mWatt for an input voltage of 10 volts and a value of 39 mWatt for an input voltage of 72 volts. Thus, the power loss at the input voltage 72 volts is more than a factor of 11 below the power loss in the prior art input circuit in Fig. 1. Thus, there is a significant reduction in power dissipation, which leads to a substantial reduction in the heating of the input circuit ,

Beim Ausführungsbeispiel enthält eine Stromquelle einen Transistor, eine Zener-Diode und einen Widerstand. Alternativ kann die Stromquelle auch einen selbstleitenden Feldeffekt-Transistor mit oder ohne Widerstand aufweisen.In the embodiment, a current source includes a transistor, a Zener diode and a resistor. Alternatively, the power source can also a self-conducting field effect transistor with or without resistance exhibit.

Claims (4)

  1. An input circuit comprising a fist current source (ST1) with a first transistor (T1), a second current source (ST2) with a second transistor (T2), an intermediate resistor (RZ), and a module for providing electric isolation, the first transistor (T1) connected to the negative input of the input circuit, and the second transistor (T2) connected, on the one hand, to the positive input of the input circuit and, on the other hand, to the base of the second transistor (T2), characterized in that the intermediate resistor (RZ) is connected directly between the base of the first transistor (T1) and the base of the second transistor (T2), and that the module for providing electric isolation is connected directly between the base of the second transistor (T2) and the first transistor (T1).
  2. An input circuit as claimed in claim 1, characterized in that each current source (ST1; ST2) additionally comprises a resistor (RS1; RS2) and a zener diode (S1; S2).
  3. An input circuit as claimed in claim 2, characterized in that the resistor (RS1) and the transistor (T1) of the first current source (ST1), the module for providing electric isolation, and the zener diode (S2) of the second current source (ST2) are connected in series, that the zener diode (S1) of the first current source (ST1) and the transistor (T2) and the resistor (RS2) of the second current source (ST2) are connected in series, that the base of the transistor (T1) of the first current source (ST1) is connected to the intermediate resistor (RZ), to the transistor (T2) of the second current source (ST2), and to the zener diode (S1) of the first current source (ST1), and that the base of the transistor (T2) of the second current source (ST2) is connected to the intermediate resistor (RZ), to the zener diode (S2) of the second current source (ST2), and to the module for providing electric isolation.
  4. An input circuit as claimed in claim 1, characterized in that the module for providing electric isolation is implemented as an optocoupler (O).
EP02360135A 2001-05-23 2002-04-29 Power optimized input circuit Expired - Lifetime EP1261120B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10125283 2001-05-23
DE10125283A DE10125283A1 (en) 2001-05-23 2001-05-23 Performance-optimized input switching

Publications (2)

Publication Number Publication Date
EP1261120A1 EP1261120A1 (en) 2002-11-27
EP1261120B1 true EP1261120B1 (en) 2004-12-01

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EP02360135A Expired - Lifetime EP1261120B1 (en) 2001-05-23 2002-04-29 Power optimized input circuit

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EP (1) EP1261120B1 (en)
AT (1) ATE284087T1 (en)
DE (2) DE10125283A1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102017131200B4 (en) * 2017-12-22 2019-09-05 Pilz Gmbh & Co. Kg Digital input circuit for receiving digital input signals of a signal generator

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3150176C2 (en) * 1981-12-18 1984-05-30 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Electronic constant current generator for high voltage devices
DE3432567C1 (en) * 1984-09-05 1985-12-05 Standard Elektrik Lorenz Ag, 7000 Stuttgart Circuit arrangement for short-circuit monitoring
DE3916832A1 (en) * 1989-05-19 1990-11-22 Siemens Ag CIRCUIT ARRANGEMENT FOR POTENTIAL-FREE DETECTION OF BINARY ELECTRICAL SIGNALS
AT399626B (en) * 1990-09-26 1995-06-26 Siemens Ag Oesterreich LOCK-UP CONVERTER
US6043703A (en) * 1997-07-30 2000-03-28 Allen-Bradley Company, Llc Low power active input circuit

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EP1261120A1 (en) 2002-11-27
DE10125283A1 (en) 2002-11-28
ATE284087T1 (en) 2004-12-15
DE50201652D1 (en) 2005-01-05

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