EP0951137B1 - Oscillateur local stable synthétisé - Google Patents

Oscillateur local stable synthétisé Download PDF

Info

Publication number
EP0951137B1
EP0951137B1 EP99301859A EP99301859A EP0951137B1 EP 0951137 B1 EP0951137 B1 EP 0951137B1 EP 99301859 A EP99301859 A EP 99301859A EP 99301859 A EP99301859 A EP 99301859A EP 0951137 B1 EP0951137 B1 EP 0951137B1
Authority
EP
European Patent Office
Prior art keywords
signal
frequency
vco
fundamental
locked loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP99301859A
Other languages
German (de)
English (en)
Other versions
EP0951137A2 (fr
EP0951137A3 (fr
Inventor
Stephen James Consolazio
Dave Biscan
Albert Ferek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Northrop Grumman Corp
Original Assignee
Northrop Grumman Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Northrop Grumman Corp filed Critical Northrop Grumman Corp
Publication of EP0951137A2 publication Critical patent/EP0951137A2/fr
Publication of EP0951137A3 publication Critical patent/EP0951137A3/fr
Application granted granted Critical
Publication of EP0951137B1 publication Critical patent/EP0951137B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop

Definitions

  • the present invention relates generally to methods and systems for generating a local oscillator signal for use in a radio frequency converter, and more particularly to a method and a system for providing a stable highfrequency local oscillator signal using inexpensive components.
  • a typical wireless communications system consists of a transmitter, a receiver and communication channels wirelessly connecting the receiver to the transmitter.
  • an information bit sequence is coded and transformed into an analog waveform centered at baseband frequency, which is subsequently up-converted to be centered at a higher frequency in order to be sent over one of a number of predetermined radio frequency (RF) channels.
  • RF radio frequency
  • the RF received signal is down-converted to one or more successive intermediate frequencies (IF) before being converted to baseband frequency in the desired channel.
  • IF intermediate frequencies
  • the resulting analog baseband signal is then digitized and demodulated to yield the original information bit sequence.
  • analog local oscillators LOs are used to implement each IF down-conversion or up-conversion stage.
  • This frequency band known as the Industrial, Scientific and Medical (ISM) band
  • ISM Industrial, Scientific and Medical
  • To utilize the less congested ISM band with the existing 2400-2488.35 MHz point-to-point radio base station infrastructure requires a radio converter to up-convert the 2400-2488.35 MHz band to the 5725-5850 MHz ISM band and to down-convert the 5725-5850 MHzISM band to the 2400-2488.35 MHz band.
  • This radio converter requires a stable local oscillator with a frequency of about 3.34 gigahertz (GHz).
  • GHz gigahertz
  • US-A-4 404 685 discloses a frequency control system for radio apparatus.
  • Some salient features of the system include digital frequency synthesizer circuitry having a frequency and phase locked loop employing a voltage controlled oscillator, out-of-band selection detecting and transmit inhibit signal generating circuitry, and filtering and amplifying circuitry employing voltage controlled tuning and improved wide-band inter-stage coupling for supplying frequency controlling signals for both a receiver and a transmitter from a common excitation source.
  • the present invention is a method for providing a signal centered at a frequency of interest to a radio frequency converter, as defined in Claim 1 of the appended claims, and a stable oscillator system as defined in Claim 9.
  • a method and a stable local oscillator system for providing a signal centered at a frequency of interest to a radio frequency (RF) converter are disclosed.
  • the method comprises the following steps: (a) generating an output signal which comprises a fundamental signal centered at a fundamental frequency and a harmonic signal centered at the frequency of interest which is equal to an integral multiple of the fundamental frequency; (b) amplifying the output signal such that the harmonic signal is amplified more than the fundamental signal; and (c) bandpass filtering the amplified output signal such that the amplified fundamental signal is substantially suppressed and the amplified harmonic signal drives the RF converter.
  • the frequency of interest is the second harmonic which is equal to twice the fundamental frequency.
  • An example is given for the case where the fundamental frequency is 1.67 GHz gigahertz (GHz), and the frequency of interest is 3.34 GHz.
  • the output signal which includes the fundamental signal and the harmonic signals, may be generated by a stable phase locked loop circuit, as follows: (1) generating a voltage-controlled oscillator (VCO) signal which has a first signal centered at the fundamental frequency, a second signal centered at the frequency of interest, and the other integral harmonic frequencies. This output stays locked at the fundamental frequency by a control signal; (2) splitting the VCO signal into two signals which are the output signal and a feedback signal; (3) comparing the frequency of the feedback signal with the frequency of a reference signal to produce an error signal; and (4) lowpass filtering the error signal to produce the control signal which is used for locking the VCO signal at the fundamental frequency.
  • VCO voltage-controlled oscillator
  • the reference signal may be generated by a stable temperature compensated crystal oscillator, to keep the phase locked loop circuit stable at the fundamental frequency.
  • the phase locked loop circuit must be very stable in order for the amplified harmonic signal, which is generated from the phase locked loop circuit output signal, to be utilized in a RF converter.
  • the frequency of the amplified harmonic signal varies less than 2 parts per million (ppm) from +70 °C to -40°C.
  • the VCO signal is generated by a voltage-controlled oscillator (VCO), and is buffered at the output of the VCO to prevent reflected power from causing distortion of the VCO signal.
  • VCO voltage-controlled oscillator
  • the VCO signal is then preferably amplified to provide sufficient power to the output signal and the feedback signal.
  • a low-cost stable local oscillator system which implements the method of the present invention is disclosed.
  • the system comprises: (a) a phase locked loop circuit for generating the output signal which includes the fundamental signal and the harmonic signals; (b) an amplifier for amplifying the output signal, providing more gain at the desired harmonic than at the fundamental frequency resulting in the harmonic signal being amplified more than the fundamental signal; and (c) a bandpass filter having a passband centered about the frequency of interest, substantially suppressing the amplified fundamental signal and higher order harmonics, while passing the desired amplified harmonic signal.
  • the phase locked loop circuit may comprise (a) a voltage-controlled oscillator (VCO) for generating a VCO signal which a signal at the fundamental frequency and higher order integer harmonic signals; the VCO receives a control signal which enables the VCO to stay locked at the fundamental frequency; (b) a signal splitter for splitting the VCO signal into two signals which are the phase locked loop circuit output signal and a feedback signal, each of the two signals comprises a component centered at the fundamental frequency and a component centered at the desired harmonic; (c) a phase detector for comparing the feedback signal with a reference signal and producing an error signal; and (d) a lowpass filter for filtering the error signal and producing the control signal for the VCO.
  • VCO voltage-controlled oscillator
  • the phase locked loop circuit may also include a temperature compensated crystal oscillator (TCXO) which provides the reference signal to the phase detector.
  • TCXO temperature compensated crystal oscillator
  • This stable TCXO keeps the phase locked loop circuit stable.
  • the TCXO is stable for the temperature range from -40°C to +70°C.
  • the phase locked loop circuit includes an attenuator located at the output of the VCO to attenuate the power of the VCO signal in order to prevent reflected power from causing distortion of the VCO signal.
  • the phase locked loop circuit preferably includes a second amplifier located between the attenuator and the signal splitter to amplify the attenuated VCO signal to provide sufficient power to the phase locked loop circuit output signal and the feedback signal.
  • the stable local oscillator system further includes a highpass filter located between the phase locked loop circuit output and the amplifier.
  • This second highpass filter processes the phase locked loop circuit output signal such that the fundamental signal is partially attenuated while the harmonic signal is not attenuated.
  • This highpass matching network allows the use of a low cost amplifier for further processing of the phase locked loop circuit output signal.
  • the present invention extracts a normally unused harmonic signal embedded in the VCO signal as the desired frequency signal for use as a local oscillator in a RF converter.
  • a RF converter would require a local oscillator with a frequency of about 3.34 GHz.
  • 3.34 GHz phase detector chip there is no commercially available 3.34 GHz phase detector chip.
  • a low-cost stable 3.34 GHz local oscillator can be constructed with a commercially available 2.8 GHz phase detector chip.
  • Other components in the system of the present invention are also commercially available, thus need not be customized.
  • Figure 1 shows the block diagram of the synthesized stable local oscillator of the present invention. As illustrated, the system is constructed as to provide a local oscillator signal centered at 3.34 GHz.
  • the system comprises a phase locked loop circuit 20 , an amplifier 40 and a bandpass filter 50 .
  • the system also includes an optional pre-amplifier highpass filter 30 .
  • the phase locked loop circuit 20 generates an output signal which includes the fundamental signal centered at 1.67 GHz and the second harmonic signal centered at 3.34 GHz.
  • the amplifier 40 selectively amplifies the second harmonic signal by providing more gain at the harmonic of 3.34 GHz than at the fundamental frequency of 1.67 GHz. This results in making the desired harmonic signal more prominent with respect to the fundamental signal.
  • the bandpass filter 50 which has a passband centered about the second harmonic, significantly suppresses the amplified fundamental signal and outputs only the amplified harmonic signal.
  • the bandpass filter 50 also suppresses other undesired harmonics.
  • the pre-amplifier highpass filter 30 can be used to attenuate the fundamental signal without attenuating the harmonic signal.
  • This matching network would allow the use of a low-cost amplifier as amplifier 40 .
  • the pre-amplifier highpass filter 30 attenuates the fundamental signal by 10 dB without attenuating the harmonic signal or the higher order harmonics.
  • the power of the output signal of the phase locked loop 20 is 1 dBm at 1.67 GHz and -14 dBm at 3.34 GHz.
  • the filter 30 output signal power is then -9 dBm at 1.67 GHz and -14 dBm at 3.34 GHz.
  • the amplifier 40 output signal power is 11 dBm at 1.67 GHz and 6 dBm at 3.34 GHz.
  • the amplifier 40 output signal phase noise is -88 dBc/Hz at 10kHz offset.
  • the bandpass filter 50 provides a minimum attenuation of -60 dB at the fundamental, 3rd harmonic and above while achieving a low insertion loss of -2 dB at 3.34 GHz.
  • the bandpass filter 50 output signal power is -49 dBm at 1.67 GHz and 4 dBm at 3.34 GHz.
  • the bandpass filter 50 output signal is very stable (its frequency varies less than 2 ppm), thus can be used as a local oscillator signal for a radio converter.
  • the phase locked loop circuit 20 comprises a voltage-controlled oscillator (VCO) 2 , an attenuator 4 , an amplifier 6 , a signal splitter 8 , a phase detector 10 , a temperature compensated crystal oscillator (TCXO) 12 , a frequency divider 14 , and a lowpass filter 16 .
  • VCO voltage-controlled oscillator
  • TCXO temperature compensated crystal oscillator
  • the voltage-controlled oscillator 2 generates a VCO signal. Due to the non-linearity of the VCO 2 , the VCO signal includes, in addition to the fundamental signal centered at the fundamental frequency of 1.67 GHz, other harmonics, including the second harmonic centered at the second harmonic of 3.34 GHz.
  • the VCO signal power is 0 dBm at 1.67 GHz, and -15 dBm at 3.34 GHz (where dBm represents the absolute power relative to milliwatts, e.g., 0 dBm represents 1 mW, and -15 dBm represents 0.0316 mW).
  • the VCO 2 receives as input a control signal from the lowpass filter 16 which makes the VCO 2 stay locked at the fundamental frequency of 1.67 GHz.
  • the attenuator 4 is located at the output of the VCO 2 to attenuate the power of the VCO signal in order to prevent reflected power from causing distortion of the VCO signal. In the example, this attenuator 4 attenuates the power of the VCO output signal by 14 dB. Thus, at the output of the attenuator 4 , the VCO signal power is - 14 dBm at 1.67 GHz, and -29 dBm at 3.34 GHz.
  • the amplifier 6 located between the attenuator 4 and the signal splitter 8 , amplifies the attenuated VCO signal to provide sufficient power to split between the phase locked loop circuit output signal and a feedback signal.
  • the feedback signal which is inputted into the phase detector 10 , must have enough power for the phase locked loop 20 to establish phase locking at the fundamental frequency of 1.67 GHz.
  • the amplifier is a commercially available type which has a gain of 20 dB in the range of 0.1 GHz to 6 GHz.
  • the amplifier 6 output signal power is 6 dBm at 1.67 GHz, and -9 dBm at 3.34 GHz.
  • the signal splitter 8 divides the power of the amplifier 6 output signal into two parts to form two signals: the phase locked loop circuit 20 output signal and the feedback signal. In the example, the two signals are equal in power.
  • the signal splitter 8 causes some signal power loss, represented by 5 dBm attenuation in Figure 1.
  • the power of each of the two splitter output signals is 1 dBm at 1.67 GHz, and -14 dBm at 3.34 GHz.
  • the phase detector 10 receives the feedback signal at its input. Inside the phase detector 10 , there is a prescaler which divides the fundamental frequency of the feedback signal by a large integer in order to scale it down for comparison with the frequency of a reference signal. In the example, the fundamental frequency of 1.67 GHz is divided by 256 to be compared with the reference frequency of 6.523 MHz.
  • the phase detector chip may be implemented by any of a number of commercially available PPL chips, such as the 2.8 GHz PPL chip marketed by Motorola, Inc.
  • the temperature compensated crystal oscillator (TCXO) 12 provides the reference signal to the phase detector.
  • the stable TCXO 12 keeps the phase locked loop circuit 20 stable, i.e., phase locked at the fundamental frequency. Since it is less expensive to use a commercially available component, a 13.046 MHz TCXO is used as the source of the reference signal. Since a 6.523 MHz signal is needed as the reference signal, the TCXO 12 output is processed by the frequency divider 14 to produce the reference signal. The frequency divider 14 in effect halves the frequency of the TCXO 12 output signal to obtain a 6.523 MHz signal. In this implementation of the invention, the TCXO is stable for the temperature range from -30°C to +70°C.
  • f o denote the frequency obtained by dividing the fundamental frequency of the feedback signal, which is nominally 1.67 GHz, by 256.
  • f r denote the frequency of the reference signal, i.e., 6.523 MHz.
  • the phase detector 10 compares f o with f r and produces an error signal.
  • the error signal contains components at the frequencies 256*
  • the lowpass filter 16 receives the error signal from the phase detector 10 , suppresses the signal component at frequency 256(f o +f r ) and other high frequency components, and passes the low frequency component at 256*
  • the lowpass filter 16 output is proportional to the instantaneous frequency deviation of the feedback signal which is inputted into the phase detector 10 , and serves as the control signal for the VCO 2 . This control signal shifts the VCO 2 fundamental frequency from 256*f o to 256*f r so that the VCO 2 remains synchronized with the reference signal from the TCXO 12 and stays locked at the fundamental frequency of 1.67 GHz.

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)
  • Transmitters (AREA)

Claims (15)

  1. Procédé pour fournir un signal centré à une fréquence d'intérêt à un convertisseur radiofréquence (RF), le procédé comprenant les étapes de:
    (a) génération d'un signal d'oscillateur commande en tension, VCO, à partir d'un VCO dans une boucle à verrouillage de phase (20);
    (b) génération d'un signal de sortie à partir du signal VCO, le signal de sortie comprenant un signal de fondamentale centré à une fréquence fondamentale et un signal d'harmonique centré à la fréquence d'intérêt, la fréquence d'intérêt étant égale à un multiple entier de la fréquence fondamentale, le signal de fondamentale présentant une puissance plus grande que celle du signal d'harmonique;
    (c) amplification (40) du signal de sortie de telle sorte que le signal de fondamentale et le signal d'harmonique soient amplifiés inégalement, ce qui conduit au fait que le signal d'harmonique souhaité est amplifié sélectivement plus que le signal de fondamentale; et
    (d) filtrage passe-bande (50) du signal de sortie amplifié de telle sorte que le signal de fondamentale amplifié et tous les harmoniques non souhaités soient significativement atténués tandis que le signal d'harmonique souhaité amplifié est communiqué au convertisseur RF,
    le procédé étant caractérisé en ce qu'il comprend en outre l'étape d'atténuation (4) de la puissance du signal VCO pour empêcher sa distorsion.
  2. Procédé selon la revendication 1, dans lequel le signal VCO comprend un premier signal centré à la fréquence fondamentale et un second signal centré à la fréquence d'intérêt, le signal VCO restant verrouillé à la fréquence fondamentale au moyen d'un signal de commande,
    et dans lequel le procédé comprend en outre les étapes de:
    séparation du signal VCO en ledit signal de sortie et un signal de retour;
    comparaison (10) de la fréquence du signal de retour avec la fréquence d'un signal de référence afin de produire un signal d'erreur; et
    filtrage passe-bas (16) du signal d'erreur pour produire ledit signal de commande.
  3. Procédé selon la revendication 2, dans lequel ledit signal de référence est généré par un oscillateur à quartz compensé en température (12).
  4. Procédé selon l'une quelconque des revendications précédentes, dans lequel le signal de fondamentale et le signal d'harmonique sont générés par un circuit de boucle à verrouillage de phase stable (20).
  5. Procédé selon l'une quelconque des revendications précédentes, dans lequel le signal VCO est généré par un circuit de boucle à verrouillage de phase stable (20).
  6. Procédé selon l'une quelconque des revendications précédentes, comprenant en outre une étape d'amplification (6) dudit signal VCO atténué.
  7. Procédé selon l'une quelconque des revendications précédentes, dans lequel la fréquence d'intérêt est égale à deux fois la fréquence fondamentale.
  8. Procédé selon la revendication 7, dans lequel la fréquence fondamentale est de 1,67 Gigahertz et la fréquence d'intérêt est de 3,34 Gigahertz.
  9. Système d'oscillateur local stable pour fournir un signal centré à une fréquence d'intérêt à un convertisseur radiofréquence (RF), le système comprenant:
    (a) un circuit de boucle à verrouillage de phase (20) pour générer un signal de sortie, ledit circuit de boucle à verrouillage de phase (20) comportant un oscillateur commandé en tension VCO (2) pour générer un signal VCO, ledit signal de sortie étant généré à partir du signal VCO et comprenant un signal de fondamentale centré à une fréquence fondamentale et un signal d'harmonique centré à la fréquence d'intérêt, la fréquence d'intérêt étant égale à un multiple entier de la fréquence fondamentale, le signal de fondamentale présentant une puissance plus grande que celle du signal d'harmonique;
    (b) un amplificateur (40) en communication électrique avec le circuit de boucle à verrouillage de phase (20) et arrangé pour recevoir ledit signal de sortie, l'amplificateur (40) étant arrangé pour amplifier ledit signal de sortie, l'amplificateur (40) étant arrangé pour fournir plus de gain à la fréquence d'intérêt qu'à la fréquence fondamentale, ce qui conduit au fait que le signal d'harmonique est amplifié plus que le signal de fondamentale; et
    (c) un filtre passe-bande (50) en communication électrique avec l'amplificateur (40) et arrangé pour recevoir le signal de sortie amplifié, le signal de sortie amplifié comprenant le signal de fondamentale amplifié et le signal d'harmonique amplifié, le filtre passe-bande (50) présentant une bande passante centrée au voisinage de la fréquence d'intérêt, le filtre passe-bande (50) étant arrangé pour atténuer de façon significative le signal de fondamentale amplifié et pour laisser passer le signal d'harmonique amplifié,
    le système étant caractérisé en ce que le circuit de boucle à verrouillage de phase (20) inclut un atténuateur (4) en communication électrique avec le VCO (2) et arrangé pour atténuer la puissance du signal VCO et pour empêcher son tirage.
  10. Système d'oscillateur local stable selon la revendication 9, dans lequel le signal VCO comprend un premier signal centré à la fréquence fondamentale, un second signal centré à la fréquence d'intérêt et d'autres harmoniques entiers; et dans lequel le VCO (2) est arrangé pour recevoir un signal de commande, ledit signal de commande facilitant le fait que le VCO (2) reste verrouillé à la fréquence fondamentale.
  11. Système d'oscillateur local stable selon la revendication 9 ou 10, dans lequel le circuit de boucle à verrouillage de phase (20) comprend en outre:
    (a) un séparateur de signal (8) en communication électrique avec le VCO (2), pour séparer le signal VCO en ledit signal de sortie de circuit de boucle à verrouillage de phase et un signal de retour, le signal de sortie de circuit de boucle à verrouillage de phase comprenant ledit signal de fondamentale centré à la fréquence fondamentale, des fréquences d'harmoniques entiers et ledit signal d'harmonique centré à la fréquence d'intérêt;
    (b) un détecteur de phase (10) en communication électrique avec le séparateur de signal (8) et arrangé pour recevoir le signal de retour, le détecteur de phase (10) étant arrangé pour comparer le signal de retour avec un signal de référence et pour produire un signal d'erreur; et
    (c) un filtre passe-bas (16) en communication électrique avec le VCO (2) et le détecteur de phase (10) et arrangé pour recevoir le signal d'erreur, le filtre passe-bas (16) étant arrangé pour filtrer le signal d'erreur et pour produire un signal de commande sur le VCO (2) afin de faciliter le fait que le VCO reste verrouillé à la fréquence fondamentale.
  12. Système d'oscillateur local stable selon la revendication 11, dans lequel le circuit de boucle à verrouillage de phase (20) comprend en outre un oscillateur à quartz compensé en température (TCXO) (12) en communication électrique avec le détecteur de phase, le TCXO (12) étant arrangé pour appliquer ledit signal de référence sur le détecteur de phase (10).
  13. Système d'oscillateur local stable selon la revendication 11, dans lequel le circuit de boucle à verrouillage de phase (20) comprend en outre un second amplificateur (6) localisé entre l'atténuateur (4) et le séparateur de signal (8), ledit second amplificateur (6) étant arrangé pour amplifier le signal VCO atténué et pour transférer le signal VCO amplifié résultant sur le séparateur de signal (8).
  14. Système d'oscillateur local stable selon l'une quelconque des revendications 9 à 13, comprenant en outre un filtre passe-haut (30) localisé entre le circuit de boucle à verrouillage de phase (20) et l'amplificateur (40), ledit filtre passe-haut (30) étant arrangé pour filtrer le signal de sortie de circuit de boucle à verrouillage de phase de telle sorte que le signal de fondamentale soit partiellement atténué et que le signal d'harmonique soit approximativement non atténué et pour communiquer le signal de sortie de circuit de boucle à verrouillage de phase filtré résultant à l'amplificateur (40).
  15. Système d'oscillateur local stable selon l'une quelconque des revendications 9 à 14, dans lequel la fréquence fondamentale est de 1,67 Gigahertz et la fréquence d'intérêt est de 3,34 Gigahertz.
EP99301859A 1998-04-06 1999-03-11 Oscillateur local stable synthétisé Expired - Lifetime EP0951137B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/055,532 US6057740A (en) 1998-04-06 1998-04-06 Local oscillator system using harmonic derived from phase locked loop
US55532 1998-04-06

Publications (3)

Publication Number Publication Date
EP0951137A2 EP0951137A2 (fr) 1999-10-20
EP0951137A3 EP0951137A3 (fr) 2004-11-03
EP0951137B1 true EP0951137B1 (fr) 2007-05-09

Family

ID=21998481

Family Applications (1)

Application Number Title Priority Date Filing Date
EP99301859A Expired - Lifetime EP0951137B1 (fr) 1998-04-06 1999-03-11 Oscillateur local stable synthétisé

Country Status (3)

Country Link
US (1) US6057740A (fr)
EP (1) EP0951137B1 (fr)
DE (1) DE69936012T2 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106027080B (zh) * 2016-06-01 2018-07-20 中国电子科技集团公司第四十一研究所 一种基于usb接口的射频信号发生装置

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003152533A (ja) * 2001-11-16 2003-05-23 Alps Electric Co Ltd アナログ位相同期発振器
US6538499B1 (en) * 2002-01-09 2003-03-25 Xilinx, Inc. Low jitter transmitter architecture with post PLL filter
TW558168U (en) * 2002-11-19 2003-10-11 Delta Electronics Inc Voltage controlled oscillator having a bandpass filter
JP4391291B2 (ja) * 2004-03-31 2009-12-24 住友電工デバイス・イノベーション株式会社 無線装置
US7002423B1 (en) 2004-07-20 2006-02-21 Pericom Semiconductor Corp. Crystal clock generator operating at third overtone of crystal's fundamental frequency
US7053725B1 (en) 2004-10-25 2006-05-30 Pericom Semiconductor Corp. 4X crystal frequency multiplier with op amp buffer between 2X multiplier stages

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3916335A (en) * 1974-09-06 1975-10-28 Hughes Aircraft Co Harmonically phase locked voltage controlled oscillator
JPS5185303A (fr) * 1975-01-23 1976-07-26 Tokyo Shibaura Electric Co
US4039968A (en) * 1976-05-11 1977-08-02 Bell Telephone Laboratories, Incorporated Synchronizing circuit
US4404685A (en) * 1981-10-26 1983-09-13 Terra Corporation Frequency control system for radio apparatus employing filter amplifier operated at harmonic of frequency of synthesized signal source
US4590513A (en) * 1983-09-30 1986-05-20 Rca Corporation Odd harmonic signal generator
US4871984A (en) * 1988-06-24 1989-10-03 Raytheon Company Surface acoustic wave oscillator
US5015971A (en) * 1989-12-22 1991-05-14 Hughes Aircraft Company Frequency agile microwave signal generator
US5223801A (en) * 1992-03-30 1993-06-29 Interactive Technologies, Inc. Crystal oscillator and transmitter operating at the third harmonic of the fifth overtone of a crystal
FI102798B1 (fi) * 1992-07-28 1999-02-15 Nokia Mobile Phones Ltd Digitaalisen matkapuhelimen radiotaajuusosan piirijärjestely
US5302918A (en) * 1993-06-01 1994-04-12 The United States Of America As Represented By The Secretary Of The Army Subharmonic optically injection locked oscillator
DE4334079C2 (de) * 1993-10-06 1997-02-13 Daimler Benz Aerospace Ag Hochgenauer Radar-Entfernungsmesser
US5521532A (en) * 1994-10-06 1996-05-28 Tektronix, Inc. Digital synthesizer controlled microwave frequency signal source

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106027080B (zh) * 2016-06-01 2018-07-20 中国电子科技集团公司第四十一研究所 一种基于usb接口的射频信号发生装置

Also Published As

Publication number Publication date
EP0951137A2 (fr) 1999-10-20
US6057740A (en) 2000-05-02
DE69936012T2 (de) 2008-01-10
EP0951137A3 (fr) 2004-11-03
DE69936012D1 (de) 2007-06-21

Similar Documents

Publication Publication Date Title
JP3310057B2 (ja) ディジタル移動電話機の高周波回路構成
US6844763B1 (en) Wideband modulation summing network and method thereof
US4451930A (en) Phase-locked receiver with derived reference frequency
US6670861B1 (en) Method of modulation gain calibration and system thereof
US4476575A (en) Radio transceiver
US7327993B2 (en) Low leakage local oscillator system
US5230088A (en) Radio transceiver and related method of frequency control
US8674771B2 (en) Fixed bandwidth LO-GEN
US8374283B2 (en) Local oscillator with injection pulling suppression and spurious products filtering
EP0812490B1 (fr) Oscillateur a haute puissance et a faible tension controle par la tension
US7471934B2 (en) Transmitter method, apparatus, and frequency plan for minimizing spurious energy
EP0951137B1 (fr) Oscillateur local stable synthétisé
JPS6217904B2 (fr)
KR100997491B1 (ko) 오프셋 위상동기루프를 사용하는 통신 송신기
JP2001298372A (ja) 周波数自己最適化を用いた送信機回路
US20010008384A1 (en) Method for generating frequencies in a dual phase locked loop
US7095992B2 (en) Phase locked loop calibration
JPH1093469A (ja) 無線通信装置の周波数発生器と周波数変換方法
US6526262B1 (en) Phase-locked tracking filters for cellular transmit paths
US6169447B1 (en) Stabilization of passband active filters
Tham et al. A direct-conversion transceiver chip set for 900 MHz (ISM band) spread-spectrum digital cordless telephone
US20060217077A1 (en) Radio frequency device with null or quasi-null intermediate frequency minimizing interfering frequency modulation applied to an integrated local oscillator
JP2631018B2 (ja) 高周波ｐｌｌ発振器
JP3063346B2 (ja) 無線送信装置
KR100287898B1 (ko) 업컨버터

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE

AX Request for extension of the european patent

Extension state: AL LT LV MK RO SI

17P Request for examination filed

Effective date: 20050302

AKX Designation fees paid

Designated state(s): DE GB

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

RIN1 Information on inventor provided before grant (corrected)

Inventor name: FEREK, ALBERT

Inventor name: BISCAN, DAVE

Inventor name: CONSOLAZIO, STEPHEN JAMES

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE GB

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REF Corresponds to:

Ref document number: 69936012

Country of ref document: DE

Date of ref document: 20070621

Kind code of ref document: P

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20080212

REG Reference to a national code

Ref country code: GB

Ref legal event code: 732E

Free format text: REGISTERED BETWEEN 20110428 AND 20110504

REG Reference to a national code

Ref country code: DE

Ref legal event code: R081

Ref document number: 69936012

Country of ref document: DE

Owner name: NORTHROP GRUMMAN SYSTEMS CORPORATION (N.D.GES., US

Free format text: FORMER OWNER: NORTHROP GRUMMAN CORP., LOS ANGELES, CALIF., US

Effective date: 20130205

Ref country code: DE

Ref legal event code: R081

Ref document number: 69936012

Country of ref document: DE

Owner name: NORTHROP GRUMMAN SYSTEMS CORPORATION (N.D.GES., US

Free format text: FORMER OWNER: NORTHROP GRUMMAN CORP., LOS ANGELES, US

Effective date: 20130205

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20180426

Year of fee payment: 20

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20180426

Year of fee payment: 20

REG Reference to a national code

Ref country code: DE

Ref legal event code: R071

Ref document number: 69936012

Country of ref document: DE

REG Reference to a national code

Ref country code: GB

Ref legal event code: PE20

Expiry date: 20190310

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF EXPIRATION OF PROTECTION

Effective date: 20190310