EP0915408B1 - Hochspannungsregelungsschaltung und entsprechendes Spannungsregelungsverfahren - Google Patents

Hochspannungsregelungsschaltung und entsprechendes Spannungsregelungsverfahren Download PDF

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Publication number
EP0915408B1
EP0915408B1 EP19970830575 EP97830575A EP0915408B1 EP 0915408 B1 EP0915408 B1 EP 0915408B1 EP 19970830575 EP19970830575 EP 19970830575 EP 97830575 A EP97830575 A EP 97830575A EP 0915408 B1 EP0915408 B1 EP 0915408B1
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EP
European Patent Office
Prior art keywords
voltage
high voltage
vref
divider
voltage regulator
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Expired - Lifetime
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EP19970830575
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English (en)
French (fr)
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EP0915408A1 (de
Inventor
Andrea Ghilardelli
Francesco Maria Brani
Carla Golla
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STMicroelectronics SRL
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STMicroelectronics SRL
SGS Thomson Microelectronics SRL
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Priority to EP19970830575 priority Critical patent/EP0915408B1/de
Priority to DE1997619188 priority patent/DE69719188T2/de
Publication of EP0915408A1 publication Critical patent/EP0915408A1/de
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/465—Internal voltage generators for integrated circuits, e.g. step down generators
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • G05F3/242—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage
    • G05F3/247—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only with compensation for device parameters, e.g. channel width modulation, threshold voltage, processing, or external variations, e.g. temperature, loading, supply voltage producing a voltage or current as a predetermined function of the supply voltage

Definitions

  • This invention relates to a high voltage regulator.
  • the invention specifically relates to a high voltage regulator which is partly supplied by a boosted voltage and is adapted to deliver a regulated output voltage on an output terminal, starting from a sampled voltage obtained by dividing the regulated output voltage, which regulator comprises at least a comparator element being supplied by a supply voltage and feedback connected to a divider of said regulated output voltage.
  • the invention also concerns a method of regulating a voltage obtained from a boosted voltage.
  • the invention particularly, but not exclusively, relates to a high voltage regulator for a memory of the 'flash' type, and the description which follows is given in connection with this field of application for simplicity of illustration only.
  • a boosted voltage is usually generated by means of a voltage multiplier or "booster" circuit, which is purposely formed within the integrated circuit itself.
  • the booster circuit output is not at a regulated value but depends to supply voltage, temperature, output current, and process factors.
  • a regulator for a voltage multiplier circuit of the charge pump type i.e. a high voltage regulator, must be designed with high accuracy criteria because charge pump circuits can only supply limited value currents.
  • a high voltage regulator 1 according to the prior art is shown schematically in Figure 1 appended hereto.
  • the high voltage regulator 1 is partly supplied by a boosted voltage PUMPOUT generated by a charge pump circuit which supplies a high voltage at a small current capacity.
  • the output voltage Vout is regulated by resistive division of the boosted voltage PUMPOUT.
  • the voltage regulator 1 comprises a resistive divider consisting of two resistive elements R1 and R2, connected between an output terminal OUT and a ground voltage reference GND.
  • the central connection node X of the resistive elements R1 and R2 is connected to a non-inverting input terminal of a comparator element 2 having an inverting input terminal connected to an input terminal IN of the high voltage regulator 1 and a supply terminal connected to a supply voltage reference Vdd.
  • the input terminal IN of the high voltage regulator 1 receives a reference voltage Vref of constant value, usually for utilisation by several circuits in the same device.
  • the comparator element 2 also has an output terminal connected to the supply terminal of a drive transistor M1.
  • the drive transistor M1 specifically one of the NMOS type, has its source terminal connected to the ground voltage reference GND and its drain terminal connected to the control gate terminal of an output transistor M2, itself connected between the boosted voltage reference PUMPOUT and the output terminal OUT of the high voltage regulator 1.
  • the high voltage regulator 1 further includes a load transistor M3, specifically one of the PMOS type, which is connected between the boosted voltage reference PUMPOUT and the control gate terminal of the output transistor M2 and has its control gate terminal connected to the ground voltage reference GND.
  • This load transistor M3 has the n-well terminal connected to its source terminal and, hence, to the boosted voltage reference PUMPOUT.
  • the regulated output voltage Vout is sampled by the resistive divider of the high voltage regulator 1, which then provides a feedback of the same. Therefore, the value of this regulated output voltage Vout will be dependent on both the value of the reference voltage Vref and the ratio of the resistive divider R1, R2.
  • this resistive divider and particularly the combined resistances of the resistors R1 and R2, should be rather large (in the M ⁇ range).
  • the parasitic capacitance associated with a resistive divider so formed causes delayed following of a divided voltage Vsample at the central connection node X of the resistive elements R1 and R2 with respect to variations occurring in the regulated output voltage Vout.
  • This delay reflects in a slowed settling of the output voltage Vout, as well as overshooting and rippling thereof, in contrast with the requirements set above for the high voltage regulator 1.
  • the varying character of the resistance of the divider formed in the n-well makes it difficult to obtain a desired value for the regulated output voltage Vout. In fact, this varying resistance is difficult to model and reproduce. Thus, the high voltage regulator 1 incorporating such a divider is unsuitable to meet the aforementioned requirements.
  • the underlying technical problem of this invention is to provide a high voltage regulator, in particular for voltages supplied by booster circuits, which exhibits low current consumption and high precision features, as well as sufficient speed during the transient phases, with no overshoot and ripples, and reduced space requirements. In this way, the requirements for such regulators can be met and the drawbacks besetting the prior art regulators overcome.
  • the idea of solution behind this invention is one of using a diode type of divider connected to an output voltage reference to be regulated and to a varying reference voltage.
  • the problem is also solved by a method of regulating a voltage obtained from a boosted voltage as previously indicated and defined in the characterising portion of Claim 11.
  • FIG. 3 generally and schematically shown at 3 is a high voltage regulator according to the invention.
  • Corresponding circuit elements and signals, described in connection with the prior art high voltage regulator 1, will be denoted by the same alphanumerical references.
  • the high voltage regulator 3 is partly supplied by a boosted voltage PUMPOUT, generated by a charge pump circuit (not shown) which supplies a high voltage at a small current capacity.
  • the high voltage regulator 3 has an input terminal IN receiving a varying reference voltage Vref_v, and an output terminal OUT delivering a regulated output voltage Vout.
  • the output voltage Vout is regulated by having it divided by a diode divider 4.
  • the diode divider 4 comprises a plurality of diodes D1, D2,..., Dn, D1', D2',..., Dn' connected between the output terminal OUT and a ground voltage reference GND.
  • the diode divider 4 is functionally split into first 5 and second 6 legs respectively comprising first and second diode pluralities D1, D2,..., Dn and D1', D2',..., Dn' which are connected together at a central connection node Y.
  • the central connection node Y is connected to a non-inverting input terminal of a comparator element 2 which has an inverting input terminal connected to the input terminal IN of the high voltage regulator 1 and a supply terminal connected to a supply voltage reference Vdd, similar as the prior art high voltage regulator 1.
  • the comparator element 2 also has an output terminal connected to the control terminal of a drive transistor M1 which has its source terminal connected to the ground voltage reference GND and its drain terminal connected to the control terminal of an output transistor M2, itself connected between the boosted voltage reference PUMPOUT and the output terminal OUT of the high voltage regulator 3.
  • the high voltage regulator 3 further comprises a load transistor M3, specifically one of the PMOS type, which is connected between the boosted voltage reference PUMPOUT and the control terminal of the output transistor M2 and has its control terminal connected to the ground voltage reference GND.
  • This load transistor M3 has an n-well terminal connected to the source terminal and, hence, to the boosted voltage reference PUMPOUT.
  • the regulated output voltage Vout is sampled by the resistive divider of the high voltage regulator 3 at the central connection node X.
  • the comparator element 2 in combination with the transistors M1, M2 and M3 then provide a negative feedback of the sampled voltage Vsample.
  • the comparator element 2 basically comprises an operational amplifier or a simple differential.
  • this operational amplifier or simple differential is supplied by the supply voltage Vdd and, accordingly, can draw large amounts of current from the supply voltage reference Vdd, which makes it specially fast.
  • the portion which includes the drive transistor M1, output transistor M2, and load transistor M3 is supplied by the boosted voltage PUMPOUT, i.e. a higher voltage than the supply voltage Vdd.
  • Vref_v may lie anywhere between the supply voltage reference Vdd and the ground voltage reference GND.
  • the diode divider 4 may comprise a plurality of diode-configured MOS transistors, which would exhibit none of the aforementioned problems affecting the resistive dividers of conventional circuits.
  • This diode divider 4 may be formed of PMOS transistors, as shown in Figure 3; likewise, it could be formed of NMOS transistors or semiconductor junctions.
  • Vout n u + n d n d Vref_v
  • the varying reference voltage Vref_v can be used.
  • diode divider 4 For the diode divider 4 to perform as expected, its diodes should be in the on state. For this to occur, a voltage drop at least equal to the diode threshold voltage VT is required across each diode.
  • the reference voltage Vref_v should be changed. This does not represent a problem, since for a value of the reference voltage Vref_v lying, as already stated, between the value of the supply voltage Vdd and the ground GND, a different starting reference voltage Vref' can be derived therefrom, in a known manner by the skilled persons in the art, which lies anywhere between the supply voltage Vdd and the ground GND.
  • a circuit adapted to provide the new starting reference voltage Vref' is simple to design and allows the same supply voltage Vdd to be used from which a large amount of current can be extracted.
  • Such a circuit therefore, exhibits low current consumption of the booster circuits, is highly accurate, and shows no overshoot and ripples of the regulated voltage, which will be free of parasitic effects typical of high voltages and settle at a fast rate during the transient phases.
  • the single drawback of such a circuit is a waste of occupied area, especially where a new starting reference voltage Vref' with a high value is to be generated.
  • FIG. 4 shows a modified embodiment 3' of the high voltage regulator according to the invention.
  • this regulator 3' has the input terminal IN connected to the ground voltage reference GND and to the inverting input of the comparator element 2, itself having a non-inverting input connected to a central connection node Z of the diode divider 4.
  • the comparator element 2 comprising in particular an operational amplifier being supplied by the supply voltage Vdd, also has an output terminal OUT'.
  • the diode divider 4 is connected between the varying reference voltage reference Vref_v and the output terminal OUT of the high voltage regulator.
  • This diode divider 4 comprises first 5 and second 6 diode legs connected together at the central connection node Z.
  • the high voltage regulator 3' is a regulator of negative voltages. Its operation is similar to that of the high voltage regulator 3 shown in Figure 3.
  • the output voltage Vout to be regulated is sampled through the diode divider 4, in this case with respect to the varying reference voltage Vref_v rather than to the ground GND.
  • the voltage value so sampled is then compared, by means of the operational amplifier 2, with the ground GND through a suitable feedback network (not shown) connected to the output terminal OUT'.
  • the high voltage regulator of this invention provides a regulated output voltage from a boosted voltage obtained, in particular, by means of a charge pump booster circuit, through a diode divider.
  • the output voltage is regulated by comparison of the sampled voltage from the divider with a varying reference voltage or the ground.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Dc-Dc Converters (AREA)

Claims (17)

  1. Hochspannungsregulator, der teilweise mit einer angehobenen Spannung (PUMPOUT) beliefert wird und der dazu ausgebildet ist, eine regulierte Ausgangsspannung (Vout) an einen Ausgangsanschluß (OUT) zu liefern, startend von einer abgetasteten Spannung (Vsample), die durch Teilen der regulierten Ausgangsspannung (Vout) erhalten wird, wobei der Regulator wenigstens ein Komparatorelement (2) aufweist, dem eine Versorgungsspannung (Vdd) zugeführt wird, und eine Rückkopplung, die mit einem Teiler (4) der regulierten Ausgangsspannung (Vout) verbunden ist, dadurch gekennzeichnet, daß der Teiler (4) ein Diodenteiler ist, der zwischen den Ausgangsanschluß (OUT) und eine erste Vergleichsspannungsreferenz (GND, Vref_v) geschaltet ist und einen Mittelverbindungsknoten (Y, Z) aufweist, der mit einem nicht-invertierenden Anschluß des Komparatorelementes verbunden ist, und daß der
    Hochspannungsregulator außerdem einen Eingangsanschluß (IN) aufweist, der mit einer zweiten Vergleichsspannungsreferenz (Vref_v, GND) und einen invertierenden Anschluß des in dem Hochspannungsregulator (3) enthaltenen Kornparatorelementes (2) angeschlossen ist.
  2. Hochspannungsregulator nach Anspruch 1, dadurch gekennzeichnet, daß der Diodenteiler (4) einen ersten und zweiten Schenkel (5, 6) von Dioden (D1, D2,...., Du, D1', D2' Dd') aufweist, die in Reihenschaltung zueinander in einem Zentralverbindungsknoten (Y, Z) verbunden sind, wobei der erste Schenkel (5) der Dioden zwischen den Ausgangsanschluß (OUT) und den Zentralverbindungsknoten (Y, Z) des Teilers geschaltet ist und der zweite Schenkel (6) zwischen den Zentralverbindungsknoten (Y, Z) und die erste Vergleichsspannungsreferenz (GND, Vref_v) geschaltet ist.
  3. Hochspannungsregulator nach Anspruch 2, dadurch gekennzeichnet, daß der zweite Schenkel (6) von Dioden zwischen den Zentralverbindungsknoten (Y) und eine Massespannungsreferenz (GND) geschaltet ist und daß der Eingangsanschluß (IN) des Hochspannungsregulators (3) mit einer veränderlichen Spannungsreferenz (Vref_v) verbunden ist.
  4. Hochspannungsregulator nach Anspruch 1, dadurch gekennzeichnet, daß das Komparatorelement (2) im wesentlichen einen Operationsverstärker oder ein einfaches Differenzglied aufweist.
  5. Hochspannungsregulator nach Anspruch 4, dadurch gekennzeichnet, daß lediglich der Operationsverstärker oder das einfache Differenzglied, der bzw. das in dem Komparatorelement (2) enthalten ist, mit der Versorgungsspannung (Vdd) beliefert wird.
  6. Hochspannungsregulator nach Anspruch 1, dadurch gekennzeichnet, daß das Komparatorelement (2) einen Ausgangsanschluß aufweist, der mit dem Ausgangsanschluß (OUT) des Hochspannungsregulators (3) über Reihenschaltung aus dem Treibertransistor (M1), einem Ausgangstransistor (M2) und einem Lasttransistor (M3) verbunden ist, wobei von dem Treibertransistor (M1) ein Steuergateanschluß mit dem Ausgangsanschluß des Operationsverstärkers (2), ein Sourceanschluß mit der Massespannungsreferenz (GND) und ein Drainanschluß mit dem Steuergateanschluß des Ausgangstransistors (M2) verbunden sind, wobei der Ausgangstransistor (M2) zwischen die angehobene Spannungsreferenz (PUMPOUT) und den Ausgangsanschluß (OUT) des Hochspannungsregulators (3) geschaltet ist und der Lasttransistor (M3) zwischen die angehobene Spannungsreferenz (PUMPOUT) und den Steuergateanschluß des Ausgangstransistors (M2) geschaltet ist, wobei dessen Steuergateanschluß mit der Massespannungsreferenz (GND) verbunden ist.
  7. Hochspannungsregulator nach einem der vorausgehenden Ansprüche, dadurch gekennzeichnet, daß der Wert der veränderlichen Referenzspannung (Vref_v) im Bereich von dem Wert der Versorgungsspannung (Vdd) bis zum Massewert (GND) liegt.
  8. Hochspannungsregulator nach Anspruch 2, dadurch gekennzeichnet, daß der zweite Schenkel (6) der Dioden zwischen den Zentralverbindungsknoten (Z) und eine variable Spannungsreferenz (Vref_v) geschaltet ist und daß der Eingangsanschluß (IN) des Hochspannungsregulators (3) mit einer Massespannungsreferenz (GND) verbunden ist.
  9. Hochspannungsregulator nach Anspruch 1, dadurch gekennzeichnet, daß der Diodenteiler (4) eine Mehrzahl MOS-Transistoren in Dioden-Konfiguration aufweist.
  10. Hochspannungsregulator nach Anspruch 1, dadurch gekennzeichnet, daß der Diodenteiler (4) eine Mehrzahl Halbleiterübergänge aufweist.
  11. Hochspannungsregulator nach einem der vorausgehenden Ansprüche, dadurch gekennzeichnet, daß die angehobene Spannung (PUMPOUT) durch eine Booster-Schaltung erzeugt ist, die dazu ausgebildet ist, eine hohe Spannung mit einer kleinen Stromkapazität zu liefern.
  12. Verfahren zum Regulieren einer Spannung (Vout), die von einer angehobenen Spannung (PUMPOUT) abgeleitet wird und dazu geeignet ist, in einem Hochspannungsregulator nach einem der Ansprüche 1 bis 11 ausgeführt zu werden, gekennzeichnet durch folgende Schritte:
    Erhalten der abgetasteten Spannung (Vsample) als der Spannungswert an dem Zentralverbindungsknoten (Y, Z) des Diodentypteilers (4), der mit der Referenz der zu regulierenden Spannung (Vout) und mit der ersten Vergleichsspannungsreferenz (GND, Vref-v) verbunden ist;
    Regulieren der Spannung (Vout) entsprechend dem Vergleich der abgetasteten Spannung (Vsample) mit der zweiten Vergleichsspannungsreferenz (Vref_v, GND).
  13. Regulierungsverfahren nach Anspruch 12, dadurch gekennzeichnet, daß der Vergleich der abgetasteten Spannung (Vsample) mit der zweiten Vergleichsspannungsreferenz (Vref_v; GND) mit einem Operationsverstärker (2) durchgeführt wird, dem eine Versorgungsspannung (Vdd) zugeführt wird und der eine Rückkopplungsverbindung zu dem Teiler (4) aufweist, wobei der Zentralverbindungsknoten (Y, Z) des Diodenteilers (4) mit einem nicht-invertierenden Anschluß des Operationsverstärkers (2) verbunden ist.
  14. Regulierungsverfahren nach Anspruch 13, gekennzeichnet durch den Schritt des Vergleichens der abgetasteten Spannung (Vsample) mit einer veränderlichen Referenzspannung (Vref_v), die einem invertierenden Eingang des Operationsverstärkers (2) zugeführt wird, wobei der Diodenteiler (4) mit der zu regulierenden Spannung (Vout) und mit einer Massespannungsreferenz (GND) verbunden ist.
  15. Regulierungsverfahren nach Anspruch 14, dadurch gekennzeichnet, daß in dem Fall, in dem der Diodenteiler (4) erste und zweite Schenkel (5, 6) von Dioden (D1, D2,...; Du, D1', D2', ...., Dd') aufweist, die in Reihenschaltung zueinander in einem Zentralverbindungsanschluß (Y, Z) verbunden sind, der Wert der zu regulierenden Spannung (Vout) von der veränderlichen Referenzspannung (Vref_v) durch folgende Beziehung erhalten wird: Vout = nu + nd nd Vref_v wobei nu, nd die Zahlen von Dioden sind, die in dem ersten und in dem zweiten Schenkel (5, 6) des Diodenteilers (4) enthalten sind.
  16. Regulierungsmethode nach Anspruch 15, dadurch gekennzeichnet, daß dann,
    wenn die Zahlen (nu, nd) der in dem ersten Schenkel und in dem zweiten Schenkel (5, 6) des Diodenteilers (4) enthaltenen Dioden, wobei die Zahlen notwendigerweise natürliche Zahlen sind, von welchem Wert der veränderlichen Referenzspannung (Vref_v) auch immer gefunden werden können, ein gewünschter Wert der regulierten Spannung erhalten wird.
  17. Regulierungsverfahren nach Anspruch 15, dadurch gekennzeichnet, daß, beginnend von einer gegebenen Zahl von Dioden, die sich in dem ersten Schenkel und in dem zweiten Schenkel (5, 6) des Diodenteils (4) befinden, die veränderliche Referenzspannung (Vref_v) verändert werden kann, um einen gewünschten Wert der regulierten Spannung zu erhalten.
EP19970830575 1997-11-05 1997-11-05 Hochspannungsregelungsschaltung und entsprechendes Spannungsregelungsverfahren Expired - Lifetime EP0915408B1 (de)

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EP19970830575 EP0915408B1 (de) 1997-11-05 1997-11-05 Hochspannungsregelungsschaltung und entsprechendes Spannungsregelungsverfahren
DE1997619188 DE69719188T2 (de) 1997-11-05 1997-11-05 Hochspannungsregelungsschaltung und entsprechendes Spannungsregelungsverfahren

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EP19970830575 EP0915408B1 (de) 1997-11-05 1997-11-05 Hochspannungsregelungsschaltung und entsprechendes Spannungsregelungsverfahren

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EP0915408B1 true EP0915408B1 (de) 2003-02-19

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US20180173259A1 (en) * 2016-12-20 2018-06-21 Silicon Laboratories Inc. Apparatus for Regulator with Improved Performance and Associated Methods

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KR930009148B1 (ko) * 1990-09-29 1993-09-23 삼성전자 주식회사 전원전압 조정회로
JP2642512B2 (ja) * 1990-11-16 1997-08-20 シャープ株式会社 半導体集積回路
US5162668A (en) * 1990-12-14 1992-11-10 International Business Machines Corporation Small dropout on-chip voltage regulators with boosted power supply
FR2681180B1 (fr) * 1991-09-05 1996-10-25 Gemplus Card Int Circuit de regulation de tension de programmation, pour memoires programmables.
US5530640A (en) * 1992-10-13 1996-06-25 Mitsubishi Denki Kabushiki Kaisha IC substrate and boosted voltage generation circuits
JP2740626B2 (ja) * 1992-10-13 1998-04-15 三菱電機株式会社 電圧発生回路

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EP0915408A1 (de) 1999-05-12
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