EP0912945A3 - Method and device providing time synchronisation between a processing unit and external means - Google Patents

Method and device providing time synchronisation between a processing unit and external means

Info

Publication number
EP0912945A3
EP0912945A3 EP97934573A EP97934573A EP0912945A3 EP 0912945 A3 EP0912945 A3 EP 0912945A3 EP 97934573 A EP97934573 A EP 97934573A EP 97934573 A EP97934573 A EP 97934573A EP 0912945 A3 EP0912945 A3 EP 0912945A3
Authority
EP
European Patent Office
Prior art keywords
processing unit
device providing
external means
providing time
time synchronisation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP97934573A
Other languages
German (de)
French (fr)
Other versions
EP0912945A2 (en
Inventor
Frédéric Dufal
Pierre-René ROGEL
Michel Remy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telediffusion de France ets Public de Diffusion
Orange SA
Original Assignee
Telediffusion de France ets Public de Diffusion
France Telecom SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telediffusion de France ets Public de Diffusion, France Telecom SA filed Critical Telediffusion de France ets Public de Diffusion
Publication of EP0912945A2 publication Critical patent/EP0912945A2/en
Publication of EP0912945A3 publication Critical patent/EP0912945A3/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
EP97934573A 1996-07-18 1997-07-16 Method and device providing time synchronisation between a processing unit and external means Withdrawn EP0912945A3 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR9609018A FR2751444B1 (en) 1996-07-18 1996-07-18 METHOD AND DEVICE FOR CONTROLLING THE TIME SYNCHRONIZATION BETWEEN A PROCESSING UNIT, FOR EXAMPLE A MICROPROCESSOR, AND EXTERNAL MEANS
FR9609018 1996-07-18
PCT/FR1997/001320 WO1998003922A2 (en) 1996-07-18 1997-07-16 Method and device providing time synchronisation between a processing unit and external means

Publications (2)

Publication Number Publication Date
EP0912945A2 EP0912945A2 (en) 1999-05-06
EP0912945A3 true EP0912945A3 (en) 2002-11-27

Family

ID=9494196

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97934573A Withdrawn EP0912945A3 (en) 1996-07-18 1997-07-16 Method and device providing time synchronisation between a processing unit and external means

Country Status (4)

Country Link
US (1) US6324591B1 (en)
EP (1) EP0912945A3 (en)
FR (1) FR2751444B1 (en)
WO (1) WO1998003922A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7818457B1 (en) * 2001-05-22 2010-10-19 Rockwell Automation Technologies, Inc. Apparatus for multi-chassis configurable time synchronization

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3564161A (en) * 1967-12-14 1971-02-16 Victor Company Of Japan Cue signal recording and reproducing system for magnetic recording and reproducing apparatus
US4315308A (en) * 1978-12-21 1982-02-09 Intel Corporation Interface between a microprocessor chip and peripheral subsystems
US5235698A (en) * 1989-09-12 1993-08-10 Acer Incorporated Bus interface synchronization control system
JP3018404B2 (en) * 1990-06-21 2000-03-13 日本電気株式会社 Microprocessor
US5333299A (en) * 1991-12-31 1994-07-26 International Business Machines Corporation Synchronization techniques for multimedia data streams
US5838894A (en) * 1992-12-17 1998-11-17 Tandem Computers Incorporated Logical, fail-functional, dual central processor units formed from three processor units
FR2725825B1 (en) * 1994-10-12 1997-01-10 Majos Jacques ASYNCHRONOUS MEMORY DEVICE WITH SEQUENTIAL ACCESS AND CORRESPONDING STORAGE AND READING METHOD
US5794002A (en) * 1996-03-22 1998-08-11 Raytheon Company System and technique for synchronizing data to instructions in a real time computing application

Also Published As

Publication number Publication date
EP0912945A2 (en) 1999-05-06
FR2751444A1 (en) 1998-01-23
FR2751444B1 (en) 1998-09-11
WO1998003922A2 (en) 1998-01-29
US6324591B1 (en) 2001-11-27
WO1998003922A3 (en) 2002-10-10

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