EP0851324B1 - A device useful as a master/slave clock for transmitting standard time over a telephone network - Google Patents
A device useful as a master/slave clock for transmitting standard time over a telephone network Download PDFInfo
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- EP0851324B1 EP0851324B1 EP19960309511 EP96309511A EP0851324B1 EP 0851324 B1 EP0851324 B1 EP 0851324B1 EP 19960309511 EP19960309511 EP 19960309511 EP 96309511 A EP96309511 A EP 96309511A EP 0851324 B1 EP0851324 B1 EP 0851324B1
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- time
- data
- clock
- master
- interface
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- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G99/00—Subject matter not provided for in other groups of this subclass
- G04G99/006—Electronic time-pieces using a microcomputer, e.g. for multi-function clocks
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- G—PHYSICS
- G04—HOROLOGY
- G04G—ELECTRONIC TIME-PIECES
- G04G5/00—Setting, i.e. correcting or changing, the time-indication
Definitions
- This invention relates to a device useful as a master slave clock for transmitting standard time over a telephone network and a telephone network incorporating the device for transmitting and receiving standard time.
- Time is one of the several basic quantities from which most physical measurement systems are derived. Others are length, mass and temperature. Unlike other physical quantities it cannot be apprehended by any of the physical senses. For example, we can see distance, feel weight or temperature. But we can know time only through consciousness or observing effects.
- time interval is the duration between two events, or in other words, it is the length of time between two events. Time interval may or may not be associated with a specific date. It is of vital importance for synchronization, the very basic need for efficient communication.
- the second one specifies the particular time at which an event has occurred or will occur.
- Time of a day or date is the most often used term. It is usually presented in a brief form of hour, minute and second, whereas a complete statement of time should also include week, day, month and year. It could also extend to units of smaller than the second going down through milliseconds, microseconds, nanoseconds and picoseconds.
- STFS Time and Frequency Signal
- US 4,125,993 discloses digital display devices and digital timepieces in which the display is remotely updated.
- the remote updating signal can be transmitted through telephone means and a single improved digital display device can be utilised as a master in controlling the display of multiple devices.
- Patent Abstracts of Japan for JP54-041776A discloses a microprocessor system for watches which reduces the power consumption by generating system clocks once every lowest time of the time digits which undergo flow processing in ROM/RAM system.
- the present invention provides a device useful as a master/slave clock for transmitting standard time over a telephone network, which comprises a pulse generator capable of being synchronized with a standard external clock system, wherein the output of the generator is connected directly to and also through an I/O interface to a CPU having RAM and EPROM, wherein the CPU is connected to a keyboard and to a digital display unit through an interface, and wherein said CPU is connected to an interface capable of making the signals compatible for connecting to a telephone modem, characterized in that the EPROM used contains the main programme for the received mode by enabling the initialising process, if required setting the time, activating the interrupts, and thereafter if required receiving the data checking for locking and the EPROM used contains an interrupt service subroutine (RST 6.5) for transmit mode by running the master/slave clock as a master clock activated by a pulse per second signal, setting time and date if commanded through a key entry, and outputting a data stream advanced by 1 second through a serial output data port following a transmission scheme if operated
- the main object of the present invention is to provide a device useful as a master/slave clock for transmitting standard time over a telephone network. Another object is to provide a telephone network incorporating the device for transmitting and receiving standard time.
- synchronization of time is being done through telephone lines.
- digital data is being generated from a standard clock and is transferred through a telephone line.
- Uusers may get their clock synchronized to Indian Standard Time (IST) by dialing the number of the dedicated telephone line.
- Teleclock has its own independent clock based on a good crystal oscillator, which is sufficient to maintain time within one second for a day or two. It has its own automatic dialling system too. It can dial the number and get its clock synchronized to the data transmitted by NPL through a telephone line within few seconds.
- the clock of the user will then run from its new time automatically as soon as the telephone line is disconnected.
- the phase of second pulse or one pulse per second (1pps) of the local clock will also be set within few tens of millisecond if we ignore the propagation delay.
- block 1 is a pulse generator
- block 2 is a central processing unit (CPU) with Random Access Memory (RAM) and Externally programmable read only memory (EPROM)
- block 3 is an input/output (I/O) interface
- block 4 is a key board/display interface
- block 5 is display unit
- block 6 is an interface connected to the modem
- block 7 is a key board.
- the present invention provides a device useful as a master/slave clock for transmitting standard time over a telephone network which comprises a pulse generator (1) capable of being synchronized with a standard external clock system, the output of the generator (1) being connected directly to and also through an I/O interface (3) to a CPU (2) having RAM and EPROM, the CPU (2) being connected to a key board (7) and to a digital display unit (5) through an interface (4), the said CPU (2) being connected to an interface (6) capable of making the signals compatible for connecting to a telephone modem.
- the central processing unit used may be a microprocessor such as Intel (8085,8080,8086), Motorola (68000).
- the block diagram of the telephone network incorporating the device for transmitting and receiving standard time is shown.
- block S depicts the master clock the details of which is shown in fig. 1 of the drawings
- block 9 is a modem
- block 10 is an electronic switch.
- the present invention provides a telephone network incorporating the device for transmitting and receiving standard time which comprises a master/slave clock (8) connected to a telephone network through a modem (9) and an electronic switch (10) at the transmitting end, a slave clock at the receiving end being connected to the said telephone network through a modem (9).
- the device of the present invention is a microprocessor based system which functions through a software, intimately related to its hardware arrangements.
- the system is basically comprised of an independent clock system with a display unit.
- the output of the clock is connected to a modem through RS232C part.
- the oscillator is based on standard crystal ( ⁇ IPPM). 1pps (pulse per second) is generated by dividing the oscillator output by the number same as the frequency value of the oscillator.
- This 1pps actually drives the interrupt subroutine of the microprocessor software to generate the clock (i.e. hour, minute, second) data and to feed them to the display unit.
- the system functions in either master (i.e. transmit) mode or receive (i.e. slave) mode.
- the system dials a known telephone number through modem either at a predecided time or on command.
- the data stream from the transmit/master system starts flowing in.
- the system accepts the data.
- the phase of second pulse of the system clock can be set. This can be achieved by generating a software pulse on identifying the special character.
- the software pulse thus generated is used to reset the clock.
- the clock data stream available from the modem is used to update the current clock data stored in RAM which in turn is used by clock software. After the clock data is "errorlessly" updated , the telephone line is disconnected by a command through Modem.
- the system can be in master mode when the system is not linked with telephone line.
- the clock, system just at the start of the interrupt subroutine, generates the special character virtually coinciding with the phase of the second pulse of the master clock.
- the master clock can be "constantly" set by external master clock system, if necessary.
- the system outputs the stream of clock data in a predefined format through RS232C port. This output can be practically linked to the modem when the status of carrier-detect of the modem is ON.
- the master clock When the clock is in the master mode, the master clock sends out data related to current time through the RS232C port in a definite format so that the receiving slave clock can recognize the pattern.
- the sequence of characters and data those are sent are as follows:
- the dividing counter is started by the incoming MASTER clock's 1pps and after pulse shaping, we get a phase shifted 1pps in the SLAVE clock.
- S", "K” and “G” are signature that precedes the second data (SD), minute data (MD) and hour data (HD) respectively.
- clock operating in the slave mode it receives the data stream from the RS232C port. Since the data is transmitted serially and the ⁇ p can start intercepting data from any point, the necessity of the signature is felt. That is, when any of this signature is recognized, the following two digits would be assumed to be the corresponding hour, minute or second data.
- the above data sequence is repeated four times in a second in order to provide enough redundance and confidence in reliability of the data at the receiving end.
- the carriage return " ⁇ CR> " is not necessary if the receiving end is a slave clock but it is convenient when a computer's internal clock is to be synchronized. However the software is not unduly complicated due to its presence.
- ⁇ CR> is added after each data. The slave takes two sets of data pertaining to current time out of the transmitted five sets of data in a second. It compares the two sets. If any discrepancy is found it throws the whole data and starts afresh.
- the 1pps is actually generated from a 5MHz signal.
- a cascade of frequency divider are used to generate 1pps from 5MHz.
- a frequency divider we have used IC7490 which is a decade counter.
- the divider chain has the provision of being reset by a software 1pps and/or hardware 1pps available from the external source.
- the software pulse helps in aligning the phase of the in built 1pps with that of the received 1pps. This alignment helps in extracting data from the received signal as will be more clarified in the software section.
- the system has in built 5 MHz crystal oscillator.
- phase lock loop (PLL - chip IC564) has been used instead of a simple oscillator.
- the advantage of using the PLL is the following.
- VCO voltage controlled oscillator
- Microprocessor related unit is :
- the system is based on an 8-bit microprocessor.
- the functional block diagram of the system is shown in fig. 1 of drawings.
- the main operation of the microprocessor is in its interrupt mode.
- the interrupt pulse required to run the software is fed from the 1pps signal generator as explained in the later section.
- the microprocessor based clock system is made compatible to other digital systems like computers by the provision of the RS232C port.
- This port serially transmits data related to time through serial output data (SOD) port of the microprocessor. Through serial input data (SID), it receives data.
- SOD serial output data
- SID serial input data
- This port is directly connected to RS232C interface.
- the functional block diagram of a teleclock system shown in fig. 2 comprises of the following main components :
- the RS232C interfacing is done through two pins of the 8085 ⁇ P. These two pins are the serial I/O pins. Since the RS232C is not compatible with TTL logic so we have used the line driver IC1488 and the line receiver IC1489 for interfacing TTL logic with RS232C.
- the data out of SOD of ⁇ P 8085 is of TTL logic level.
- TTL logic In order to make this TTL logic compatible with RS232C it is converted to RS232C by IC 1488.
- the output voltage level of the line driver is decided by its power supply.
- the received RS232C signal is converted to TTL logic by the IC 1489 and is fed to the line of the ⁇ P 8085.
- the RS232C is made compatible with the TTL logic using 1488 and 1489 ICs.
- 8255 is a general purpose I/O interface. It has been configured for only output port. C-low port of 8255 is used for the generation of 1pps by software means.
- the 8279 is used for interfacing keyboard/ display. This is done by software means. When day is entered through keyboard, it is stored in the internal FIFO (First In First Out) memory and an interrupt signal is generated with each entry. This interrupt signal is used to interrupt RST 5.5 of the 8085 ⁇ P. The software for running the keyboard interface is written in the ISS of the RST 5.5.
- FIFO First In First Out
- the display unit is an eight-unit seven segment LED. These are used to display the current time and the status of the different mode of operation through pre-assigned character.
- the software of the teleclock system comprises of the main program and two Interrupt Service Subroutine (ISS) RST 6.5 and RST 5.5.
- ISS Interrupt Service Subroutine
- the main program (see flow chart in fig.3 )after initialising process enables the interrupts RST 6.5 and RST 5.5 and receives the data from serial port if desired.
- the initialising process consists of configuring I/O interface 8255, suitably setting the memory areas and setting the current time through the key entry if required. After enabling the interrupts the program lies in a wait loop with a provision of routing to the slave program whenever necessary.
- the signature of the incoming data is checked. If the incoming signature is "S” then the following data is stored as the second data. Thus after the identification of the signature of "K” and “G” , the minute and hour data are stored respectively. These stored data are used as valid data for time till two consecutive sets of data match exactly.
- the lock flag is set after the availability of valid data.
- the basic clock of the system is a software clock run in the interrupt mode through RST 6.5 (see flow chart in fig.4 ).
- the RST 6.5 is activated by a 1pps signal generated as described in example 2.
- the ISS RST 6.5 updates the clock. One may set the time according to the key entry.
- the data stream following the transmission scheme (as described in example 1) is outputted through the SOD port when the system operates in the master mode.
- the ISS RST 5.5 is executed on entering data through the key board. RST 5.5. ISS actually stores the keyed data in the desired area. The ISS is written in such a way that on pressing the letter "E" the last three data set entered will be displayed on the eight unit 7-segment LED. This has been implemented by the interfacing of ⁇ P 8085 with the 8279.
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Description
- This invention relates to a device useful as a master slave clock for transmitting standard time over a telephone network and a telephone network incorporating the device for transmitting and receiving standard time.
- The requirement of very precise time (of the order of millisecond, microsecond, nanosecond etc.) is limited to users engaged in research in basic science, astronomical studies, space mission, defence activities, etc.. But other than these, most users who are interested in time up to one second accuracy would be interested for such service. Number of such users are many including organizations like Railway Station, Airport, some Supermarkets, some government organizations etc. which arrange public display system for time.
- Time is one of the several basic quantities from which most physical measurement systems are derived. Others are length, mass and temperature. Unlike other physical quantities it cannot be apprehended by any of the physical senses. For example, we can see distance, feel weight or temperature. But we can know time only through consciousness or observing effects.
- When we talk of 'time' it may have two meanings: (i) time interval and (ii) time instant. Therefore, the word time requires some additional terms for clarifications. The first one, (i.e. the time interval) is the duration between two events, or in other words, it is the length of time between two events. Time interval may or may not be associated with a specific date. It is of vital importance for synchronization, the very basic need for efficient communication.
- The second one, the instant of time, specifies the particular time at which an event has occurred or will occur. Time of a day or date is the most often used term. It is usually presented in a brief form of hour, minute and second, whereas a complete statement of time should also include week, day, month and year. It could also extend to units of smaller than the second going down through milliseconds, microseconds, nanoseconds and picoseconds. We can define time as a continuum that lacks spatial dimensions and in which events occur through irreversible succession from past to future through present.
- Accurate and precise means for time information traceable to national and international standards have assumed great importance in recent times. This is due to the demanding uses in various fields. Dissemination means interconnections between the source and the user of time signal. This is like a bridge to make connection between them. Hence to make time accessible to the users the need for time dissemination emerges. There are different types of users depending on the accuracy desired by them. The accuracy desired by them may be of the order of nanoseconds, picoseconds, microseconds, milliseconds and seconds. As the requirement of the order of time accuracy increases the system becomes more complicated and at the same time the cost of the system also increases. The system which can provide highest order of accuracy obviously can serve the purpose of the users requiring lesser order of accuracy. But the use of such a system for the purpose where lower order of accuracy is desired would unnecessarily complicate the system and at the same time the system would be very expensive which is quite undesirable. So, there are several methods of time dissemination having their relative merits and demerits depending mainly on its accuracy, coverage, reliability, ease of use and cost etc. Basic methods of Standard Time and Frequency Signal (STFS) dissemination may be broadly classified into following categories:
- Portable Clocks : It is the most accurate and reliable method of time transfer from the time keeping laboratory to the remote user. In this method a portable clock is synchronized at a reference station and carried to desired place in running condition for comparison. To synchronize a remote clock it becomes imperative to fly the clock to reduce travel time. Thus, this method is expensive and is available on demand. This method is accurate to some tens of nanoseconds.
- Radio Communication: It is the most important method of STFS dissemination. This dissemination technique is used for comparison of remote clock through radio signal. Previous methods are basically meant for point to point communication. But the radio technique has the primary provision of many users' accessibility simultaneously. The radio communication involves ionospheric propagation up to frequencies of 30MHz. If the frequency exceeds 30MHz, the wave propagates in almost a straight line. This is called line of sight propagation (LOS) and forms the basic feature of TV and satellite systems. The satellites are more advantageous than the terrestrial STFS dissemination techniques in terms of global coverage, accuracy of time transfer and propagation feature. Radio communication can be classified as:
- A. High Frequency System
- B. Very Low Frequency System
- C. Satellite System: There are two main categories of STFS dissemination through satellites, e.g.
- (a) Geostationary satellites: Geostationary Satellites are normally used to reflect the time signals. There are two basic techniques of time transfer via Geostationary satellite:
- (i) One way technique : There are two operational STFS dissemination services in one way mode - one via INSAT originated from National Physical Laboratory, India (A.Sen Gupta, A.K. Hanjura and B.S.Mathur (1991) Satellite broadcasting of time and frequency signals Proc. IEEE, 79, 973) and the other is via GOES satellite originated from NIST, Boulder, USA (R.E.Beehler, D.D. Davis and J.B.Milton, GOES satellite time code dissemination Description and operation, NBS Special Publication 250-300, Jan 1998). The time service via INSAT has the time accuracy capability of ten microseconds.
- (ii) Two way technique : Two way technique using MITREX modem has been used for experimental purposes many times to synchronize/compare phasing of seconds pulses of clocks remotely located. This technique amply showed the capability of time comparison accuracy of the order of tens of nanoseconds.
- (b) GPS System : Global Positioning System (GPS) (P.Banerjee et. al. (1994) Monitoring of GPS signals at NPL. New Delhi for precise time comparison, IJRSP, 23, 246) is the most accurate world wide time service. This has the capability of few hundred nanoseconds time at any time everywhere.
- (a) Geostationary satellites: Geostationary Satellites are normally used to reflect the time signals. There are two basic techniques of time transfer via Geostationary satellite:
- Wire Communication : Wire communication means to transmit clock time through wire cables. These are used for driving different clock display systems from one central clock for in-house applications. There are two types of wire communication:
- Parallel Bit Communication : In this form of wire communication one should dedicate one line for each bit of information, thus requiring N lines for N bits. This is the major disadvantage in parallel communication. Thus dissemination of time signals in parallel form is rather inconvenient for longer distance. But circuit for display system is simple and faster.
- Serial Bit Communication : In this case of serial cables there is a pair of wires instead of parallel wires. So bits related to current time data is transmitted sequentially (i.e. one bit at a time is transmitted). This is a slow process and is used in fields where speed is not an important factor. Here the circuit is more involved and thereby it involves more cost. But this is convenient for longer network. These techniques might have been used for local applications but no regular time service using these techniques has been reported yet now.
- An article in Byte, volume 18, no. 11, October 1993 pages 57 to 58, 60 and 62 entitled "Keeping Time on Your PC" discloses a practical method of setting the clock on a PC using a modem.
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US 4,125,993 discloses digital display devices and digital timepieces in which the display is remotely updated. The remote updating signal can be transmitted through telephone means and a single improved digital display device can be utilised as a master in controlling the display of multiple devices. - Patent Abstracts of Japan for
JP54-041776A - README-file for the TIMESET time synchronisation software, Version 7.21, of June 1992 in combination with W. Buchana and A. Wilson: Advanced PC architecture, Addison Wesley 2001, table contents, pages 171-172, 199-203 disclose a device in accordance with the pre-characterizing section of
claim 1. - The present invention provides a device useful as a master/slave clock for transmitting standard time over a telephone network, which comprises a pulse generator capable of being synchronized with a standard external clock system, wherein the output of the generator is connected directly to and also through an I/O interface to a CPU having RAM and EPROM, wherein the CPU is connected to a keyboard and to a digital display unit through an interface, and wherein said CPU is connected to an interface capable of making the signals compatible for connecting to a telephone modem, characterized in that the EPROM used contains the main programme for the received mode by enabling the initialising process, if required setting the time, activating the interrupts, and thereafter if required receiving the data checking for locking and the EPROM used contains an interrupt service subroutine (RST 6.5) for transmit mode by running the master/slave clock as a master clock activated by a pulse per second signal, setting time and date if commanded through a key entry, and outputting a data stream advanced by 1 second through a serial output data port following a transmission scheme if operated in a master mode; wherein the transmission scheme is in a decided format for sending characters and data in a sequence as "O", "<CR>", "S", "<CR>", SD, "<CR>", "K", "<CR>", MD, "<CR>", "G", "<CR>", HD, "<CR>", wherein items within the quotation marks (" ") are characters themselves and SD, MD and HD are two digit data of second, minute and hour respectively, wherein "<CR>" denotes the "command character" carriage return, and wherein the arrival of "O" signifies the phase of the second pulse of the master clock.
- Most of the available services give time accurate to the order of milliseconds, microseconds submicroseconds etc., thereby making it economically nonviable for large number of users' requirement. None of the above mentioned service can serve the requirement of Standard Time display with a very simple and inexpensive means. The Patent-Search has been conducted to survey the existing patents relating the use of time transfer using telephone network. The critical study of the prior patents indicates that none of them is, somehow, not at all connected to the type of applications the present invention is intended to. A new service which is being planned to be launched by the applicant would be a service through which users would be accessed to Standard Time up to one second accuracy with a very simple equipment connected to normal P&T telephone line.This service would be the first of its kind and would be known as TELECLOCK SERVICE.
- The main object of the present invention is to provide a device useful as a master/slave clock for transmitting standard time over a telephone network. Another object is to provide a telephone network incorporating the device for transmitting and receiving standard time.
- In the present invention, synchronization of time is being done through telephone lines. Here digital data is being generated from a standard clock and is transferred through a telephone line. Uusers may get their clock synchronized to Indian Standard Time (IST) by dialing the number of the dedicated telephone line. Teleclock has its own independent clock based on a good crystal oscillator, which is sufficient to maintain time within one second for a day or two. It has its own automatic dialling system too. It can dial the number and get its clock synchronized to the data transmitted by NPL through a telephone line within few seconds. The clock of the user will then run from its new time automatically as soon as the telephone line is disconnected. The phase of second pulse or one pulse per second (1pps) of the local clock will also be set within few tens of millisecond if we ignore the propagation delay.
- In
fig. 1 of the drawings accompanying this specification the block diagram of the device of the present invention which is useful as a master/slave clock is depicted. Infig. 1 , block 1 is a pulse generator,block 2 is a central processing unit (CPU) with Random Access Memory (RAM) and Externally programmable read only memory (EPROM),block 3 is an input/output (I/O) interface,block 4 is a key board/display interface,block 5 is display unit, block 6 is an interface connected to the modem andblock 7 is a key board. Accordingly the present invention provides a device useful as a master/slave clock for transmitting standard time over a telephone network which comprises a pulse generator (1) capable of being synchronized with a standard external clock system, the output of the generator (1) being connected directly to and also through an I/O interface (3) to a CPU (2) having RAM and EPROM, the CPU (2) being connected to a key board (7) and to a digital display unit (5) through an interface (4), the said CPU (2) being connected to an interface (6) capable of making the signals compatible for connecting to a telephone modem. The central processing unit used may be a microprocessor such as Intel (8085,8080,8086), Motorola (68000). - In
fig.2 of the drawings accompanying this specification, the block diagram of the telephone network incorporating the device for transmitting and receiving standard time is shown. Infig. 2 . block S depicts the master clock the details of which is shown infig. 1 of the drawings,block 9 is a modem, block 10 is an electronic switch. Accordingly the present invention provides a telephone network incorporating the device for transmitting and receiving standard time which comprises a master/slave clock (8) connected to a telephone network through a modem (9) and an electronic switch (10) at the transmitting end, a slave clock at the receiving end being connected to the said telephone network through a modem (9). - The device of the present invention is a microprocessor based system which functions through a software, intimately related to its hardware arrangements. The system is basically comprised of an independent clock system with a display unit. The output of the clock is connected to a modem through RS232C part. In the clock, the oscillator is based on standard crystal (∼IPPM). 1pps (pulse per second) is generated by dividing the oscillator output by the number same as the frequency value of the oscillator. This 1pps actually drives the interrupt subroutine of the microprocessor software to generate the clock (i.e. hour, minute, second) data and to feed them to the display unit. The system functions in either master (i.e. transmit) mode or receive (i.e. slave) mode.
- In receive or slave mode, the system dials a known telephone number through modem either at a predecided time or on command. When the line is successfully connected, the data stream from the transmit/master system starts flowing in. The system accepts the data. On receiving a particular character the phase of second pulse of the system clock can be set. This can be achieved by generating a software pulse on identifying the special character. The software pulse thus generated is used to reset the clock. The clock data stream available from the modem is used to update the current clock data stored in RAM which in turn is used by clock software. After the clock data is "errorlessly" updated , the telephone line is disconnected by a command through Modem. The system can be in master mode when the system is not linked with telephone line.
- If the system functions in transmit/master mode, the clock, system, just at the start of the interrupt subroutine, generates the special character virtually coinciding with the phase of the second pulse of the master clock. The master clock can be "constantly" set by external master clock system, if necessary. The system outputs the stream of clock data in a predefined format through RS232C port. This output can be practically linked to the modem when the status of carrier-detect of the modem is ON.
- The following example is given by way of illustration of the device of the present invention and it should not be construed to limit the scope of the present invention.
- When the clock is in the master mode, the master clock sends out data related to current time through the RS232C port in a definite format so that the receiving slave clock can recognize the pattern. The sequence of characters and data those are sent are as follows:
- "O", "<CR>", "S", "<CR>", SD, "<CR>", "K"; "<CR>", MD, "<CR>", "G", "<CR >", HD, "<CR>"
- Items within the " " are characters themselves and SD, MD and HD correspond to two digit data of second. minute and hour respectively. <CR>" denotes the command character "carriage return". The arrival of "O" signifies the phase of the second pulse of the master clock. "O" is received by the slave clock by hardware means. So customarily one software pulse through anyone port of IC8255 would be generated immediately after the identification of "O". This software pulse aligns the phasing of 1pps generation to interrupt RST 6.5 at the receiving end. The technique involved is simple. A crystal oscillator output has to be passed through a frequency divider chain to get the 1pps signal. In this case the dividing counter is started by the incoming MASTER clock's 1pps and after pulse shaping, we get a phase shifted 1pps in the SLAVE clock. "S", "K" and "G" are signature that precedes the second data (SD), minute data (MD) and hour data (HD) respectively. In the case of clock operating in the slave mode, it receives the data stream from the RS232C port. Since the data is transmitted serially and the µp can start intercepting data from any point, the necessity of the signature is felt. That is, when any of this signature is recognized, the following two digits would be assumed to be the corresponding hour, minute or second data. The above data sequence is repeated four times in a second in order to provide enough redundance and confidence in reliability of the data at the receiving end.
- The carriage return " <CR> " is not necessary if the receiving end is a slave clock but it is convenient when a computer's internal clock is to be synchronized. However the software is not unduly complicated due to its presence. In order to make the data format universally compatible <CR> is added after each data. The slave takes two sets of data pertaining to current time out of the transmitted five sets of data in a second. It compares the two sets. If any discrepancy is found it throws the whole data and starts afresh.
- The 1pps is actually generated from a 5MHz signal. A cascade of frequency divider are used to generate 1pps from 5MHz. Here as a frequency divider we have used IC7490 which is a decade counter. The divider chain has the provision of being reset by a software 1pps and/or hardware 1pps available from the external source. The software pulse helps in aligning the phase of the in built 1pps with that of the received 1pps. This alignment helps in extracting data from the received signal as will be more clarified in the software section. The system has in built 5 MHz crystal oscillator. Here phase lock loop (PLL - chip IC564) has been used instead of a simple oscillator. The advantage of using the PLL is the following. If the users have a better frequency source of 5 MHz, it can be fed to input of the PLL to lock the voltage controlled oscillator (VCO) frequency. Thus the generated 1pps becomes more accurate. In the absence of a better external source, VCO of the PLL would anyway behave as a simple oscillator. The 1pps generated by the hardware as described above is used to interrupt RST 6.5 of the µP.
- The system is based on an 8-bit microprocessor. The functional block diagram of the system is shown in
fig. 1 of drawings. The main operation of the microprocessor is in its interrupt mode. The interrupt pulse required to run the software is fed from the 1pps signal generator as explained in the later section. The microprocessor based clock system is made compatible to other digital systems like computers by the provision of the RS232C port. This port serially transmits data related to time through serial output data (SOD) port of the microprocessor. Through serial input data (SID), it receives data. This port is directly connected to RS232C interface. - The functional block diagram of a teleclock system, shown in
fig. 2 comprises of the following main components : - (i) the 8085 Microprocessor chip
- (ii) 8279 Keyboard/ Display interface chip
- (iii) 8255 I/O interface chip
- (iv) RS232C interface chips - 1488 and 1489
- The RS232C interfacing is done through two pins of the 8085 µP. These two pins are the serial I/O pins. Since the RS232C is not compatible with TTL logic so we have used the line driver IC1488 and the line receiver IC1489 for interfacing TTL logic with RS232C.
- The data out of SOD of µP 8085 is of TTL logic level. In order to make this TTL logic compatible with RS232C it is converted to RS232C by IC 1488. The output voltage level of the line driver is decided by its power supply.
- The received RS232C signal is converted to TTL logic by the IC 1489 and is fed to the line of the µP 8085. Thus the RS232C is made compatible with the TTL logic using 1488 and 1489 ICs. 8255 is a general purpose I/O interface. It has been configured for only output port. C-low port of 8255 is used for the generation of 1pps by software means.
- The 8279 is used for interfacing keyboard/ display. This is done by software means. When day is entered through keyboard, it is stored in the internal FIFO (First In First Out) memory and an interrupt signal is generated with each entry. This interrupt signal is used to interrupt RST 5.5 of the 8085 µP. The software for running the keyboard interface is written in the ISS of the RST 5.5.
- The display unit is an eight-unit seven segment LED. These are used to display the current time and the status of the different mode of operation through pre-assigned character.
- The software of the teleclock system comprises of the main program and two Interrupt Service Subroutine (ISS) RST 6.5 and RST 5.5.
- The main program (see flow chart in
fig.3 )after initialising process enables the interrupts RST 6.5 and RST 5.5 and receives the data from serial port if desired. The initialising process consists of configuring I/O interface 8255, suitably setting the memory areas and setting the current time through the key entry if required. After enabling the interrupts the program lies in a wait loop with a provision of routing to the slave program whenever necessary. - In the slave program first the signature of the incoming data is checked. If the incoming signature is "S" then the following data is stored as the second data. Thus after the identification of the signature of "K" and "G" , the minute and hour data are stored respectively. These stored data are used as valid data for time till two consecutive sets of data match exactly. The lock flag is set after the availability of valid data.
- The basic clock of the system is a software clock run in the interrupt mode through RST 6.5 (see flow chart in
fig.4 ). The RST 6.5 is activated by a 1pps signal generated as described in example 2. The ISS RST 6.5 updates the clock. One may set the time according to the key entry. In this ISS program, the data stream following the transmission scheme (as described in example 1) is outputted through the SOD port when the system operates in the master mode. - The ISS RST 5.5 is executed on entering data through the key board. RST 5.5. ISS actually stores the keyed data in the desired area. The ISS is written in such a way that on pressing the letter "E" the last three data set entered will be displayed on the eight unit 7-segment LED. This has been implemented by the interfacing of µP 8085 with the 8279.
- While executing RST 5.5 if 1pps signal arrives then it jumps to RST 6.5 and the program returns back to ISS 5.5 after executing the RST 6.5.
- The main advantages of the present invention are :
- 1. Time display of Standard Time such as IST corrected up to one second is always available.
- 2. The time is corrected through normal telephone network in an auto-dialing or on command.
- 3. This is a very simple and inexpensive system.
- 4. It has independent clock built into the system.
- 5. The Quartz crystal oscillator of the clock is quite stable to maintain the time within a couple of seconds for a week.
- 6. The system is compatible with localized telephone network or standard country wide telephone system.
- 7. The system is compatible with available standard telephone modem.
- The examples given in the specification are only illustrative in nature and should not be construed to limit the scope of the invention. Similarly the hardware used for device is for illustrative purposes and should not be construed to limit the scope of the invention.
Claims (2)
- A device useful as a master/slave clock for transmitting standard time over a telephone network, which comprises a pulse generator (1) capable of being synchronized with a standard external clock system, wherein the output of the generator (1) is connected directly to and also through an I/O interface (3) to a CPU (2) having RAM and EPROM, wherein the CPU (2) is connected to a keyboard (7) and to a digital display unit (5) through an interface (4), and wherein said CPU (2) is connected to an interface (6) capable of making the signals compatible for connecting to a telephone modem,
characterized in that the EPROM used contains the main programme for the received mode by enabling the initialising process, if required setting the time, activating the interrupts, and thereafter if required receiving and checking the incoming data and setting a lock flag after the availability of valid data for time, and the EPROM used contains an interrupt service subroutine (RST 6.5) for transmit mode by running the master/slave clock as a master clock activated by a pulse per second signal, setting time and date if commanded through a key entry, and outputting a data stream advanced by 1 second through a serial output data port following a transmission scheme if operated in a master mode; wherein the transmission scheme is in a predefined format for sending characters and data in a sequence as "O", "<CR>", "S", "<CR>", SD, "<CR>", "K", "<CR>", MD, "<CR>", "G", "<CR>", HD, "<CR>", wherein items within the quotation marks (" ") are characters themselves and SD, MD and HD are two digit data of second, minute and hour respectively, wherein "<CR>" denotes the command character "carriage return," and wherein the arrival of "O" signifies the phase of the second pulse of the master clock. - A device as claimed in claim 1 wherein the central processing unit used is a microprocessor.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP19960309511 EP0851324B1 (en) | 1996-12-27 | 1996-12-27 | A device useful as a master/slave clock for transmitting standard time over a telephone network |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP19960309511 EP0851324B1 (en) | 1996-12-27 | 1996-12-27 | A device useful as a master/slave clock for transmitting standard time over a telephone network |
Publications (2)
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EP0851324A1 EP0851324A1 (en) | 1998-07-01 |
EP0851324B1 true EP0851324B1 (en) | 2012-06-13 |
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EP19960309511 Expired - Lifetime EP0851324B1 (en) | 1996-12-27 | 1996-12-27 | A device useful as a master/slave clock for transmitting standard time over a telephone network |
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US9225344B2 (en) | 2013-01-16 | 2015-12-29 | Altera Corporation | Methods and apparatus for aligning clock signals on an integrated circuit |
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CH1377974A4 (en) * | 1974-10-14 | 1976-10-29 | ||
US4125993A (en) * | 1976-07-02 | 1978-11-21 | Emile Jr Philip | Digital display devices with remote updating |
JPS5441776A (en) * | 1977-09-08 | 1979-04-03 | Sharp Corp | Microprocessor system for watches |
CH641923B (en) * | 1980-02-12 | Ebauches Sa | WATCH EQUIPPED WITH A MICRO-COMPUTER. |
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