EP0844619A3 - Nonvolatile semiconductor memory device having test circuit for testing erasing function thereof - Google Patents
Nonvolatile semiconductor memory device having test circuit for testing erasing function thereof Download PDFInfo
- Publication number
- EP0844619A3 EP0844619A3 EP97120024A EP97120024A EP0844619A3 EP 0844619 A3 EP0844619 A3 EP 0844619A3 EP 97120024 A EP97120024 A EP 97120024A EP 97120024 A EP97120024 A EP 97120024A EP 0844619 A3 EP0844619 A3 EP 0844619A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- semiconductor memory
- nonvolatile semiconductor
- testing
- memory device
- test circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/52—Protection of memory contents; Detection of errors in memory contents
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Read Only Memory (AREA)
- Tests Of Electronic Circuits (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31078596A JP3039400B2 (en) | 1996-11-21 | 1996-11-21 | Nonvolatile semiconductor memory device and method for testing block erase in nonvolatile semiconductor memory device |
JP31078596 | 1996-11-21 | ||
JP310785/96 | 1996-11-21 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0844619A2 EP0844619A2 (en) | 1998-05-27 |
EP0844619A3 true EP0844619A3 (en) | 1999-06-09 |
EP0844619B1 EP0844619B1 (en) | 2004-02-25 |
Family
ID=18009445
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP97120024A Expired - Lifetime EP0844619B1 (en) | 1996-11-21 | 1997-11-14 | Nonvolatile semiconductor memory device having test circuit for testing erasing function thereof |
Country Status (5)
Country | Link |
---|---|
US (1) | US5812460A (en) |
EP (1) | EP0844619B1 (en) |
JP (1) | JP3039400B2 (en) |
KR (1) | KR100313555B1 (en) |
DE (1) | DE69727770T2 (en) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000215688A (en) * | 1999-01-25 | 2000-08-04 | Mitsubishi Electric Corp | Semiconductor test apparatus and method |
US6307787B1 (en) | 2000-07-25 | 2001-10-23 | Advanced Micro Devices, Inc. | Burst read incorporating output based redundancy |
JP3699890B2 (en) * | 2000-08-30 | 2005-09-28 | シャープ株式会社 | Nonvolatile semiconductor memory device |
US6966016B2 (en) * | 2001-04-16 | 2005-11-15 | Advanced Micro Devices, Inc. | System and method for erase test of integrated circuit device having non-homogeneously sized sectors |
US9658788B2 (en) * | 2014-05-28 | 2017-05-23 | Sandisk Technologies Llc | Systems and methods for immediate physical erasure of data stored in a memory system in response to a user command |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0662692A1 (en) * | 1993-12-28 | 1995-07-12 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device |
EP0708451A1 (en) * | 1994-10-04 | 1996-04-24 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2766082B2 (en) * | 1991-02-15 | 1998-06-18 | シャープ株式会社 | Semiconductor storage device |
JP3305771B2 (en) * | 1992-10-26 | 2002-07-24 | 株式会社東芝 | Semiconductor integrated circuit |
JP3496285B2 (en) * | 1994-08-31 | 2004-02-09 | 富士通株式会社 | Flash memory |
JPH08111096A (en) * | 1994-10-12 | 1996-04-30 | Nec Corp | Semiconductor storage device and erasing method therefor |
US5561631A (en) * | 1995-03-03 | 1996-10-01 | Xilinx, Inc. | High-speed minimal logic self blank checking method for programmable logic device |
-
1996
- 1996-11-21 JP JP31078596A patent/JP3039400B2/en not_active Expired - Fee Related
-
1997
- 1997-11-14 DE DE69727770T patent/DE69727770T2/en not_active Expired - Fee Related
- 1997-11-14 EP EP97120024A patent/EP0844619B1/en not_active Expired - Lifetime
- 1997-11-19 US US08/974,670 patent/US5812460A/en not_active Expired - Lifetime
- 1997-11-21 KR KR1019970062055A patent/KR100313555B1/en not_active IP Right Cessation
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0662692A1 (en) * | 1993-12-28 | 1995-07-12 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device |
EP0708451A1 (en) * | 1994-10-04 | 1996-04-24 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
Also Published As
Publication number | Publication date |
---|---|
JP3039400B2 (en) | 2000-05-08 |
EP0844619A2 (en) | 1998-05-27 |
JPH10154400A (en) | 1998-06-09 |
US5812460A (en) | 1998-09-22 |
EP0844619B1 (en) | 2004-02-25 |
DE69727770D1 (en) | 2004-04-01 |
KR100313555B1 (en) | 2001-12-12 |
DE69727770T2 (en) | 2004-11-25 |
KR19980042664A (en) | 1998-08-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0753859B1 (en) | Method for setting the threshold voltage of a reference memory cell | |
KR20020057687A (en) | Flash memory device with cell current measuring scheme using a write driver | |
KR940026971A (en) | Nonvolatile Semiconductor Memory | |
KR940008674U (en) | Burn-in test device for semiconductor memory | |
EP1241678A3 (en) | Built-in self test circuit employing a linear feedback shift register | |
ITTO940048A0 (en) | REDUNACY ANALYZER FOR AUTOMATIC MEMORY TESTER. | |
DE60213070D1 (en) | DESTRUCTION-FREE READING | |
DE69626769D1 (en) | Voltage pump circuit for semiconductor memory device | |
MY117283A (en) | Semiconductor memory device | |
DE69627152D1 (en) | Reading circuit for semiconductor memory cells | |
TW200741212A (en) | Probe card covering system and method for testing integrated circuits | |
EP0844619A3 (en) | Nonvolatile semiconductor memory device having test circuit for testing erasing function thereof | |
DE69514788D1 (en) | Negative word line voltage control circuit for electrically erasable semiconductor memory devices | |
DE69909926D1 (en) | Non-volatile memory device and method for testing it | |
EP1220230A3 (en) | Circuit and method for testing a ferroelectric memory device | |
EP0377840A3 (en) | Nonvolatile semiconductor memory device having reference potential generating circuit | |
TW200608402A (en) | Semiconductor integrated device, and IC card and portable information terminal using the semiconductor integrated device | |
EP0475346A2 (en) | Semiconductor memory device having means for monitoring bias voltage | |
DE50211683D1 (en) | Icher | |
DE69730306D1 (en) | Data write circuit for non-volatile semiconductor memory | |
EP1320105A3 (en) | Semiconductor memory device | |
DE60140289D1 (en) | INDICATIVE DATA BASE MODULE FOR THE INDICATION OF INVESTIGATION RESULTS | |
ES2143862T3 (en) | CIRCUIT PROVISION WITH A TEST CIRCUIT. | |
KR900017038A (en) | EEPROM memory device | |
AU4985697A (en) | Overvoltage detection circuit for test mode selection |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): DE FR GB |
|
AX | Request for extension of the european patent |
Free format text: AL;LT;LV;RO;SI |
|
PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): AT BE CH DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE |
|
AX | Request for extension of the european patent |
Free format text: AL;LT;LV;RO;SI |
|
17P | Request for examination filed |
Effective date: 19990505 |
|
AKX | Designation fees paid |
Free format text: DE FR GB |
|
17Q | First examination report despatched |
Effective date: 20020208 |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: NEC ELECTRONICS CORPORATION |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): DE FR GB |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: FG4D |
|
REF | Corresponds to: |
Ref document number: 69727770 Country of ref document: DE Date of ref document: 20040401 Kind code of ref document: P |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20041109 Year of fee payment: 8 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: GB Payment date: 20041110 Year of fee payment: 8 |
|
ET | Fr: translation filed | ||
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed |
Effective date: 20041126 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20051110 Year of fee payment: 9 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: GB Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20051114 |
|
GBPC | Gb: european patent ceased through non-payment of renewal fee |
Effective date: 20051114 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: FR Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20060731 |
|
REG | Reference to a national code |
Ref country code: FR Ref legal event code: ST Effective date: 20060731 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: DE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20070601 |