EP0830761A4 - - Google Patents

Info

Publication number
EP0830761A4
EP0830761A4 EP96919251A EP96919251A EP0830761A4 EP 0830761 A4 EP0830761 A4 EP 0830761A4 EP 96919251 A EP96919251 A EP 96919251A EP 96919251 A EP96919251 A EP 96919251A EP 0830761 A4 EP0830761 A4 EP 0830761A4
Authority
EP
European Patent Office
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP96919251A
Other versions
EP0830761A1 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of EP0830761A1 publication Critical patent/EP0830761A1/en
Publication of EP0830761A4 publication Critical patent/EP0830761A4/xx
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10Distribution of clock signals, e.g. skew

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Manipulation Of Pulses (AREA)
EP96919251A 1995-06-07 1996-06-07 Clock distribution network utilizing local deskewing clock generator circuitry Withdrawn EP0830761A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/486,935 US6229861B1 (en) 1995-06-07 1995-06-07 Clock distribution network utilizing local deskewing clock generator circuitry
US486935 1995-06-07
PCT/US1996/009663 WO1996041443A1 (en) 1995-06-07 1996-06-07 Clock distribution network utilizing local deskewing clock generator circuitry

Publications (2)

Publication Number Publication Date
EP0830761A1 EP0830761A1 (en) 1998-03-25
EP0830761A4 true EP0830761A4 (en) 1998-04-29

Family

ID=23933717

Family Applications (1)

Application Number Title Priority Date Filing Date
EP96919251A Withdrawn EP0830761A1 (en) 1995-06-07 1996-06-07 Clock distribution network utilizing local deskewing clock generator circuitry

Country Status (8)

Country Link
US (1) US6229861B1 (en)
EP (1) EP0830761A1 (en)
JP (1) JPH11507482A (en)
KR (1) KR100288183B1 (en)
AU (1) AU6164296A (en)
IL (1) IL122413A (en)
TW (1) TW304318B (en)
WO (1) WO1996041443A1 (en)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW419901B (en) * 1997-06-27 2001-01-21 Hitachi Ltd Phase-locked ring circuit, data processing device and data process system
US6137316A (en) * 1998-06-09 2000-10-24 Siemens Aktiengesellschaft Integrated circuit with improved off chip drivers
US6460165B1 (en) * 1999-06-17 2002-10-01 University Of Rochester Model for simulating tree structured VLSI interconnect
US6556249B1 (en) * 1999-09-07 2003-04-29 Fairchild Semiconductors, Inc. Jitter cancellation technique for video clock recovery circuitry
US6731667B1 (en) 1999-11-18 2004-05-04 Anapass Inc. Zero-delay buffer circuit for a spread spectrum clock system and method therefor
KR100331566B1 (en) * 2000-01-22 2002-04-06 윤종용 Clock synchronization circuit and semiconductor device having the clock synchronization circuit
US6536024B1 (en) * 2000-07-14 2003-03-18 International Business Machines Corporation Method for making integrated circuits having gated clock trees
US6650161B2 (en) * 2000-12-28 2003-11-18 Intel Corporation Clock distribution network having regulated power supply
US7174475B2 (en) * 2001-02-16 2007-02-06 Agere Systems Inc. Method and apparatus for distributing a self-synchronized clock to nodes on a chip
US6536025B2 (en) * 2001-05-14 2003-03-18 Intel Corporation Receiver deskewing of multiple source synchronous bits from a parallel bus
US7142621B2 (en) * 2001-10-26 2006-11-28 International Business Machines Corporation Method and circuit for recovering a data signal from a stream of binary data
US6701507B1 (en) * 2001-12-14 2004-03-02 Sequence Design, Inc. Method for determining a zero-skew buffer insertion point
KR100454126B1 (en) * 2002-01-15 2004-10-26 삼성전자주식회사 Information processing system with separated clock line structure
US6657484B1 (en) 2002-05-30 2003-12-02 Texas Instruments Incorporated System and method for decoupling capacitance for an integrated circuit chip
US6703884B2 (en) 2002-05-30 2004-03-09 Texas Instruments Incorporated System and method for distributing a reference clock in an integrated circuit using filtered power supply line
US6882195B2 (en) * 2002-07-12 2005-04-19 Ics Technologies, Inc. Signal timing adjustment circuit with external resistor
US7075365B1 (en) 2004-04-22 2006-07-11 Altera Corporation Configurable clock network for programmable logic device
US8015533B1 (en) * 2004-09-21 2011-09-06 Golden Gate Technology, Inc. Method for matching timing on high fanout signal paths using routing guides
KR100780952B1 (en) * 2006-06-27 2007-12-03 삼성전자주식회사 Appratus and method for deskew, and data receiving apparatus and method by using them
US8205182B1 (en) 2007-08-22 2012-06-19 Cadence Design Systems, Inc. Automatic synthesis of clock distribution networks
KR100915830B1 (en) * 2008-03-12 2009-09-07 주식회사 하이닉스반도체 Semiconductor integrated circuit
JP2015008025A (en) 2013-06-25 2015-01-15 マイクロン テクノロジー, インク. Semiconductor device
US10884450B2 (en) 2018-03-06 2021-01-05 Northrop Grumman Systems Corporation Clock distribution system
US10754371B1 (en) * 2019-11-13 2020-08-25 Northrop Grumman Systems Corporation Capacitive clock distribution system
US11231742B1 (en) 2021-03-08 2022-01-25 Northrop Grumman Systems Corporation Clock distribution resonator system
US11429135B1 (en) 2021-03-11 2022-08-30 Northrop Grumman Systems Corporation Clock distribution system

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06282350A (en) * 1993-01-27 1994-10-07 Hitachi Ltd Intra-lsi clock distributing circuit
US5430397A (en) * 1993-01-27 1995-07-04 Hitachi, Ltd. Intra-LSI clock distribution circuit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CA1301261C (en) 1988-04-27 1992-05-19 Wayne D. Grover Method and apparatus for clock distribution and for distributed clock synchronization
US5376842A (en) 1991-12-20 1994-12-27 Mitsubishi Denki Kabushiki Kaisha Integrated circuit with reduced clock skew and divided power supply lines
US5059818A (en) * 1990-06-01 1991-10-22 Advanced Micro Devices, Inc. Self-regulating clock generator
US5339253A (en) 1991-06-14 1994-08-16 International Business Machines Corporation Method and apparatus for making a skew-controlled signal distribution network
US5307381A (en) 1991-12-27 1994-04-26 Intel Corporation Skew-free clock signal distribution network in a microprocessor
US5298866A (en) 1992-06-04 1994-03-29 Kaplinsky Cecil H Clock distribution circuit with active de-skewing
US5355035A (en) 1993-01-08 1994-10-11 Vora Madhukar B High speed BICMOS switches and multiplexers
US5570054A (en) * 1994-09-26 1996-10-29 Hitachi Micro Systems, Inc. Method and apparatus for adaptive clock deskewing

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06282350A (en) * 1993-01-27 1994-10-07 Hitachi Ltd Intra-lsi clock distributing circuit
US5430397A (en) * 1993-01-27 1995-07-04 Hitachi, Ltd. Intra-LSI clock distribution circuit

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
"NESTED PHASE-LOCK LOOPS FOR BOARD LEVEL CLOCKING", IBM TECHNICAL DISCLOSURE BULLETIN, vol. 37, no. 6A, 1 June 1994 (1994-06-01), pages 349 - 351, XP000455801 *
See also references of WO9641443A1 *

Also Published As

Publication number Publication date
US6229861B1 (en) 2001-05-08
AU6164296A (en) 1996-12-30
WO1996041443A1 (en) 1996-12-19
KR100288183B1 (en) 2001-05-02
IL122413A (en) 2000-08-31
IL122413A0 (en) 1998-06-15
JPH11507482A (en) 1999-06-29
EP0830761A1 (en) 1998-03-25
KR19990022545A (en) 1999-03-25
TW304318B (en) 1997-05-01

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