EP0724225A3 - Arithmetic processing apparatus and arithmetic processing circuit - Google Patents

Arithmetic processing apparatus and arithmetic processing circuit Download PDF

Info

Publication number: EP0724225A3
Authority: EP; European Patent Office
Prior art keywords: arithmetic processing; processing apparatus; processing circuit; circuit; arithmetic
Prior art date: 1995-01-30
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Granted

Application number

EP96300597A

Other languages

German (de)

French (fr)

Other versions

EP0724225B1 (en

EP0724225A2 (en

Inventor

Yukihiko Sakashita

Hayao Ohzu

Akihiro Ouchi

Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)

Canon Inc

Original Assignee

Canon Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1995-01-30

Filing date

1996-01-29

Publication date

1997-07-23

1996-01-29 Application filed by Canon Inc filed Critical Canon Inc

1996-07-31 Publication of EP0724225A2 publication Critical patent/EP0724225A2/en

1997-07-23 Publication of EP0724225A3 publication Critical patent/EP0724225A3/en

2002-04-10 Application granted granted Critical

2002-04-10 Publication of EP0724225B1 publication Critical patent/EP0724225B1/en

2016-01-29 Anticipated expiration legal-status Critical

Status Expired - Lifetime legal-status Critical Current

Links

Classifications

- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/42—Sequential comparisons in series-connected stages with no change in value of analogue signal
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06J—HYBRID COMPUTING ARRANGEMENTS
- G06J1/00—Hybrid computing arrangements
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/80—Simultaneous conversion using weighted impedances
- H03M1/802—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices
- H03M1/804—Simultaneous conversion using weighted impedances using capacitors, e.g. neuron-mos transistors, charge coupled devices with charge redistribution

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
Mathematical Physics (AREA)
Automation & Control Theory (AREA)
Evolutionary Computation (AREA)
Fuzzy Systems (AREA)
General Physics & Mathematics (AREA)
Software Systems (AREA)
Computer Hardware Design (AREA)
Analogue/Digital Conversion (AREA)
Manipulation Of Pulses (AREA)
Logic Circuits (AREA)

EP96300597A 1995-01-30 1996-01-29 Arithmetic processing apparatus and arithmetic processing circuit Expired - Lifetime EP0724225B1 (en)

Applications Claiming Priority (3)

Application Number	Priority Date	Filing Date	Title
JP7012912A JPH08204563A (en)	1995-01-30	1995-01-30	Operation processor
JP12912/95		1995-01-30
JP1291295		1995-01-30

Publications (3)

Publication Number	Publication Date
EP0724225A2 EP0724225A2 (en)	1996-07-31
EP0724225A3 true EP0724225A3 (en)	1997-07-23
EP0724225B1 EP0724225B1 (en)	2002-04-10

Family

ID=11818571

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
EP96300597A Expired - Lifetime EP0724225B1 (en)	1995-01-30	1996-01-29	Arithmetic processing apparatus and arithmetic processing circuit

Country Status (6)

Country	Link
US (1)	US5864495A (en)
EP (1)	EP0724225B1 (en)
JP (1)	JPH08204563A (en)
KR (1)	KR100191449B1 (en)
CN (1)	CN1101991C (en)
DE (1)	DE69620492D1 (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US6456992B1 (en) *	1995-03-24	2002-09-24	Tadashi Shibata	Semiconductor arithmetic circuit
JPH09129864A (en)	1995-10-30	1997-05-16	Canon Inc	Semiconductor device, and semiconductor circuit, correlation operating device and signal processing system which use the semiconductor device
JPH10257352A (en) *	1997-03-15	1998-09-25	Sunao Shibata	Semiconductor arithmetic circuit
JPH11306268A (en) *	1998-04-17	1999-11-05	Sunao Shibata	Semiconductor arithmetic unit
JP4612758B2 (en)	1999-03-26	2011-01-12	キヤノン株式会社	Video signal processing device
US6701340B1 (en) *	1999-09-22	2004-03-02	Lattice Semiconductor Corp.	Double differential comparator and programmable analog block architecture using same
CN101867362B (en) *	2009-04-15	2012-10-17	台湾积体电路制造股份有限公司	Trigger with reduced set-up time
CN101694992B (en) *	2009-10-21	2011-12-07	电子科技大学	Digital self-adaptive dead-time control circuit
EP3391544A4 (en) *	2015-12-17	2019-12-18	Circuit Seed, LLC	Scalable integrated data converter

Citations (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
FR2536922A1 (en) *	1982-11-26	1984-06-01	Efcis	Multifunction logic comparator.
GB2184621A (en) *	1985-12-16	1987-06-24	Crystal Semiconductor Corp	Self-calibration method for capacitors in a monolithic integrated circuit
JPS6481082A (en) *	1987-09-24	1989-03-27	Fuji Photo Film Co Ltd	Arithmetic circuit

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
FR2599526A1 (en) *	1986-05-29	1987-12-04	Centre Nat Rech Scient	MOS adder and MOS binary multiplier comprising at least one such adder
JPH01106517A (en) *	1987-10-19	1989-04-24	Mitsubishi Electric Corp	Comparator
JP2901080B2 (en) *	1989-12-14	1999-06-02	キヤノン株式会社	Photoelectric conversion device
US5466961A (en) *	1991-04-23	1995-11-14	Canon Kabushiki Kaisha	Semiconductor device and method of manufacturing the same
DE69213539T2 (en) *	1991-04-26	1997-02-20	Canon Kk	Semiconductor device with improved insulated gate transistor
JPH05196659A (en) *	1991-11-08	1993-08-06	Yamaha Corp	Chopper type comparator
JPH0629850A (en) *	1992-05-11	1994-02-04	Takayama:Kk	A/d converter
US5343419A (en) *	1992-09-25	1994-08-30	Yozan, Inc.	Analog calculation circuit using timers
JP3055739B2 (en) *	1993-01-13	2000-06-26	シャープ株式会社	Multiplication circuit
DE4402952A1 (en) *	1994-02-01	1994-06-23	Tobias Sander	Analogue=digital converter using voltage comparator stages

1995
- 1995-01-30 JP JP7012912A patent/JPH08204563A/en active Pending
1996
- 1996-01-25 US US08/591,343 patent/US5864495A/en not_active Expired - Fee Related
- 1996-01-29 KR KR1019960001897A patent/KR100191449B1/en not_active IP Right Cessation
- 1996-01-29 DE DE69620492T patent/DE69620492D1/en not_active Expired - Lifetime
- 1996-01-29 EP EP96300597A patent/EP0724225B1/en not_active Expired - Lifetime
- 1996-01-30 CN CN96101104A patent/CN1101991C/en not_active Expired - Fee Related

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
FR2536922A1 (en) *	1982-11-26	1984-06-01	Efcis	Multifunction logic comparator.
GB2184621A (en) *	1985-12-16	1987-06-24	Crystal Semiconductor Corp	Self-calibration method for capacitors in a monolithic integrated circuit
JPS6481082A (en) *	1987-09-24	1989-03-27	Fuji Photo Film Co Ltd	Arithmetic circuit

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 013, no. 309 (P - 898) 14 July 1989 (1989-07-14) *

Also Published As

Publication number	Publication date
KR100191449B1 (en)	1999-06-15
DE69620492D1 (en)	2002-05-16
CN1134629A (en)	1996-10-30
US5864495A (en)	1999-01-26
JPH08204563A (en)	1996-08-09
KR960030025A (en)	1996-08-17
EP0724225B1 (en)	2002-04-10
EP0724225A2 (en)	1996-07-31
CN1101991C (en)	2003-02-19

Legal Events

Date	Code	Title	Description
1996-06-14	PUAI	Public reference made under article 153(3) epc to a published international application that has entered the european phase	Free format text: ORIGINAL CODE: 0009012
1996-07-31	AK	Designated contracting states	Kind code of ref document: A2 Designated state(s): DE FR GB IT NL
1997-06-06	PUAL	Search report despatched	Free format text: ORIGINAL CODE: 0009013
1997-07-23	AK	Designated contracting states	Kind code of ref document: A3 Designated state(s): DE FR GB IT NL
1998-01-28	17P	Request for examination filed	Effective date: 19971203
2001-02-21	GRAG	Despatch of communication of intention to grant	Free format text: ORIGINAL CODE: EPIDOS AGRA
2001-04-11	17Q	First examination report despatched	Effective date: 20010226
2001-08-30	GRAG	Despatch of communication of intention to grant	Free format text: ORIGINAL CODE: EPIDOS AGRA
2001-08-30	GRAH	Despatch of communication of intention to grant a patent	Free format text: ORIGINAL CODE: EPIDOS IGRA
2001-11-19	GRAH	Despatch of communication of intention to grant a patent	Free format text: ORIGINAL CODE: EPIDOS IGRA
2002-01-01	REG	Reference to a national code	Ref country code: GB Ref legal event code: IF02
2002-02-22	GRAA	(expected) grant	Free format text: ORIGINAL CODE: 0009210
2002-04-10	AK	Designated contracting states	Kind code of ref document: B1 Designated state(s): DE FR GB IT NL
2002-04-10	PG25	Lapsed in a contracting state [announced via postgrant information from national office to epo]	Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20020410 Ref country code: IT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRE;WARNING: LAPSES OF ITALIAN PATENTS WITH EFFECTIVE DATE BEFORE 2007 MAY HAVE OCCURRED AT ANY TIME BEFORE 2007. THE CORRECT EFFECTIVE DATE MAY BE DIFFERENT FROM THE ONE RECORDED.SCRIBED TIME-LIMIT Effective date: 20020410 Ref country code: FR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20020410
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2002-09-02	NLV1	Nl: lapsed or annulled due to failure to fulfill the requirements of art. 29p and 29m of the patents act
2003-01-03	EN	Fr: translation not filed
2003-02-15	PLBE	No opposition filed within time limit	Free format text: ORIGINAL CODE: 0009261
2003-02-15	STAA	Information on the status of an ep patent application or granted ep patent	Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT
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2006-01-16	PGFP	Annual fee paid to national office [announced via postgrant information from national office to epo]	Ref country code: GB Payment date: 20060116 Year of fee payment: 11
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