EP0674827A1 - Circuit-board device - Google Patents
Circuit-board deviceInfo
- Publication number
- EP0674827A1 EP0674827A1 EP94929471A EP94929471A EP0674827A1 EP 0674827 A1 EP0674827 A1 EP 0674827A1 EP 94929471 A EP94929471 A EP 94929471A EP 94929471 A EP94929471 A EP 94929471A EP 0674827 A1 EP0674827 A1 EP 0674827A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- heat
- layer
- power component
- circuit board
- plated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0209—External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0207—Cooling of mounted components using internal conductor planes parallel to the surface for thermal conduction, e.g. power planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09572—Solder filled plated through-hole in the final product
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09618—Via fence, i.e. one-dimensional array of vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09663—Divided layout, i.e. conductors divided in two or more parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10166—Transistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
Definitions
- the invention is based on an arrangement consisting of a printed circuit board according to the preamble of the main claim.
- a printed circuit board according to the preamble of the main claim.
- it is often difficult to dissipate the heat generated in one or more power components to a heat sink, since the printed circuit board is covered on at least one of its two surfaces with a large number of conductor tracks carrying different electrical potentials, which one another and with the heat sink must not be short-circuited.
- these plated-through holes are arranged in the area of the contact surface of the power component on the printed circuit board. After the power component has been put in place, these plated-through holes are no longer visible and are inaccessible to test procedures.
- there are difficulties with the electrical insulation which has to be produced by an additional part, which in turn results in heat transfer losses.
- the arrangement according to the invention with the characterizing features of the main claim has the advantage that, at the same time, for good heat dissipation from the power component to a heat sink, electrical isolation of the various power components from one another and also to the mostly metallic heat sink (housing or base plate of the housing) is ensured.
- the electrical insulation is no longer covered, but is clearly visible and can be checked at any time.
- the electrical insulation section can be manufactured with a small tolerance.
- the serial production of the printed circuit board in this form is economical and inexpensive, since it is possible without additional work processes. There is also no need for an additional insulating part, no additional assembly, no expensive internal vias or additional metal cores for heat dissipation.
- the measures listed in the subclaims enable advantageous further developments and improvements of the features specified in the main claim.
- the arrangement is suitable both for multilayer (multilayer) and for simple, double-sided coated printed circuit boards.
- 10 denotes a power component, the component of which is to be dissipated during operation, in particular by the heat generated in the silicon chip 30, ie heat loss.
- the power component 10 and the silicon chip 30 are arranged with the cooling plate 11 integrated in the power component 10, which can be made of metal, for example, on the soldering surface 12 of a printed circuit board 13.
- the printed circuit board 13 is constructed in multiple layers as a so-called multilayer board. It consists of several layers 14, 15, 16 made of electrical insulating material, for example glass fabric.
- a copper layer 21 or 22 is arranged between each of these layers, ie between layers 14 and 15 or between layers 14 and 16.
- another material that is good heat conductor and has electrically conductive properties would also be conceivable.
- the wall of the plated-through holes 18 consists of a thin, heat-conducting and also electrically conductive layer 20.
- an electrical insulation gap 19 is formed between the layer 17 and the layer 20 for the plated-through holes 18. This insulation path 19 is formed in a particularly simple manner in FIG. 1 by interrupting the connection between the layer 17 and the layer 20, ie the layer 17 and the layer 20 are not directly coupled to one another.
- Layer 20 also lies like a tubular rivet on the surface of layers 14, 15, 16.
- a via 18 for heat dissipation is formed on both sides of the power component 10, so that the intermediate layers 21, 22 extend through the printed circuit board 13 from the layer 20 of a via 18 to the layer 20 of the other via 18.
- the power component 10 is surrounded by a plurality of plated-through holes 18 all around, ie in the shape of a frame.
- a copper layer as the bottom layer 23 of the printed circuit board 13 connects the walls 20 of the plated-through holes 18 to one another.
- the printed circuit board 13 is fastened on a cooling element or housing part, not shown in FIG. 1, which serves as a so-called heat sink for dissipating the heat.
- a cooling element or housing part not shown in FIG. 1, which serves as a so-called heat sink for dissipating the heat.
- heat sinks are mostly metallic and electrically leading to ground potential. The corresponding heat flow from the power component 10 to the heat sink is shown in FIG. 1 with the aid of arrows.
- the printed circuit board 13a with the support surface 23a does not rest on the heat sink 35 over the whole area, but has only partial contact with the heat sink 35. This means that the printed circuit board 13a projects beyond the heat sink 35 .
- the printed circuit board 13a is likewise designed as a multilayer printed circuit board, as a so-called multilayer.
- the plated-through holes 18a are also formed laterally next to the power component 10a in the printed circuit board 13a.
- the heat-conducting layer 17a is at least partially in contact with the heat-conducting layer 20a of the plated-through holes 18a.
- the layer 17a on one side is connected to the layer 20a of the vias 18a formed there, while on the other side, ie on the right in FIG. 3, the layer 17a and the layer 20a of the vias 18a located there do not touch.
- the necessary electrical insulation between the power component 10a and the heat sink 35 is now produced in that the heat-conducting layers 22a, 21a and 23a are mutually connected only to the layer 20a of the plated-through holes 18a, while on the other side there is no contact with the layer 20a. This in turn creates an electrical insulation path 19 between the power component 10a and the heat sink 35.
- FIG. 1 In the exemplary embodiment according to FIG.
- FIG. 5a shows a top view of the openings of the plated-through holes 18c and the layer 17c.
- the electrical insulation gap 36a between the layer 17c and the layer 20c of the plated-through holes 18c is visible on the right side of FIG. 5. It can now be seen from FIG.
- FIG. 5b shows that the electrical insulation gap 36b is between the layer 20c of the plated-through holes 18c and the layer 22c on the other side.
- FIG. 5c shows that the insulation gap 36c is again shifted to the right side in the drawing and is located between the layer 21c and the layer 20c of the plated-through holes 18c.
- the base plate 23c is now shown in FIG. 5d and the electrical insulation distance 36d to the layer 20c of the plated-through holes 18c located on the left side is visible. It can thus be seen that in each level and on each heat-conducting layer 21, 22, 23 there is at least one insulation section 19, 36.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Abstract
The aim of the invention is to conduct away the heat produced by the operation of a power component (10) soldered on to a circuit board (13) via a soldering surface (12). To remove the heat, through-contacts (18) are provided which are situated outside the soldering surface (12) and are electrically insulated by a length of insulation (19). These through-contacts (18) ensure good thermal contact through the floor (23) of the circuit board (13) to the heat sink (35). The length of insulation (19) ensures that the contact surface of the power component (10), which is raised to an electrical potential, is separated electrically from the contact surface of the heat sink (35), which is normally earthed. The intermediate layers (21, 22) which will also be present in a multilayer circuit board (13) of conventional design and the use of through-contacts (18) filled with tin further enhance the conduction of heat from the power component (10) to the heat sink (35).
Description
Anordnung bestehend aus einer LeiterplatteArrangement consisting of a printed circuit board
Stand der TechnikState of the art
Die Erfindung geht aus von einer Anordnung bestehend aus einer Lei¬ terplatte nach der Gattung des Hauptanspruchs. Bei bekannten An¬ ordnungen dieser Art bereitet es häufig Schwierigkeiten, die in einem oder mehreren Leistungsbauelementen erzeugte Wärme an eine Wärmesenke abzuführen, da die Leiterplatte an mindestens einer ihrer beiden Oberflächen mit einer Vielzahl von verschiedene elektrische Potentiale führenden Leiterbahnen belegt ist, die untereinander und mit der Wärmesenke nicht kurzgeschlossen werden dürfen. Es ist zum Beispiel aus der DE 35 05 167 AI bekannt, die Wärme des Leistungs¬ bauelements mit Hilfe von Durchkontaktierungen auf die Unterseite der Leiterplatte abzuführen. Diese Durchkontaktierungen sind aber im Bereich der Auflagefläche des Leistungsbauelements auf der Leiter¬ platte angeordnet. Nach Aufsetzen des Leistungsbauelements sind diese Durchkontaktierungen aber nicht mehr sichtbar und für Prüfvor¬ gänge unzugänglich. Ferner ergeben sich Schwierigkeiten mit der elektrischen Isolation, die durch ein zusätzliches Teil hergestellt werden muß, was wiederum Wärmeübergangsverluste zur Folge hat.
Vorteile der ErfindungThe invention is based on an arrangement consisting of a printed circuit board according to the preamble of the main claim. In known arrangements of this type, it is often difficult to dissipate the heat generated in one or more power components to a heat sink, since the printed circuit board is covered on at least one of its two surfaces with a large number of conductor tracks carrying different electrical potentials, which one another and with the heat sink must not be short-circuited. It is known, for example from DE 35 05 167 AI, to dissipate the heat of the power component by means of plated-through holes on the underside of the printed circuit board. However, these plated-through holes are arranged in the area of the contact surface of the power component on the printed circuit board. After the power component has been put in place, these plated-through holes are no longer visible and are inaccessible to test procedures. Furthermore, there are difficulties with the electrical insulation which has to be produced by an additional part, which in turn results in heat transfer losses. Advantages of the invention
Die erfindungsgemäße Anordnung mit den kennzeichnenden Merkmalen des Hauptanspruchs hat demgegenüber den Vorteil, daß gleichzeitig zur guten Wärmeabfuhr vom Leistungsbauelement zu einer Warmesenke eine elektrische Isclation der verschiedenen Leistungsbauelemente unter¬ einander und auch zur meist metallischen Wärmesenke (Gehäuse oder Bodenplatte des Gehäuses) gewährleistet ist. Die elektrische Isola¬ tion ist nicht mehr verdeckt, sondern gut sichtbar und jederzeit überprüfbar. Die elektrische Isolationsstrecke ist mit geringer Toleranz herstellbar. Ferner ist die serienmäßige Herstellung der Leiterplatte in dieser Form wirtschaftlich und preisgünstig, da sie ohne zusätzliche Arbeitsvorgänge möglich ist. Es sind auch kein zu¬ sätzliches Isolierteil, keine zusätzliche Montage, keine teuren innenliegenden Durchkontaktierungen oder zusätzliche Metallkerne zur Wärmeableitung notwendig.The arrangement according to the invention with the characterizing features of the main claim has the advantage that, at the same time, for good heat dissipation from the power component to a heat sink, electrical isolation of the various power components from one another and also to the mostly metallic heat sink (housing or base plate of the housing) is ensured. The electrical insulation is no longer covered, but is clearly visible and can be checked at any time. The electrical insulation section can be manufactured with a small tolerance. Furthermore, the serial production of the printed circuit board in this form is economical and inexpensive, since it is possible without additional work processes. There is also no need for an additional insulating part, no additional assembly, no expensive internal vias or additional metal cores for heat dissipation.
Durch die in den Unteransprüchen aufgeführten Maßnahmen sind vor¬ teilhafte Weiterbildungen und Verbesserungen der im Hauptanspruch angegebenen Merkmale möglich. Die Anordnung eignet sich sowohl für mehrlagige (Multilayer) als auch für einfache, zweiseitig be¬ schichtete Leiterplatten.The measures listed in the subclaims enable advantageous further developments and improvements of the features specified in the main claim. The arrangement is suitable both for multilayer (multilayer) and for simple, double-sided coated printed circuit boards.
Zeichnungdrawing
Ausführungsbeispiele der Erfindung sind in der Zeichnung dargestellt und in der nachfolgenden Beschreibung näher erläutert. Es zeigen Figur 1 einen Vertikalschnitt durch eine Leiterplatte mit einem Leistungsbauelement, Figur 2 eine Draufsicht auf die dem Leistungs¬ bauelement zugewandte Oberseite der Leiterplatte, Figuren 3 und 4 jeweils eine Abwandlung des Ausführungsbeispiels und die Figuren 5a bis 5d jeweils eine Draufsicht auf eine der wärmeleitenden Schichten der Leiterplatte.
Beschreibung der AusführungsbeispieleEmbodiments of the invention are shown in the drawing and explained in more detail in the following description. 1 shows a vertical section through a printed circuit board with a power component, FIG. 2 shows a plan view of the top side of the printed circuit board facing the power component, FIGS. 3 and 4 each show a modification of the exemplary embodiment, and FIGS. 5a to 5d each show a plan view of one of the heat-conducting ones Layers of the circuit board. Description of the embodiments
In der Figur 1 ist mit 10 ein Leistungsbauelement bezeichnet, dessen bei Betrieb, insbesondere durch die im Siliziumchip 30 entstehende Wärme, d.h. Verlustwärme, abgeleitet werden soll. Das Leistungsbau¬ element 10 und der Siliziumchip 30 sind mit der im Leistungsbauele¬ ment 10 integrierten Kühlplatte 11, die zum Beispiel aus Metall be¬ stehen kann, auf der Lötfläche 12 einer Leiterplatte 13 angeordnet. Die Leiterplatte 13 ist mehrschichtig als sogenannte Multi- layer-Platte ausgebildet. Sie besteht aus mehreren Schichten 14, 15, 16 aus elektrischem Isolierstoff, zum Beispiel Glasgewebe. Zwischen diesen Schichten, d.h. zwischen der Schicht 14 und 15 bzw. zwischen der Schicht 14 und 16 ist jeweils eine Kupferschicht 21 bzw. 22 an¬ geordnet. Für die Kupferschicht 21, 22 wäre auch ein anderes Mate¬ rial, das gut wärmeleitend ist und elektrisch leitende Eigenschaften aufweist, denkbar. Ferner befindet sich auch zwischen der Lötfläche 12 für das Leistungsbauelement 10 und der Schicht 15 eine Schicht 17 aus Kupfer. Ferner sind außerhalb der Lötfläche 12 und der Auflage¬ fläche des Leistungsbauelements 10 in der Leiterplatte 13 mehrere Löcher als Durchkpntaktierungen 18 ausgebildet, die durch die ge¬ samte Dicke der Leiterplatte 13 hindurchführen. Die Wand der Durch¬ kontaktierungen 18 besteht aus einer dünnen, wärmeleitenden und auch elektrisch leitenden Schicht 20. Wichtig ist bei der Ausgestaltung nach der Figur 1, daß zwischen der Schicht 17 und der Schicht 20 für die Durchkontaktierungen 18 eine elektrische Isolationsstrecke 19 gebildet wird. In besonders einfacher Weise ist in der Figur 1 diese Isolationsstrecke 19 durch eine Unterbrechung der Verbindung zwischen der Schicht 17 und der Schicht 20 gebildet, d.h. die Schicht 17 und die Schicht 20 sind nicht miteinander direkt ge¬ koppelt. Die Schicht 20 liegt ferner wie ein Rohrniet auf der Ober¬ fläche der Schichten 14, 15, 16 an.
In der Figur 1 ist zu beiden Seiten des Leistungsbauelements 10 eine Durchkontaktierung 18 zur Wärmeableitung ausgebildet, so daß die Zwischenschichten 21, 22 durch die Leiterplatte 13 hindurch von der Schicht 20 einer Durchkontaktierung 18 zur Schicht 20 der anderen Durchkontaktierung 18 reichen. Wie aus der Figur 2 ersichtlich ist, ist das Leistungsbauelement 10 rundherum, d.h. rah enförmig, von mehreren Durchkontaktierungen 18 umgeben. Dies bedeutet jeweils, daß die Zwischenschichten 21, 22 mit der Schicht 20 der Durchkontaktie¬ rungen 18 in Verbindung stehen, während aber die Schicht 17 an keiner Stelle direkten Kontakt mit der Schicht 20 der Durchkontak¬ tierungen 18 Kontakt hat, so daß, weil die Schicht 15 aus elektrisch isolierendem Material besteht, eine elektrische Isolationsstrecke 19 zwischen der Schicht 17 und der Schicht 20 gebildet wird. Die Anzahl der Durchkontaktierungen 18 und ob das Leistungsbauelement 10 rund¬ herum von ihnen umgeben ist, ist von der Menge der abzuführenden Wärme abhängig. Hierzu kann auf die geometrische Anordnung und Aus¬ bildung der Durchkontaktierungen 18 Einfluß gencmmen werden. Auf be- spndere Ausgestaltungen hierzu wird in den Figuren 3 und 5 noch näher eingegangen.In FIG. 1, 10 denotes a power component, the component of which is to be dissipated during operation, in particular by the heat generated in the silicon chip 30, ie heat loss. The power component 10 and the silicon chip 30 are arranged with the cooling plate 11 integrated in the power component 10, which can be made of metal, for example, on the soldering surface 12 of a printed circuit board 13. The printed circuit board 13 is constructed in multiple layers as a so-called multilayer board. It consists of several layers 14, 15, 16 made of electrical insulating material, for example glass fabric. A copper layer 21 or 22 is arranged between each of these layers, ie between layers 14 and 15 or between layers 14 and 16. For the copper layer 21, 22, another material that is good heat conductor and has electrically conductive properties would also be conceivable. Furthermore, there is also a layer 17 of copper between the soldering surface 12 for the power component 10 and the layer 15. Furthermore, outside of the soldering surface 12 and the support surface of the power component 10, a plurality of holes are formed in the printed circuit board 13 as through contacts 18, which lead through the entire thickness of the printed circuit board 13. The wall of the plated-through holes 18 consists of a thin, heat-conducting and also electrically conductive layer 20. In the embodiment according to FIG. 1, it is important that an electrical insulation gap 19 is formed between the layer 17 and the layer 20 for the plated-through holes 18. This insulation path 19 is formed in a particularly simple manner in FIG. 1 by interrupting the connection between the layer 17 and the layer 20, ie the layer 17 and the layer 20 are not directly coupled to one another. Layer 20 also lies like a tubular rivet on the surface of layers 14, 15, 16. In FIG. 1, a via 18 for heat dissipation is formed on both sides of the power component 10, so that the intermediate layers 21, 22 extend through the printed circuit board 13 from the layer 20 of a via 18 to the layer 20 of the other via 18. As can be seen from FIG. 2, the power component 10 is surrounded by a plurality of plated-through holes 18 all around, ie in the shape of a frame. This means in each case that the intermediate layers 21, 22 are connected to the layer 20 of the plated-through holes 18, but the layer 17 is not in direct contact with the layer 20 of the plated-through holes 18 at any point, so that because the Layer 15 consists of electrically insulating material, an electrical insulation path 19 is formed between the layer 17 and the layer 20. The number of plated-through holes 18 and whether the power component 10 is completely surrounded by them depends on the amount of heat to be removed. For this purpose, influence can be exerted on the geometric arrangement and formation of the plated-through holes 18. 3 and 5 will be discussed in more detail in relation to specific configurations.
Ferner verbindet eine Kupferschicht als Bodenschicht 23 der Leiter¬ platte 13 die Wände 20 der Durchkontaktierungen 18 miteinander. Mit Hilfe dieser Bodenschicht 23 ist die Leiterplatte 13 auf einem in der Figur 1 nicht dargestellten Kühlelement oder Gehäuseteil be¬ festigt, das als sog. Wärmesenke zum Ableiten der Wärme dient. Es wäre aber auch möglich, die Leiterplatte 13 frei in einem Gehäuse hängend zu befestigen und so eine Wärmeableitung zu ermöglichen. Diese Wärmesenken sind meist metallisch und elektrisch Massepoten¬ tial führend.
In der Figur 1 ist mit Hilfe von Pfeilen der entsprechende Wärmefluß vom Leistungsbauelement 10 zur Wärmesenke hin eingezeichnet. Die insbesondere am Siliziumchip 30 entstehende Verlustwärme des Leistungsbauelements 10 gelangt von der integrierten Kühlplatte 11, über die Lötfläche 12 in die wärme- und elektrisch leitende Schicht 17 der Leiterplatte 13. Mit Hilfe dieser Schicht 17 wird die Wärme in die Schicht 15 geleitet und über die Schicht aus elektrisch iso¬ lierendem Material 15, die wärmeleitende Schicht 22 zu der wärme¬ leitenden Schicht 20 der Durchkontaktierungen 18 geführt. Von den Durchkontaktierungen 18 wird die Wärme direkt zu der wärmeleitenden Bodenschicht 23 geleitet. Wärme, die insbesondere wegen Sättigung nicht von der Schicht 22 aufgenommen wurde, gelangt in die Schicht 14 aus elektrisch isolierendem Material und wird von der nächsten Schicht 21 aus wärmeleitendem Material aufgenommen und zu der Schicht 20 der Durchkontaktierungen 18 geführt. Von dort wird die Wärme wieder über die Bodenschicht 23 zur Wärmesenke geleitet.Furthermore, a copper layer as the bottom layer 23 of the printed circuit board 13 connects the walls 20 of the plated-through holes 18 to one another. With the aid of this bottom layer 23, the printed circuit board 13 is fastened on a cooling element or housing part, not shown in FIG. 1, which serves as a so-called heat sink for dissipating the heat. However, it would also be possible to fix the circuit board 13 hanging freely in a housing and thus to enable heat dissipation. These heat sinks are mostly metallic and electrically leading to ground potential. The corresponding heat flow from the power component 10 to the heat sink is shown in FIG. 1 with the aid of arrows. The heat loss of the power component 10, which occurs in particular on the silicon chip 30, passes from the integrated cooling plate 11, via the soldering surface 12, into the heat and electrically conductive layer 17 of the printed circuit board 13. With the aid of this layer 17, the heat is conducted into the layer 15 and via the Layer of electrically insulating material 15, the heat-conducting layer 22 to the heat-conducting layer 20 of the plated-through holes 18. The heat is conducted directly from the plated-through holes 18 to the thermally conductive bottom layer 23. Heat, which was not absorbed by layer 22, in particular because of saturation, reaches layer 14 made of electrically insulating material and is absorbed by the next layer 21 made of heat-conducting material and conducted to layer 20 of plated-through holes 18. From there, the heat is conducted back to the heat sink via the bottom layer 23.
Bei dem in der Figur 3 dargestellten Ausführungsbeispiel liegt die Leiterplatte 13a mit der Auflagefläche 23a nicht ganzflächig auf der Warmesenke 35 auf, sondern hat nur teilweise Kontakt mit der Wärme¬ senke 35. Dies bedeutet, daß die Leiterplatte 13a über die Wärme¬ senke 35 hinausragt. Die Leiterplatte 13a ist entsprechend dem Aus¬ führungsbeispiel nach den Figuren 1 und 2 ebenfalls als mehr¬ schichtige Leiterplatte, als sog. Multilayer ausgebildet. Auch sind die Durchkontaktierungen 18a ebenfalls seitlich neben dem Leistungs¬ bauelement 10a in der Leiterplatte 13a ausgebildet. Im Unterschied zum Ausführungsbeispiel nach der Figur 1 hat die wärmeleitende Schicht 17a wenigstens teilweise Kontakt mit der wärmeleitenden Schicht 20a der Durchkontaktierungen 18a. Dies bedeutet, daß die Schicht 17a auf der einen Seite, zum Beispiel in der Figur 3 auf der linken Seite, mit der Schicht 20a der dort ausgebildeten Durch¬ kontaktierungen 18a Verbindung hat, während auf der anderen Seite,
d.h. in der Figur 3 auf der rechten Seite, sich die Schicht 17a und die Schicht 20a der dort sich befindenden Durchkontaktierungen 18a nicht berühren. Die notwendige elektrische Isolierung zwischen dem Leistungsbauelement 10a und der Wärmesenke 35 wird nun dadurch her¬ gestellt, daß die wärmeleitenden Schichten 22a, 21a und 23a jeweils wechselseitig nur mit der Schicht 20a der Durchkontaktierungen 18a verbunden sind, während sie auf der anderen Seite jeweils keinen Kontakt mit der Schicht 20a aufweisen. Dadurch wird wiederum eine elektrische Isolationsstrecke 19 zwischen dem Leistungsbauelement 10a und der Wärmesenke 35 hergestellt. Im Ausführungsbeispiel nach der Figur 3 bedeutet dies nun, daß die Schicht 22a und die Schicht 23a in der Figur auf der linken Seite keinen Kontakt mit der Schicht 20a der sich dort befindlichen Durchkontaktierungen 18a und somit eine Isolationsstrecke 19b bzw. 19c haben. Im Unterschied dazu haben die Schichten 17a und die Schicht 21a auf der rechten Seite in der Figur 3 keinen Kontakt mit der Schicht 20a der Durchkontaktierungen 18a und somit auf dieser Seite eine elektrische Isolationsstrecke 19d und 19e. Dadurch ist wieder sichergestellt, daß ein guter Wärme¬ transport von dem Leistungsbauelement 10a zu der Wärmesenke 35 und gleichzeitig eine elektrische Isolation zwischen dem Leistungsbau¬ element 10a und der Wärmesenke 35 vorhanden ist. Der Wärmetransport selbst ist beim Ausführungsbeispiel nach der Figur 3 entsprechend den Erläuterungen zum Ausführungsbeispiel nach der Figur 1. Eine er¬ hebliche Verbesserung der Wärmeleitung vom Leistungsbauelement 10a zur Wärmesenke 35 kann noch dadurch erreicht werden, daß die Durch¬ kontaktierungen 18a, die nicht auf der Wärmesenke 35 aufliegen, mit wärmeleitendem Material, zum Beispiel Lötzinn 36 ausgefüllt sind.In the exemplary embodiment shown in FIG. 3, the printed circuit board 13a with the support surface 23a does not rest on the heat sink 35 over the whole area, but has only partial contact with the heat sink 35. This means that the printed circuit board 13a projects beyond the heat sink 35 . According to the exemplary embodiment according to FIGS. 1 and 2, the printed circuit board 13a is likewise designed as a multilayer printed circuit board, as a so-called multilayer. The plated-through holes 18a are also formed laterally next to the power component 10a in the printed circuit board 13a. In contrast to the exemplary embodiment according to FIG. 1, the heat-conducting layer 17a is at least partially in contact with the heat-conducting layer 20a of the plated-through holes 18a. This means that the layer 17a on one side, for example in FIG. 3 on the left side, is connected to the layer 20a of the vias 18a formed there, while on the other side, ie on the right in FIG. 3, the layer 17a and the layer 20a of the vias 18a located there do not touch. The necessary electrical insulation between the power component 10a and the heat sink 35 is now produced in that the heat-conducting layers 22a, 21a and 23a are mutually connected only to the layer 20a of the plated-through holes 18a, while on the other side there is no contact with the layer 20a. This in turn creates an electrical insulation path 19 between the power component 10a and the heat sink 35. In the exemplary embodiment according to FIG. 3, this now means that the layer 22a and the layer 23a on the left in the figure have no contact with the layer 20a of the vias 18a located there and thus have an insulation gap 19b or 19c. In contrast to this, the layers 17a and the layer 21a on the right side in FIG. 3 have no contact with the layer 20a of the plated-through holes 18a and thus on this side an electrical insulation path 19d and 19e. This again ensures that there is good heat transport from the power component 10a to the heat sink 35 and at the same time there is electrical insulation between the power component 10a and the heat sink 35. The heat transport itself in the exemplary embodiment according to FIG. 3 corresponds to the explanations for the exemplary embodiment according to FIG. 1. A considerable improvement in the heat conduction from the power component 10a to the heat sink 35 can also be achieved in that the through contacts 18a that are not on the Heat sink 35 lie on, are filled with heat-conducting material, for example solder 36.
Beim Ausführungsbeispiel nach der Figur 4 überdeckt das Leistungs¬ bauelement 10b teilweise die Durchkontaktierungen 18c. Bei diesem Ausführungsbeispiel wird auf die Zugänglichkeit von einigen Durch¬ kontaktierungen 18c verzichtet. Der übrige Aufbau entspricht aber dem nach der Figur 3.
In den Figuren 5a bis 5d ist nun die wechselseitige elektrische Isolierung und somit die Erzeugung einer elektrischen Isolations¬ strecke 19 nochmals erläutert. In Figur 5a ist eine Draufsicht auf die Öffnungen der Durchkontaktierungen 18c und der Schicht 17c zu erkennen. Es ist die elektrische Isolationsstrecke 36a zwischen der Schicht 17c und der Schicht 20c der Durchkontaktierungen 18c, auf der rechten Seite der Figur 5 sichtbar. Aus der Figur 5b ist nun er¬ sichtlich, daß sich die elektrische Isolationsstrecke 36b zwischen der Schicht 20c der Durchkontaktierungen 18c und der Schicht 22c auf der anderen Seite befindet. In der Figur 5c ist verdeutlicht, daß die Isolationsstrecke 36c wieder auf die in der Zeichnung rechten Seite verschoben ist und sich zwischen der Schicht 21c und der Schicht 20c der Durchkontaktierungen 18c befindet. In der Figur 5d ist nun die Grundplatte 23c dargestellt und die elektrische Isola¬ tionsstrecke 36d zu der auf der linken Seite befindlichen Schicht 20c der Durchkontaktierungen 18c sichtbar. Es ist somit erkennbar, daß in jeder Ebene und auf jeder Wärmeleitschicht 21, 22, 23 min¬ destens einmal die Isolationsstrecke 19, 36 besteht.
In the exemplary embodiment according to FIG. 4, the power component 10b partially covers the plated-through holes 18c. In this exemplary embodiment, the accessibility of some through contacts 18c is dispensed with. The remaining structure corresponds to that according to FIG. 3. In FIGS. 5a to 5d, the mutual electrical insulation and thus the generation of an electrical insulation path 19 is now explained again. FIG. 5a shows a top view of the openings of the plated-through holes 18c and the layer 17c. The electrical insulation gap 36a between the layer 17c and the layer 20c of the plated-through holes 18c is visible on the right side of FIG. 5. It can now be seen from FIG. 5b that the electrical insulation gap 36b is between the layer 20c of the plated-through holes 18c and the layer 22c on the other side. FIG. 5c shows that the insulation gap 36c is again shifted to the right side in the drawing and is located between the layer 21c and the layer 20c of the plated-through holes 18c. The base plate 23c is now shown in FIG. 5d and the electrical insulation distance 36d to the layer 20c of the plated-through holes 18c located on the left side is visible. It can thus be seen that in each level and on each heat-conducting layer 21, 22, 23 there is at least one insulation section 19, 36.
Claims
1. Anordnung bestehend aus einer Leiterplatte (13), mindestens einem Leistungsbauelement (10), Lötflächen (12) für die das oder die Leistungsbauelement(e) (10) und mindestens eine Durchkontaktierung (18) durch die Leiterplatte (13) zur Wärmeabfuhr von dem oder den Leistungsbauelement(en) (10) zu einer Wärmesenke (35), dadurch ge¬ kennzeichnet, daß die Durchkontaktierung(en) (18) mindestens teil¬ weise außerhalb der Lötfläche (12) des jeweiligen Leistungsbauele¬ ments (10) ausgebildet sind und daß zwischen dem Leistungsbauelement (10) und der Wärmesenke (35) mindestens eine elektrisch isolierende Unterbrechung (19) besteht.1. Arrangement consisting of a circuit board (13), at least one power component (10), soldering surfaces (12) for the power component (s) (10) and at least one through-hole (18) through the circuit board (13) for heat dissipation the power component (s) (10) to form a heat sink (35), characterized in that the through-connection (s) (18) is at least partially formed outside the soldering surface (12) of the respective power component (10) and that there is at least one electrically insulating interruption (19) between the power component (10) and the heat sink (35).
2. Anordnung nach Anspruch 1, dadurch gekennzeichnet, daß die Lei¬ terplatte (13) aus mehreren Schichten (14, 15, 16) aus elektrisch isolierendem und wärmeleitendem Material besteht und daß von den Durchkontaktierungen (18) Zwischenschichten (21, 22) aus wärme¬ leitendem Material in die Leiterplatte (13) jeweils zwischen den Schichten (14, 15, 16) führen.2. Arrangement according to claim 1, characterized in that the Lei¬ terplatte (13) consists of several layers (14, 15, 16) made of electrically insulating and heat-conducting material and that of the vias (18) intermediate layers (21, 22) lead heat-conducting material into the printed circuit board (13) between the layers (14, 15, 16).
3. Anordnung nach Anspruch 2, dadurch gekennzeichnet, daß die Zwischenschichten (21, 22) eine Schichtdicke von 8 bis 100 um auf¬ weisen. 3. Arrangement according to claim 2, characterized in that the intermediate layers (21, 22) have a layer thickness of 8 to 100 µm.
4. Anordnung nach einem der Ansprüche 1 bis 3, dadurch gekenn¬ zeichnet, daß die Zwischenschichten (21, 22) bis zu anderen Durch¬ kontaktierungen (18) führen.4. Arrangement according to one of claims 1 to 3, characterized gekenn¬ characterized in that the intermediate layers (21, 22) lead to other through contacts (18).
5. Anordnung nach einem der Ansprüche 1 bis 3, dadurch gekenn¬ zeichnet, daß die Zwischenschichten (21, 22) wechselseitig zu den Durchkontaktierungen (18) hin elektrisch isoliert sind.5. Arrangement according to one of claims 1 to 3, characterized gekenn¬ characterized in that the intermediate layers (21, 22) are mutually electrically isolated to the plated-through holes (18).
6. Anordnung nach einem der Ansprüche 1 bis 3, dadurch gekenn¬ zeichnet, daß die Zwischenschichten (21, 22), die Oberfläche (17) und die Grundfläche (23) wechselseitig zu den Durchkontaktierungen (18) hin elektrisch isoliert sind.6. Arrangement according to one of claims 1 to 3, characterized gekenn¬ characterized in that the intermediate layers (21, 22), the surface (17) and the base (23) are mutually electrically insulated to the plated-through holes (18).
7. Anordnung nach Anspruch 5 oder 6, dadurch gekennzeichnet, daß die elektrische Isolation eine Unterbrechung (19) der jeweiligen Schicht (21, 22, 23, 17) ist.7. Arrangement according to claim 5 or 6, characterized in that the electrical insulation is an interruption (19) of the respective layer (21, 22, 23, 17).
8. Anordnung nach einem der Ansprüche 1 bis 7, dadurch gekenn¬ zeichnet, daß die Durchkontaktierungen (18) mit einem wärmeleitenden Material, vorzugsweise Zinn, ausgefüllt sind. 8. Arrangement according to one of claims 1 to 7, characterized gekenn¬ characterized in that the plated-through holes (18) are filled with a heat-conducting material, preferably tin.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4335946 | 1993-10-21 | ||
DE19934335946 DE4335946C2 (en) | 1993-10-21 | 1993-10-21 | Arrangement consisting of a printed circuit board |
PCT/DE1994/001216 WO1995011580A1 (en) | 1993-10-21 | 1994-10-14 | Circuit-board device |
Publications (1)
Publication Number | Publication Date |
---|---|
EP0674827A1 true EP0674827A1 (en) | 1995-10-04 |
Family
ID=6500690
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP94929471A Withdrawn EP0674827A1 (en) | 1993-10-21 | 1994-10-14 | Circuit-board device |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0674827A1 (en) |
JP (1) | JPH08505013A (en) |
DE (1) | DE4335946C2 (en) |
WO (1) | WO1995011580A1 (en) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10315768A1 (en) * | 2003-04-07 | 2004-11-25 | Siemens Ag | Multi-layer circuit board |
DE102005022062A1 (en) | 2005-05-12 | 2006-11-16 | Conti Temic Microelectronic Gmbh | circuit board |
DE102005063281A1 (en) * | 2005-12-30 | 2007-07-05 | Robert Bosch Gmbh | Integrated electronic component, has printed circuit board, and electronic power components that are arranged on board, where board has inner layer, which is made of heat conducting material e.g. solid copper |
DE102007029913A1 (en) | 2007-06-28 | 2009-01-02 | Robert Bosch Gmbh | Electric control unit |
US7808788B2 (en) | 2007-06-29 | 2010-10-05 | Delphi Technologies, Inc. | Multi-layer electrically isolated thermal conduction structure for a circuit board assembly |
JP2009277784A (en) * | 2008-05-13 | 2009-11-26 | Toshiba Corp | Component-embedded printed circuit board, method of manufacturing the same, and electronic apparatus |
JP2011086663A (en) * | 2009-10-13 | 2011-04-28 | Calsonic Kansei Corp | Heat dissipation structure of multilayer substrate |
DE102010030525A1 (en) * | 2010-06-25 | 2011-12-29 | Zf Friedrichshafen Ag | Electronic control module |
DE102010039550A1 (en) * | 2010-08-20 | 2012-02-23 | Zf Friedrichshafen Ag | control module |
DE102010043077A1 (en) * | 2010-10-28 | 2011-11-17 | Continental Automotive Gmbh | Multilayer circuit carrier i.e. printed circuit board, has electronic component and cooling body connected together such that there is no direct electrical connection between metal layer and electronic component |
DE102011077206B4 (en) * | 2011-06-08 | 2019-01-31 | Zf Friedrichshafen Ag | Printed circuit board and control unit for a transmission of a vehicle with the printed circuit board |
DE102014118080B4 (en) * | 2014-12-08 | 2020-10-15 | Infineon Technologies Ag | Electronic module with a heat spreader and method of making it |
DE102015112031B4 (en) * | 2015-07-23 | 2017-08-17 | Halla Visteon Climate Control Corporation | Arrangement for improving a current-carrying capacity of printed conductors |
JP6652844B2 (en) * | 2016-01-26 | 2020-02-26 | 株式会社テクノ高槻 | Multilayer board for air pump and electronic circuit board for air pump |
JP6729044B2 (en) * | 2016-06-20 | 2020-07-22 | 大日本印刷株式会社 | Wiring board, manufacturing method thereof, and manufacturing method of semiconductor device |
DE102017109682A1 (en) * | 2017-05-05 | 2018-11-08 | Schaeffler Technologies AG & Co. KG | heatsink |
AT519741B1 (en) * | 2017-07-18 | 2018-10-15 | Zkw Group Gmbh | Thermal coupling of copper expansion surfaces |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3305167C2 (en) * | 1983-02-15 | 1994-05-05 | Bosch Gmbh Robert | Electrical circuit arrangement with a circuit board |
DE3505167A1 (en) * | 1985-02-15 | 1986-08-28 | GAS Gesellschaft für Antriebs- und Steuerungstechnik mbH & Co KG, 7742 St Georgen | Linear drive |
US4729061A (en) * | 1985-04-29 | 1988-03-01 | Advanced Micro Devices, Inc. | Chip on board package for integrated circuit devices using printed circuit boards and means for conveying the heat to the opposite side of the package from the chip mounting side to permit the heat to dissipate therefrom |
IT1201315B (en) * | 1985-06-17 | 1989-01-27 | M A S Ind Spa | METHOD TO ENSURE THE COOLING OF ELECTRONIC COMPONENTS FIXED ON A MULTILAYER FOR MOLDED AND MULTI-LAYER CIRCUITS REALIZED ACCORDING TO THAT METHOD |
FR2620587B1 (en) * | 1987-09-16 | 1993-07-02 | Telemecanique Electrique | PRINTED CIRCUIT WITH THERMAL DRAIN |
DE3843787A1 (en) * | 1988-12-24 | 1990-07-05 | Standard Elektrik Lorenz Ag | METHOD AND PCB FOR MOUNTING A SEMICONDUCTOR COMPONENT |
US5019941A (en) * | 1989-11-03 | 1991-05-28 | Motorola, Inc. | Electronic assembly having enhanced heat dissipating capabilities |
US5113315A (en) * | 1990-08-07 | 1992-05-12 | Cirqon Technologies Corporation | Heat-conductive metal ceramic composite material panel system for improved heat dissipation |
DE4107312A1 (en) * | 1991-03-07 | 1992-09-10 | Telefunken Electronic Gmbh | Mounting system for power semiconductor device - has heat conductive coupling between heat conductive layer beneath semiconductor device and insulating layer supporting circuit board |
GB2259408A (en) * | 1991-09-07 | 1993-03-10 | Motorola Israel Ltd | A heat dissipation device |
-
1993
- 1993-10-21 DE DE19934335946 patent/DE4335946C2/en not_active Expired - Fee Related
-
1994
- 1994-10-14 JP JP7511179A patent/JPH08505013A/en active Pending
- 1994-10-14 EP EP94929471A patent/EP0674827A1/en not_active Withdrawn
- 1994-10-14 WO PCT/DE1994/001216 patent/WO1995011580A1/en not_active Application Discontinuation
Non-Patent Citations (1)
Title |
---|
See references of WO9511580A1 * |
Also Published As
Publication number | Publication date |
---|---|
JPH08505013A (en) | 1996-05-28 |
DE4335946C2 (en) | 1997-09-11 |
DE4335946A1 (en) | 1995-04-27 |
WO1995011580A1 (en) | 1995-04-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0590354B1 (en) | Device with a board, a heat sink and at least one power component | |
EP0920055B1 (en) | Cooling device for a heat generating component on a printed board | |
EP2043412B1 (en) | Conductor rail with heat conduction | |
EP0558712B1 (en) | Electrical device, especially switching and control device for motor vehicles | |
DE4027072C2 (en) | Semiconductor device | |
DE102012104220B4 (en) | Stacked substrate structure | |
DE4335946C2 (en) | Arrangement consisting of a printed circuit board | |
EP1450404B1 (en) | Assembly in pressure contact with a power semiconductor module | |
DE1933547A1 (en) | Connection device for semiconductor elements | |
DE102011077206B4 (en) | Printed circuit board and control unit for a transmission of a vehicle with the printed circuit board | |
EP2724597B1 (en) | Electronic assembly and method for the production thereof | |
DE102006008807B4 (en) | Arrangement with a power semiconductor module and a cooling component | |
DE4222838C2 (en) | Electrical device, in particular switching and control device for motor vehicles | |
DE102008033465A1 (en) | Semiconductor module with a housing | |
DE19854180A1 (en) | Adaptable planar module case for semiconductor components, e.g. motor control module | |
DE102013100701B4 (en) | SEMICONDUCTOR MODULE ARRANGEMENT AND METHOD FOR MANUFACTURING A SEMICONDUCTOR MODULE ARRANGEMENT | |
DE4004737A1 (en) | ELECTRONIC UNIT WITH ELECTRICALLY INSULATED HEAT EXHAUST | |
DE4021871A1 (en) | HIGHLY INTEGRATED ELECTRONIC COMPONENT | |
DE4326506A1 (en) | Electrical appliance, in particular a switching device or controller for motor vehicles | |
WO2000074446A1 (en) | Intelligent power module | |
EP0881866A1 (en) | Control device | |
EP0136454B1 (en) | Device for the heat dissipation of printed circuit boards | |
DE60315469T2 (en) | Heat dissipating insert, circuit with such an insert and method of manufacture | |
EP0938252A2 (en) | Electrical circuit arrangement | |
DE60020509T2 (en) | ELECTRONIC ASSEMBLY WITH A HEAT PLATE |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): DE FR GB IT SE |
|
17P | Request for examination filed |
Effective date: 19951027 |
|
17Q | First examination report despatched |
Effective date: 19960327 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 19970301 |