EP0598913A1 - Steuerungsverfahren und -schaltung für flüssigkristallelemente und bildanzeigevorrichtung - Google Patents
Steuerungsverfahren und -schaltung für flüssigkristallelemente und bildanzeigevorrichtung Download PDFInfo
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- EP0598913A1 EP0598913A1 EP93911979A EP93911979A EP0598913A1 EP 0598913 A1 EP0598913 A1 EP 0598913A1 EP 93911979 A EP93911979 A EP 93911979A EP 93911979 A EP93911979 A EP 93911979A EP 0598913 A1 EP0598913 A1 EP 0598913A1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3622—Control of matrices with row and column drivers using a passive matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3622—Control of matrices with row and column drivers using a passive matrix
- G09G3/3625—Control of matrices with row and column drivers using a passive matrix using active addressing
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3681—Details of drivers for scan electrodes suitable for passive matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
- G09G2310/0205—Simultaneous scanning of several lines in flat panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2011—Display of intermediate tones by amplitude modulation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
Definitions
- the present invention relates to a drive method, drive circuit, and display apparatus for liquid crystal cells in a liquid crystal display panel, for example.
- Multiplex driving based on the amplitude selective addressing scheme is one known drive method for liquid crystal cells as described above.
- Fig. 45 is an applied voltage waveform diagram showing one example of a prior art drive method for multiplex driving liquid crystal elements in a simple matrix as shown in Fig. 46 by means of an amplitude selective addressing scheme;
- Fig. 45 (a) and (b) are the voltage waveforms applied to row electrodes X1, X2, respectively,
- Fig. 45 (c) is the voltage waveform applied to column electrode Y1,
- Fig. 45 (d) is the voltage waveform applied to the pixel at the intersection of row electrode X1 and column electrode Y1.
- This example sequentially selects row electrodes X1, X2 ... X n one line at a time, and depending whether each pixel on the selected row electrode is ON or OFF applies a corresponding column voltage waveform is applied to each of the column electrodes Y1, Y2 ... Y m to drive.
- Fig. 47 is an applied voltage waveform showing an example of the prior art drive method for simultaneously selecting and driving sequentially plural row electrodes
- Fig. 47 (a) being the row voltage waveform applied to the row electrodes X1, X2, and X3, (b) the row voltage waveform applied to row electrodes row electrodes X4, X5, and X6, (c) being the column voltage waveform applied to column electrode Y1, and (d) being the voltage waveform applied to the pixel at the intersection of row electrode X1 and column electrode Y1.
- This example simultaneously selects the row electrodes three sequential lines at a time for a display as shown in Fig. 46. Specifically, three row electrodes X1, X2, and X3 are first selected, a row voltage as shown in Fig. 47 (a) is applied to these row electrodes X1, X2, and X3, and a specified column electrode is simultaneously applied to each of the column electrodes Y1 ⁇ Y m as described later below. Next, row electrodes X4, X5, and X6 in Fig. 46 are selected and a row voltage such as shown in Fig. 47 (b) is applied as described above, and a column voltage is simultaneously applied to each of the column electrodes Y1 ⁇ Y m . One frame is completed when all row electrodes X1 ⁇ X n are selected, and this operation is then repeated.
- Fig. 48 (a) The voltage waveforms generated based on these values for application to the row electrodes are shown in Fig. 48 (a).
- the waveform shown in Fig. 48 (a) contains dispersions in the frequency component, which can result in display ununiformity when applied.
- Fig. 48 The waveform modified by reordering the array to eliminate the bias in the frequency component is shown in Fig. 48 (b).
- Fig. 47 The prior art example shown in Fig. 47 also uses this waveform.
- the column voltages applied to each of the column electrodes Y1 ⁇ Y m have the same number of row select patterns as the row voltages, and the voltage level of each pulse applies a voltage with a value corresponding to the on/off states of the selected row electrodes.
- an ON state is when the row voltage waveform applied to the simultaneously selected row electrodes X1, X2, and X3 is a positive pulse and an OFF state is when a negative pulse, the ON/OFF states of the display data are compared bit by bit, and the level of the column voltage waveform is set according to the number of mismatches.
- pulse voltages -V Y2 , -V Y1 , V Y1 , and V Y2 are applied when the number of mismatches is 0, 1, 2, and 3, respectively.
- V X1 is the voltage when the pixel is ON and -V X1 is the voltage when OFF in the voltage waveform applied to row electrodes X1, X2, and X3 in Fig. 47
- ON and OFF pixels are represented with a solid and white dot, respectively, in Fig. 46
- the pixels at the intersection of row electrodes X1, X2, and X3 and column electrode Y1 are ON-ON-OFF, respectively, and the initial row select pattern of the voltage applied to these row electrodes X1, X2, and X3 is OFF-OFF-OFF. Because the number of mismatches is two comparing these both in sequence, voltage V Y1 as shown in Fig. 47 (c) is applied as the first row select pattern for the column electrode Y1.
- the second row select pattern of the voltage applied to the row electrodes X1, X2, and X3 is OFF-OFF-ON; because each of these is a mismatch when compared sequentially with the previous ON-ON-OFF pixel display and the number of mismatches is therefore three, voltage V Y2 is applied as the second pulse to column electrode Y1.
- V Y1 is applied as the third pulse, -V Y1 as the fourth pulse, and the following pulses are, in sequence, -V Y2 , V Y1 , - V Y1 , -V Y1 .
- the next three row electrodes X4 ⁇ X6 are then selected, and when the voltage shown in Fig. 47 (b)is applied to these row electrodes X4 ⁇ X6, a column voltage of the voltage level corresponding to the number of mismatches between the on/off states of the pixels at the intersections of row electrodes X4 ⁇ X6 and the column electrode and the on/off states of the voltage row select patterns applied to the row electrodes X4 ⁇ X6 as shown in Fig. 47 (c) is applied.
- values 1 and -1 are used for the positive and negative selection pulses of the row voltage waveform, and -1 and 1 are used for the ON and OFF display data states of pixel, respectively, and the column voltage waveform is set according to the difference between the number of matches and the number of mismatches
- values of 1 or -1 can be used for either, and the column voltage waveform can be set using only the number of matches or the number of mismatches without calculating the difference between the number of matches or the number of mismatches.
- this method of simultaneously selecting and driving plural sequential row electrodes can suppress the drive voltage while achieving the same on/off ratio as the single line selection method shown in Fig. 45.
- the row electrode selection pattern when there are i mismatches is considered below.
- the number of Ci is determined by the number of bits in one word, and not by the row electrode selection pattern.
- V pixel (V column - V row ) or (V row - V column ) where V row is the row voltage and V column is the column voltage.
- V pixel ⁇ Vr - V (i) ⁇ or ⁇ Vr + V (i) ⁇ .
- the specific amplitude applied to the pixel is -(Vr + V (i) ) or (Vr - V (i) ) for the selected line, and V (i) for unselected lines.
- V (i) for unselected lines.
- V (i) is bipolar.
- V pixel V row - V column will decrease with the increase in the number of mismatches.
- the number of mismatches will provide the number of unfavorable voltages (column voltages).
- Ci ⁇ (h-i)/h ⁇ ⁇ Ci
- Ci Ci
- Ci - Bi ⁇ (h-1)! ⁇ / ⁇ i ⁇ (h-i-1)! where h ⁇ i + 1.
- V ON (r,m,s) ⁇ (S1 + S2 + S3)/S4] 1/2
- V OFF (r,m,s) ⁇ (S5 + S6 + S3)/S4 ⁇ 1/2
- the object of the present invention is to provide a drive method, drive circuit, and display apparatus for liquid crystal elements, etc., capable of achieving a good gray scale display even when simultaneously selecting and driving plural sequentially row electrodes.
- a drive method for liquid crystal elements, etc., according to the present invention multiplex drives liquid crystal elements comprising a liquid crystal layer provided between a substrate comprising row electrodes and a substrate comprising column electrodes, and is characterized by dividing the selection period into plural periods, and applying a voltage weighted according to the desired display data in the divided selection periods to achieve a gray scale display.
- a drive circuit for liquid crystal elements, etc., simultaneously selects plural sequential row electrodes to multiplex drive liquid crystal elements formed from a liquid crystal layer provided between a substrate comprising row electrodes and a substrate comprising column electrodes, and is characterized by calculating the selected pulse data generated by the scan data generating circuit and the display data pattern for plural simultaneously selected scan lines by means of an operating circuit, transferring the data based on the calculation result to the column electrode driver and simultaneously transferring the scan data to the row electrode driver to achieve a desired gray scale display.
- the above gray scale display can be achieved simply and reliably.
- a display apparatus simultaneously selects plural sequential row electrodes to multiplex drive liquid crystal elements formed from a liquid crystal layer provided between a substrate comprising row electrodes and a substrate comprising column electrodes, and is characterized by a drive circuit for calculating the selected pulse data generated by the row-select pattern generating circuit and the display data for plural simultaneously selected scan lines by means of an operating circuit, transferring the data based on the calculation result to the column electrode driver and simultaneously transferring the scan data to the row electrode driver, dividing the selection period into plural parts, and applying a weighted column voltage according to the desired display data by the drive circuit to the column electrodes in each of the divided selection periods to achieve a gray scale display, to obtain a desired display.
- Fig. 1 is an applied voltage waveform used to describe the first embodiment of a liquid crystal element drive method according to the present invention
- Fig. 1(a) being the voltage waveform applied to the row electrodes X1, X2, and X3,
- (b) being the voltage waveform applied to row electrodes row electrodes X4, X5, and X6,
- (c) being the voltage waveform applied to column electrode Y1,
- (d) being the voltage waveform applied to the pixel at the intersection of row electrode X1 and column electrode Y1.
- the present embodiment simultaneously selects three sequential row electrodes to achieve the display as shown in Fig. 2.
- waveforms shown in Fig. 48 (a) or (b) can be used as the voltage waveforms applied to the simultaneously selected row electrodes, a waveform as shown in Fig. 1 (a) is used in this embodiment.
- each pulse width becomes narrower.
- the pulse width narrows further, resulting in crosstalk.
- the voltage waveforms applied to the row electrodes are set as described below so that the pulse width is wider.
- the voltage waveforms applied to the row electrodes are decided based on the conditions that:
- the pattern of the applied voltage is appropriately determined from a natural binary, Walsh, Hadamard, or other systems of orthogonal functions considering the above conditions.
- the first is absolute. To satisfy this condition the voltage waveforms applied to each row electrode are generated so that the voltage waveforms applied to each of the row electrodes are orthogonal to each other.
- the applied voltage waveforms shown in Figs. 3 (a) and (b) were determined considering the above conditions.
- the applied voltage waveforms in Fig. 3 (a) contain different frequency components where
- the narrowest pulse width in the waveforms in Fig. 3 (a) and (b) is 2 ⁇ t o , an increase of two times. It is thus possible to reduce the effects of waveform rounding, decrease crosstalk, and increase the number of simultaneously selected row electrodes by increasing the pulse width.
- Fig. 3 (a) and (b) are one example and can be changed as appropriate, and that the row electrode selection sequence and sequence of the row select patterns applied to the row electrodes can also be changed using the properties of the systems of orthogonal functions.
- the row voltage waveform shown in Fig. 1 (a) and (b) forms the voltage waveform applied to the three simultaneously selected row electrodes based on the waveform in Fig. 3 (b).
- the selection period is divided and driven in four parts t1, t2, t3, t4 in one frame.
- Each of the selection periods t1, t2, t3, t4 divided as described above is further divided into plural parts as shown in Fig. 1 (c), and in each of these divided periods a weighted voltage data is applied to the column electrodes Y1 ⁇ Y m to obtain a desired display.
- period t1 is divided into two equal parts to form the two periods a and b, a column voltage specifically weighted for each bit based on the display data shown in Fig. 2 and expressing a four gray scale display with two bits in a binary format is applied during period a for the high bit and to period b for the low bit as shown in Fig. 1.
- V X1 is applied to the row electrode in each ON state
- -V X1 is applied in each OFF state
- the display data value is 0 when OFF and 1 when ON
- the ON/OFF states of the simultaneously selected row electrodes and the ON/OFF state of the display data are compared bit by bit to calculate the number of mismatches
- the voltages applied for the high bit when the number of mismatches is 3, 2, 1, and 0, respectively are V Y4 , V Y2 , -V Y2 , and -V Y4
- the voltages applied for the low bit when the number of mismatches is 3, 2, 1, and 0, respectively are V Y3 , V Y1 , -V Y1 , and -V Y3 .
- the selected pulses applied to row electrodes X1, X2, and X3 are ON, ON, OFF, respectively
- the display data for the pixels at the intersections of column electrode Y1 and row electrodes X1, X2, and X3 are (00), (01), (10), and the high bits are OFF, OFF, ON.
- Comparison shows the number of mismatches is three, and voltage V Y4 is therefore applied to the column electrode Y1 in period a.
- the low bits are OFF, ON, OFF, the number of mismatches compared with the row electrodes is one, and voltage -V Y1 is therefore applied in period b.
- the display data on the row electrodes X1, X2, and X3 is compared with the selected pulses applied to the row electrodes for each of the column electrodes Y1 ⁇ Y m , and a column voltage corresponding to the number of mismatches is applied.
- row electrodes X4, X5, and X6 are simultaneously selected and the corresponding column electrode waveform is applied to the column electrodes.
- the operation returns to the first group of row electrodes X1, X2, and X3 and the specified voltages are sequentially applied following the above sequence in periods t2, t3, and t4.
- the next frame is repeated. Note that the polarity of the applied voltage is reversed in each frame in this embodiment for so-called alternating current drive scheme.
- a good gray scale display with minimal crosstalk can thus be achieved by driving as described above.
- the sequence of the row voltage waveforms applied to the row electrodes in the above periods t1 ⁇ t4 can be changed for all frames or in single frames, and the waveforms shown in Fig. 3 (a) or other waveforms satisfying the conditions described above can be used as the row voltage waveforms applied to the row electrodes.
- two waveforms can alternately used for each group of simultaneously selected row electrodes, for example using the waveform shown in Fig. 3 (a) for row electrodes X1 ⁇ X3 and the waveform shown in Fig. 3 (b) for row electrodes X4 ⁇ X6, or a sequence of three or more waveforms can be used alternately.
- the periods t1 ⁇ t4 can be driven separately in each period as in the above embodiment, or can be driven consecutively in one frame, if the selection period is driven in plural parts within one frame as in the present embodiment, the unselected selection period becomes shorter and contrast can be improved.
- the selection period is divided into four parts t1 ⁇ t4 in the above embodiment, any number of divisions can be used; for example, periods t1 ⁇ t4 can be divided and driven in two parts, or can be divided and driven in more than two parts.
- row electrodes are selected three at a time in sequence of position in the above embodiment, but the number of the selected row elements is an appropriate number and the row electrode do not necessarily need to be selected in sequence of position.
- a drive circuit executing the drive method described above is described based on Figs. 4 ⁇ Fig. 6.
- Fig. 4 is a block diagram showing one example of a drive circuit.
- 1 is the row electrode driver
- 2 is the column electrode driver
- 3 is the frame memory
- 4 is an arithmetic operation circuit
- 5 is the row data generating circuit
- 6 is a latch.
- Fig. 5 is a block diagram of the row electrode driver
- Fig. 6 is a block diagram of the column electrode driver
- 11 and 21 are shift registers
- 12 and 22 are latches
- 13 and 33 are decoders
- 14 and 24 are level shifters.
- each row electrode waveform causes data indicating a positive selection, negative selection, or no selection to be generated from the row data generating circuit 5 and sent to the row electrode driver 1.
- the scan data signal S3 from the row data generating circuit 5 is sent to the level shifter 11 at the scan shift clock signal S5, the data is latched at latch signal S6 after transferring the data for each of the row electrodes in one scanning period, the data expressing the state of each row electrode is decoded, one of three analog switches 15 for each output is set ON, and voltage V X1 , -V X1 , or 0 is selected and output to the row electrode when the selection is positive, negative, or no selection, respectively.
- the display data signal S1 for the three simultaneously selected lines X1, X2, and X3 is read from frame memory 3, the selection pulse data is latched from the display data signal S1 and the scanning data signal S3, and the display data signal S1 and scanning data signal S3 are converted by the arithmetic operation circuit 4. This data conversion is performed as described above, and transferred to the column electrode driver 2.
- the data signal S2 from the arithmetic operation circuit 4 is sent to level shifter 21 at shift clock signal S7, the data is latched at the latch signal S8 after the data is sent to each column electrode in one scanning period, the data expressing the state of each column electrode is decoded, one of the eight analog switches 25 for each output is set ON, and one of the eight voltages V Y4 , V Y3 , V Y2 , V Y1 , -V Y1 , -V Y2 , - V Y3 , and -V Y4 is output to each column electrode.
- a drive method as described above can thus be simply and reliably achieved by using a drive circuit as described above.
- a display apparatus comprising display elements as described above comprises a drive circuit as described above to execute the drive method as described above, a display apparatus capable of achieving a good gray scale display with minimal crosstalk generated can be achieved.
- one of four voltages is selected according to the display data and applied to the column electrodes for each bit of the display data, but by providing a virtual electrode the number of voltage levels applied to the column electrodes can be reduced.
- Fig. 7 is a voltage waveform for an embodiment that drives by reducing the number of voltage levels applied to the column electrodes by providing a virtual electrode
- Fig. 8 illustrates the basis for reducing the number of voltage levels applied to the column electrodes by providing a virtual electrode.
- This embodiment provides, for example, virtual electrodes X n+1 , X n+2 , ... after the simultaneously selected row electrodes as shown in Fig. 8 such that X n+1 , is simultaneously selected when row electrodes X1, X2, and X3, for example are selected, and the number of mismatches is calculated as in the first embodiment assuming voltage V X1 is applied to the row electrode in each ON state, -V X1 is applied in each OFF state, and the display data value is 0 when OFF and 1 when ON. In this case, the number of mismatches is always 1 or 3 by appropriately changing the display state of the virtual electrode.
- the display shown in Fig. 2 is achieved by the waveforms in Fig. 7 applying the above principle.
- the selected pulses applied to row electrodes X1, X2, X3 and virtual electrode X n+1 are ON, ON, OFF, ON, respectively
- the display data for the pixels at the intersections of column electrode Y1 and row electrodes X1, X2, X3 and virtual electrode X n+1 are (00), (01), (10), (11), and the high bits are OFF, OFF, ON, ON.
- Sequential comparison shows the number of mismatches is three; conversion data S2 is therefore generated according to this number of mismatches, and voltage V Y2 is therefore applied to the column electrode Y1 in period a.
- the low bits are OFF, ON, OFF, ON, the number of mismatches compared with the row electrodes is one, conversion data S2 is therefore generated according to this number of mismatches, and voltage -V Y1 is therefore applied in period b.
- the display data on the row electrodes X1, X2, X3 and virtual electrode X n+1 is compared with the selected pulses applied to the row electrodes for each of the column electrodes Y1 ⁇ Y m , and a column voltage corresponding to the number of mismatches is applied.
- row electrodes X4, X5, X6 and X n+2 are simultaneously selected and the corresponding column electrode waveform is applied to the column electrodes.
- the operation returns to the first group of row electrodes X1, X2, and X3 and sequential scanning using the row select pattern shown in t2 continues.
- One frame period is completed by scanning four times with the row select patterns shown in t1, t2, t3, and t4, and the same operation is repeated in the next frame.
- the number of voltage levels applied to the column electrodes can be made less than that of the first embodiment.
- That the number of voltage levels applied to the column electrodes can be reduced by providing a virtual electrode as described above can also be applied to each of the embodiments described below.
- the same drive circuit used in the first embodiment can be used in the present embodiment and each of the embodiments described below.
- the arithmetic operation circuit 4 in Fig. 4 is comprised to execute data processing according to each of the embodiments, the voltage levels of the row electrode driver in Fig. 5 and the column electrode driver in Fig. 6 are provided according to each embodiment, and one of the voltage levels is selected by analog switches 15, 25.
- the arithmetic operation circuit 4 in Fig. 4 and the row electrode driver in Fig. 5 are the same as those of the first embodiment, but while eight voltage levels V Y4 , V Y3 , V Y2 , V Y1 , -V Y1 , -V Y2 , -V Y3 , and -V Y4 are provided in the column electrode driver of the first embodiment in Fig. 6, it is sufficient to provide four voltage levels V Y2 , V Y1 , -V Y1 , and -V Y2 in the present embodiment.
- the above embodiment achieves a gray scale display by changing the voltage value according to the display data, but a gray scale display can also be achieved by changing the pulse width.
- Fig. 9 is an applied voltage waveform of an embodiment achieving a gray scale display by changing the pulse width.
- the period ⁇ t of each pulse is divided into f periods of unequal duration to achieve a gray scale display by means of pulse width modulation.
- ⁇ t g 2 g-1 / (2 f - 1) where f is the bit number of gradations.
- d1 (d 1,f , d 1,f-1 ... d 1,1 )
- d2 (d 2,f , d 2,f-1 ... d 2,1 )
- d h (d b,f , d h,f-l ... d h,l )
- Each bit of the row electrode selection patterns and the data patterns are then compared at an interval of ⁇ t g .
- Bit d 1,2 and the row electrode selection pattern are then compared, and applied to the display for period ⁇ t2.
- Fig. 9 based on the present embodiment achieves a four gray scale display as shown in Fig. 2 using pulse width modulation as described above.
- the row voltage applied to the row electrodes X1 ⁇ X n is the same as in the prior art example illustrated in Fig. 47, and the pulse widths of the corresponding column electrodes Y1 ⁇ Y m are modulated according to the gray scale display as above.
- each pulse width ⁇ t is divided into three equal parts, a gray scale display with four gradations 0 ⁇ 3 is expressed using the 2-bit binary display data expressions (00), (01), (10), (11).
- the signal voltage level of two of the three pulse width parts is determined based on the number of mismatches between the on/off state of the simultaneously selected row electrodes and the high bit state of the display data.
- the signal voltage level of the remaining one part is determined based on the number of mismatches between the ON/OFF state of the row electrodes and the low bit state. Variations in the brightness of the gray scale display can also be corrected by equally reducing the three parts.
- the high bit states are OFF, OFF, ON, the number of mismatches is one, and the voltage pulse during period ⁇ t2 is -V Y1 . It is thus sufficient to obtain the voltage pulse applied to the column electrodes by a comparison executed each selection period ⁇ t.
- the voltage for the high bit is applied during the latter two of the three period divisions, and the voltage for the low bit is applied during the first of the three period divisions.
- the selection period can also be divided into plural units each frame as described in the first embodiment above to drive a gray scale display.
- FIG. 11 An example of such application is shown in Fig. 11.
- the voltage waveforms of eight row select patterns (blocks) applied to the row electrodes and column electrodes in the embodiment shown in Fig. 9 are divided into eight equal intervals each row select pattern.
- the contrast can be improved as in the previous embodiment.
- the four voltage levels V Y2 , V Y1 , -V Y1 , and -V Y2 are used as the column electrode voltage levels in the third and fourth embodiments above, but this number of voltage levels can be further reduced by providing a virtual electrode as in the second embodiment.
- Fig. 12 shows an example that provides a virtual electrode in the third embodiment to reduce the number of voltage levels applied to the column electrode, and is driven by dividing the selection period in to plural parts within one frame as in the fourth embodiment.
- e column electrodes are operated as virtual row electrodes (virtual lines).
- virtual row electrodes virtual lines.
- V column is h + 1 levels.
- Original voltage level Original number of mismatches
- Virtual row electrode Number of mismatches after correction Voltage level after correction -V Y2 0 Match 0 Va -V Y1 1 Mismatch 2 Vb V Y1 2 Match 2 Vb V Y2 3 Mismatch 4 Vd
- the original four voltage levels can be reduced to three. If the number of mismatches is controlled to be odd, the number of mismatches after correction will change in the above table to 1, 1, 3, 3 (from the top), and there will be only two voltage levels (Va, Va, Vb, Vb from the top) after correction.
- the original number of voltage levels can thus be reduced from five to three. Note that the voltage levels can also be set by controlling the number of mismatches to be odd.
- the virtual row electrodes can be provided in an area not affecting the display.
- the virtual row electrodes X n+1 ... are provided outside the display area R as shown in Fig. 13.
- any extra row electrodes outside the normal display area R can also be used as virtual row electrodes.
- the number of voltage levels can be further reduced by increasing the number e of virtual row electrodes.
- the present embodiment as shown in Fig. 12 simultaneously selects three row electrodes and one virtual electrode to reduce the number of voltage levels applied to the column electrodes, and drives by dividing the selection period into plural parts in one frame.
- the present embodiment divides the selection period into four parts in one frame, and the number of mismatches with the display data is counted bit by bit for four row electrodes, including the virtual row electrode, in each of the four partial periods to adjust the number of mismatches to an odd number.
- the number of mismatches is thus either 1 or 3, and the voltage level of the column voltage waveform is therefore one of two levels, V Y1 or -V Y1 .
- the virtual row electrode X n+1 follows after the first three selected row electrodes X1, X2, and X3 as shown in Fig. 8. Note that it is not essential for the virtual row electrode to be previously provided, but that when it is the virtual row electrode is preferably provided outside the display area R.
- each of the selection periods ⁇ t is divided into three parts, and the display data on the simultaneously selected row electrodes X1, X2, and X3 is (00), (01), (10) as shown in Fig. 13, the data for the virtual row electrode is (11) as shown in Fig. 8.
- the number of mismatches is then counted bit by bit to determine either voltage level V Y1 or -V Y1 , and the voltages for the high bits are applied for the latter two of the three period divisions and the voltage for the low bit is applied for the first one period division. Note that, as in the third embodiment, it is also possible to apply the voltage for the high bit in the first two period divisions and to apply the voltage for the low bit in the last one period division.
- the present embodiment can reduce the number of voltage levels applied to the column electrodes, specifically to two in the above embodiment, by always setting the number of mismatches between the display data and the row select pattern of the selected pulse applied to the virtual row electrode to 1, 3, or some other odd number. Note that an even number of mismatches can be alternatively used.
- a display with a larger number of gradations is also possible.
- an eight gray scale display can be achieved by using 3-bit display data and dividing each selection period into three parts weighted to the pulse width of each display data bit.
- a display with 16 gradations can be achieved by using 4-bit display data and dividing each selection period into four parts weighted to the pulse width of each display data bit.
- a gray scale display is possible by changing the number of divisions each selection period is divided into.
- Providing a virtual electrode as in the fifth embodiment above to reduce the number of voltage levels applied to the column electrodes while also using pulse width modulation to achieve a gray scale display can also be applied to the case wherein a row voltage as in the first embodiment is applied to the simultaneously selected row electrodes, and an example of this is shown in Fig. 14.
- each of the selection periods t1 ⁇ t4, t5 ⁇ t8 is divided into three parts, and when the display data of the simultaneously selected row electrodes X1, X2, and X3 is (00), (01), (10) as shown in Fig. 13, it is sufficient for the data of the virtual electrode to be (11) as shown in Fig. 8.
- V Y1 or -V Y1 is applied as the voltage for the high bit in two of the three period divisions and the voltage for the low bit in one period division.
- selection periods t1 ⁇ t4 may be provided consecutively in one frame F, or separately in one frame F. The same is true of selection periods t5 ⁇ t8.
- Fig. 15 shows an embodiment whereby the number of voltage levels applied to the column electrodes is reduced using three sequential row electrodes and one virtual row electrode similarly to the sixth embodiment, and drives the display by dividing the selection period into plural parts within one frame, achieving a gray scale display by means of frame rate control modulation.
- waveform shown in Fig. 3 (b) is used as the voltage waveform applied to the simultaneously selected row electrodes in this embodiment, the waveform shown in Fig. 3 (a) or Fig. 48 (a) or (b) can also be used.
- a gray scale display based on frame rate control modulation turns some frames on and some frames off during any given frame period, and in the example shown in Fig. 16, a gradation between on and off is displayed by applying an ON voltage during F1 and an OFF voltage during F2.
- the brightness difference between F1 and F2 is also reduced and flicker becomes less noticeable because the fields are selected four times during one frame.
- the position of the selection pulse can be changed within the plural frames, and the difference between frames can be reduced by interchanging periods t3 and t7, for example, in Fig. 15.
- gray scale display was achieved by turning one of two frames ON and one frame OFF in the above embodiment, more frames, for example 7 frames, can be grouped in one block to achieve an 8 gray scale display by changing the number of ON and OFF frames within the block, or 15 frames can be grouped in one block to achieve a 16.
- a display with the desired number of gradations is possible depending on the number of frames of one block.
- Fig. 13 shows an embodiment whereby the number of voltage levels applied to the column electrodes is reduced using three sequential row electrodes and one virtual row electrode similarly to the fifth embodiment, and drives the display by dividing the selection period into plural parts within one frame, achieving a gray scale display by means of frame rate control modulation.
- Display flicker can be reduced and a multiple gray scale display can be achieved by thus dividing the selection period and reducing the number of applied voltage levels, and combining pulse width modulation with frame rate control modulation for the gray scale display. Note also that the order of the selection pulses can be changed as in the sixth embodiment above.
- a gray scale display can still be achieved by means of frame rate control modulation or by a combination of frame rate control modulation and pulse width modulation even when a virtual row electrode is not provided.
- Fig. 19 is the column electrode waveform when the display data for the pixels at the intersection of the row electrodes X1, X2, and X3 and column electrode Y1 are (001), (010), (100) and the row electrode waveform applied to each of the row electrodes in Fig. 2 is the same as that of the first embodiment.
- the four selection periods t1 ⁇ t4 in the first embodiment are each divided into three equal periods a, b, c, and the voltage waveform corresponding to the highest of the three display data bits is applied in the first period division a, the voltage waveform corresponding to the middle bit is applied in the next period division b, and the voltage waveform corresponding to the lowest bit is applied in the last period division c; each of these voltage waveforms is weighted according to each of the display data bits as in the first embodiment.
- one of the voltages -V Y6 , -V Y4 , V Y4 , or V Y6 is selected for period a according to the highest display data bit
- one of the voltages -V Y5 , -V Y2 , V Y2 , or V Y5 is selected for period b according to the middle display data bit
- one of the voltages -V Y3 , -V Y1 , V Y3 , or V Y1 is selected for period c according to the lowest display data bit.
- an eight gray scale display can be achieved as in the first embodiment by generating the column electrode waveform based on the number of mismatches in each bit of the display data.
- a four gray scale display is obtained in the first embodiment by selecting a voltage for each of the two equal periods into which the selection period is divided, and applying this voltage to the column electrode, but in the present embodiment an eight gray scale display is obtained by dividing the selection period into three equal parts.
- a sixteen gray scale display can be obtained by dividing the selection period into four equal parts, and as this indicates, the number of gradations can be increased by appropriately dividing the selection period into plural parts and applying a voltage selected for each of these parts to the column electrode.
- the brightness level of each gradation can also be adjusted by changing the voltage ratio applied to each column electrode, or by slightly changing the duration of each part into which the selection period is divided instead of using equal parts.
- a voltage is applied according to each bit in sequence from the high bit in the periods a, b, c, divided according to the number of display data bits, but this sequence can be appropriately changed for each column electrode.
- the column voltage waveforms applied to the column electrodes Y1 ⁇ Y m will all be identical to the waveforms shown in Fig. 19. However, rounding of the waveform applied to each pixel becomes great in this case, and display quality deteriorates.
- the voltage corresponding to the highest of the three display data bits is applied in sequence to column electrode Y1 during period a in Fig. 20, the voltage corresponding to the middle bit during period b, and the voltage corresponding to the lowest bit during period c.
- the same is true of the other column electrodes Y1 ⁇ Y m .
- the order is changed for the next column electrode, for example to (a, c, b) for column electrode Y2, (b, a, c) for column electrode Y3, (b, c, a) for column electrode Y4, (c, a, b) for column electrode Y5, and (c, b, a) for column electrode Y6, and similar combinations are repeated for Y7 ⁇ Y m .
- any combination of waveforms applied to the column electrodes can used such that, for example, if there are six column electrode drivers, each combination of waveforms is applied to each column electrode driver.
- display quality can be improved if the number of rounding rises and falls cancel each other in the combination of waveforms applied to the respective column electrodeds.
- an eight gray scale display is obtained using a waveform as shown in Fig. 1(a), i.e., as shown in Fig. 3 (b), as the row voltage waveform applied to the row electrodes, but the waveform shown in Fig. 3 (a) or in the Fig. 48 (a) or (b) for the prior art method can also be used.
- the waveform shown in Fig. 3 (a) is used for an eight gray scale display is described in further detail below.
- Fig. 21 is an applied voltage waveform of the embodiment achieving an eight gray scale display based on the display data shown in Fig. 22 and using the waveform shown in Fig. 3 (a) as the row voltage waveform applied to the row electrodes.
- Fig. 21 (a) shows the row voltage waveform applied to row electrodes X1, X2, and X3,
- Fig. 21 (c) is the column voltage waveform applied to column electrode Y1
- Fig.21 (d) is the voltage waveform applied to the pixels at the intersection of row electrode X1 and column electrode Y1.
- This embodiment also simultaneously selects three sequential row electrodes, and while only the three row electrodes X1, X2, and X3 are shown in Fig. 21, the next three row electrodes X4, X5, and X6 are selected after row electrodes X1, X2, and X3 are selected as shown in Fig. 23, and a voltage is applied to these electrodes similarly to row electrodes X1, X2, and X3. Thereafter, the row electrodes are selected in order three at a time, and one frame ends when all row electrodes have been selected.
- the minimum pulse width ⁇ t is twice the minimum pulse width ⁇ t o of the prior art method shown in Fig. 48 as described above, and all selection periods t for each of the row electrodes in one frame comprise four periods t1 ⁇ t4 of the size of pulse width ⁇ t.
- the above four periods t1 ⁇ t4 are each divided into three periods a, b, c according to the number of bits of display data, and a column voltage specifically weighted according to the bits of the display data is applied to the column electrode in each of these period divisions.
- the high bit of the display data which is expressed as a three digit binary number as shown in Fig. 22, corresponds to the first period division a of each period t1 ⁇ t4, the middle bit corresponds to the next period division b, and the low bit corresponds to the last period division c, and the specifically weighted voltage ⁇ V Y4 or ⁇ V Y6 is applied according to the conditions described below for the high bit ⁇ V Y2 or ⁇ V Y5 is applied for the middle bit, and ⁇ V Y1 or ⁇ V Y3 is applied for the low bit.
- ON is when the voltage waveform of the row electrode is positive and OFF is when negative, and a display data value of 1 is ON and 0 is OFF; the on/of state of the simultaneously selected row electrodes and the on/off state of the corresponding display data bit at the intersection of the selected row electrode and the column electrode to which the voltage is to be applied are compared for each bit position, and a voltage specified according to the number of mismatches is applied to the column electrode.
- the three row electrodes X1, X2, and X3 are first selected, the selected row electrodes X1, X2, and X3 are OFF, OFF, ON, respectively, and the high bits of the display data at the intersection of the column electrode Y1 and these row electrodes X1, X2, and X3 are OFF, ON, ON.
- the number of mismatches is 1, and the voltage -V Y4 is applied to column electrode Y1 in the first period division a of the first period t1.
- a weighted voltage is simultaneously applied to the other column electrodes Y2 ⁇ Y m in the same manner.
- the on/off state of row electrodes X1, X2, and X3 is the same OFF, OFF, ON, and the middle bits corresponding to this period division b are, in order, ON, OFF, OFF; the number of mismatches is therefore 2, and voltage V Y2 is applied.
- the low bits corresponding to the last period division c are OFF, ON, OFF; the number of mismatches is therefore 2, and voltage V Y1 is applied.
- the voltages -V Y4 , V Y2 , and -V Y3 are applied to the column electrode Y1 during period divisions a, b, c because the on/off states of row electrodes X1, X2, and X3 are OFF, ON, OFF, the high bits of the display data at the intersection of the column electrode Y1 and these row electrodes X1, X2, and X3 are OFF, ON, ON, respectively, and the number of mismatches is 1 as described above, the middle bits are ON, OFF, OFF and the number of mismatches is 2, and the low bits are OFF, ON, OFF and the number of mismatches is 0.
- next period t3 and t4 so that a column voltage corresponding to the number of mismatches is simultaneously applied to all column electrodes Y1 ⁇ Y m and selection of row electrodes X1, X2, and X3 ends, the next row electrodes X4, X5, and X6 are selected and a specified column voltage is applied in the same manner to column electrodes Y1 ⁇ X m , and one frame F ends when all row electrodes have been selected. Thereafter, the first row electrodes X1, X2, and X3 are again selected in sequence and the next frame is started. The sign of the voltage applied to the row electrodes at this time is reversed, and the sign of the voltage applied to the column electrodes is accordingly reversed, to execute so-called alternating current drive scheme.
- the periods t1 ⁇ t4 and the divided periods a, b, c are not essential for the above voltage ratio to conform strictly to the above conditions, and it is not necessary for the periods t1 ⁇ t4 and the divided periods a, b, c to be strictly divided into equal parts, and can, for example, be adjusted according to the characteristics of the liquid crystals.
- the sequence of the divided periods a, b, c can be changed.
- display of a various number of gradations is possible by means of the same principle described above; for example, to achieve a 16 gray scale display, it is sufficient to apply voltages weighted according to each bit of display data expressed using four bits. This is also true of the other embodiments described below.
- the above embodiment 11 provides a single selection period t for the row electrodes in one frame F, but can also divide the selection period into plural parts in one frame F.
- one field can be the period required for all row electrodes to be selected in each of the periods t1 ⁇ t4, and these four fields can be repeated in one frame F, or these periods can be further divided and the sequence repeated for all of the row electrodes for each display data bit.
- Fig. 24, Fig. 26, and Fig. 27 show an example of this case.
- Fig. 24 is an applied voltage waveform showing an embodiment whereby the four periods t1 ⁇ t4 in the eleventh embodiment are divided into plural parts for display drive
- Fig. 25 is a waveform of the row voltage applied to row electrodes X1 ⁇ X6.
- row electrodes X1, X2, and X3 are selected and a column voltage corresponding to the number of mismatches with three bits is sequentially applied to column electrodes Y1 ⁇ Y m in the same way as in the eleventh embodiment above, row electrodes X4, X5, and X6 are next selected and a column voltage is again applied as above, and field f1 for period t1 ends when all row electrodes have been selected.
- the row electrodes are again selected in sequence from row electrodes X1, X2, and X3, field f2 corresponding to the next period t2 is executed, and when all four fields f1 ⁇ f4 corresponding to the four period t1 ⁇ t4 are completed, one frame F is completed.
- Fig. 26 shows the case in which execution is grouped for each display data bit, i.e., for each of the subdivided periods of the four periods t1 ⁇ t4 in the above embodiment.
- the first period division a in the four periods t1 ⁇ t4 in Fig. 1 is treated as one field f1 until all row electrodes have been selected, and one frame is completed when field f2 corresponding to period division b and field f3 corresponding to period division c are similarly completed. Note that the sign of the voltage applied to the row electrodes is reversed each field, and the voltage applied to the column electrodes is also reversed accordingly.
- Fig. 27 shows the case in which execution is further divided and applied to all row electrodes in each of the period divisions a, b, c in Fig. 26.
- the effect is the same as frame rate control modulation applied for each display data bit in the embodiment in Fig. 21 above.
- the row electrode selection period is executed plural times within one frame F as described above, the period in which the selected voltage is not applied to each row electrode, i.e., to each pixel, can be shortened, the variation in display brightness can be reduced, and a loss of contrast can be prevented.
- one selection period is divided into the same number of parts as there are gradation bits n, i.e., three, and a column voltage of one of six levels V Y1 ⁇ V Y6 is selectively applied to the column electrodes, but the number of column voltage levels can be reduced by increasing the above number of divisions.
- the effective voltage when driving the liquid crystal elements of a liquid crystal display panel, etc. is generally determined by the voltage value and the voltage applied time (pulse width), and the panel can be equally driven whether a high voltage is applied for a short time or a low voltage is applied for a long time.
- Fig. 28 is an applied voltage waveform showing an embodiment whereby the number of column voltage levels is decreased.
- each selection period t1, t2, t3, t4 are divided into n parts, i.e., a, b, and c, in Fig. 21, each selection period is divided into (n+1) parts, i.e.,. a, a, b, c, in the present embodiment, and the first two period divisions a, a are assigned to the voltage apply time of the high display data bit.
- V Y5 and V Y2 corresponding to the middle bit which are half the level of V Y6 and V Y4 , are respectively substituted for the V Y6 and V Y4 voltage levels corresponding to the high bit in the eleventh embodiment, and the apply time is twice that of the middle bit.
- the voltage applied to the liquid crystal elements and the time are twice the middle bit and four times the low bit values, and the weighting ratio for each bit is 1:2:4, the same as the case shown in Fig. 1.
- the two highest voltage levels V Y6 and V Y4 in the eleventh embodiment are eliminated by this embodiment, but the voltage levels V Y3 and V Y1 for the low bit can be used, respectively, in place of the middle bit voltage levels V Y5 and V Y2 in the eleventh embodiment, using an apply time twice that of the low bits in the same way as above. Furthermore, it is also possible to eliminate four or more voltage levels, and reducing the number of voltage levels as described above is a particularly effective means of simplifying the drive circuit configuration when there are many gradation levels.
- Fig. 29 is a waveform diagram for the case in which one selection period is divided into (n + 1) parts, i.e., 4 parts, and these selection periods are divided into plural parts in one frame, specifically into four fields f, in the third embodiment as in the second embodiment. Note, however, that the selection periods can also be divided into two or three parts.
- Fig. 30 shows a case in which driving is executed in each of the period divisions of the four periods t1 ⁇ t4 in the above embodiment.
- the first period division a of the period divisions a, a of the four periods t1 ⁇ t4 in Fig. 21 is treated in sequence as one grouping, and the period until all row electrodes have been selected is one field f1, and one frame is completed when field f2 for the next period division a, field f3 for period division b, and field f4 for period division c are completed.
- the sign of the voltage applied to the row electrodes is reversed each field, and the voltage applied to the column electrodes is also reversed accordingly.
- Fig. 31 shows the case in which execution is further divided and applied to all row electrodes in each of the period divisions a, a, b, c in Fig. 10.
- the effective voltage when driving the liquid crystal elements as described above is generally determined by the voltage value applied and the apply time (pulse width), and the desired gray scale display can be achieved by appropriately combining the apply time and the value of the voltage applied to the column electrodes.
- Fig. 32 is an applied voltage waveform for an embodiment achieving a 16 gray scale display based on the display data shown in Fig. 33 by appropriately combining the apply time and the value of the voltage applied to the column electrode.
- This embodiment also sequentially selects three row electrodes, and applies the row voltage to each of the row electrodes during the four selection periods t1 ⁇ t4 as in the first embodiment above.
- Each of these four periods t1 ⁇ t4 is divided into six periods a ⁇ f, and the first two period divisions a, b correspond to the highest bit in the four digit binary display data shown in Fig. 33, the next period division corresponds to the second bit, the next two period divisions d, e to the third bit, and the last period division f corresponds to the lowest bit.
- Column voltage ⁇ V Y4 or ⁇ V Y6 is selectively applied to the column electrodes according to the following conditions for the highest two bits, and ⁇ V Y1 or ⁇ V Y3 is selectively applied for the lowest two bits.
- ON is when the voltage waveform of the row electrode is positive and OFF is when negative, and a display data value of 1 is ON and 0 is OFF; the on/of state of the simultaneously selected row electrodes and the on/off state of the corresponding display data bits at the intersections of the selected row electrode and the column electrode to which the voltage is to be applied are compared for each bit position, and a voltage specified according to the number of mismatches is applied to the column electrode.
- the three row electrodes X1, X2, and X3 are first simultaneously selected, and the selected row electrodes X1, X2, and X3 are OFF, OFF, ON, respectively, and the highest bits of the display data at the intersection of the column electrode Y1 and these row electrodes X1, X2, and X3 are OFF, OFF, ON. Comparing both, the number of mismatches is 0, and the voltage -V Y6 is applied to column electrode Y1 in the first period divisions a, b of the first period t1.
- the second from highest bits are OFF, ON, OFF and the number of mismatches is 2 when compared with the OFF, OFF, ON states of the row electrodes X1, X2, and X3; voltage V Y4 is therefore applied in period division c.
- the second bits are ON, OFF, OFF, the number of mismatches is 2, and voltage V Y1 is applied in period divisions d, e.
- the lowest bits are OFF, ON, OFF, the number of mismatches is 2, and voltage V Y1 is therefore applied.
- a weighted voltage is applied to the other column electrodes Y1 ⁇ Y m in the same way.
- a column voltage corresponding to the number of mismatches is simultaneously applied to all column electrodes Y1 ⁇ Y m in the following periods t2 ⁇ t4 in the same way, selection of row electrodes X1, X2, and X3 ends, the next row electrodes X4, X5, and X6 are selected, the specified column voltages are applied to the column electrodes Y1 ⁇ Y m in the same way as described above, and when all row electrodes have been selected, one frame F ends.
- the sign of the voltage applied to the row electrodes is then reversed because the first row electrodes X1, X2, and X3 are again selected in sequence and the next frame begins, and the sign of the voltage applied to the column electrodes is also reversed for so-called alternating current drive scheme.
- a gray scale display can be achieved with fewer voltage levels, even when there are many gradations.
- the selection period can be divided into plural parts within a single frame F as in the twelfth embodiment.
- Fig. 34 shows this case.
- the periods t1 ⁇ t4 in Fig. 32 are separately divided into four parts in a single frame F as in the second embodiment, one field f lasts until all row electrodes have been selected in each period, and the operation is repeated four times in one frame F.
- the fifteenth embodiment can also be driven for each display data bit or can be further divided as shown in Fig. 30 and Fig. 31 in the fourteenth embodiment.
- Embodiments 11 ⁇ 16 above change the weighting of the display data bit for each column electrode, i.e., change the voltage level applied to the column electrodes, to achieve a gray scale display, but it is also possible to weight the row electrode, i.e., to change the voltage level applied to the row electrode, for a gray scale display.
- Fig. 35 is an applied voltage waveform for the embodiment changing the voltage level applied to the row electrodes according to the display data bit to display eight gradations based on the display data shown in Fig. 22 similarly to the eleventh embodiment.
- the row electrodes are selected sequentially three lines at a time, and voltage V X4 or -V X4 is applied to each row electrode for the high display data bit, V X2 or -V X2 is applied for the middle bit, and V X1 or -V X1 is applied for the low bit where the ratio V X1 :V X2 :V X4 is 1:2:4.
- the ON/OFF states of the row electrodes X1, X2, and X3 and the display data ON/OFF states are compared bit by bit, and when the number of mismatches is 0, 1, 2, and 3, respectively, voltages -V Y3 , -V Y1 , V Y1 , and V Y3 are applied to the column electrodes Y1...; the V Y1 :V Y3 ratio is 1:3.
- the number of voltage levels on the row electrode side is increased rather than increasing the voltage levels on the column electrode side as in the eleventh embodiment, the number of voltage levels applied to the column electrode can be significantly reduced, and the structure of the column electrode-side drive circuit can be simplified.
- the selection period can be divided into plural parts within a single frame F as in the twelfth embodiment.
- Fig. 36, Fig. 37, and Fig. 38 show this case.
- Fig. 36 shows the case in which the periods t1 ⁇ t4 in Fig. 35 are separately divided into four parts in a single frame F as in the twelfth embodiment, one field f lasts until all row electrodes have been selected in each period, and the operation is repeated four times in one frame F.
- Fig. 37 shows the case wherein the display is driven for each display data bit, i.e., in each of the period divisions of the four periods t1 ⁇ t4 in the previous embodiment.
- the first period division a in the four periods t1 ⁇ t4 in Fig. 35 is treated as one field f1 until all row electrodes have been selected, and one frame is completed when field f2 corresponding to the other period division b and field f3 corresponding to period division c are similarly completed. Note that the sign of the voltage applied to the row electrodes is reversed each field, and the voltage applied to the column electrodes is also reversed accordingly.
- Each of the periods t1 ⁇ t4 in Fig. 35 is further divided into four parts in one frame F as in Fig. 28 with the first two period divisions being the apply time for the high bit, and the other period divisions being the apply times for the middle and low bits, respectively.
- the selection period can also be divided into plural parts within a single frame F.
- Fig. 40, Fig. 41, and Fig. 42 show this case.
- Fig. 40 shows the case where the periods t1 ⁇ t4 in Fig. 39 are separately divided into four parts in a single frame F as in Fig. 25, one field f lasts until all row electrodes have been selected in each period, and the operation is repeated four times in one frame F.
- Fig. 41 shows the case in which execution is grouped for each period division of the four periods t1 ⁇ t4 in the previous embodiment; the First period division a of period divisions a, a in the four periods t1 ⁇ t4 in Fig. 39 is treated as one field f1 until all row electrodes have been selected, and one frame is completed when field f2 corresponding to the other period division a, field f3 corresponding to period division b, and field f3 corresponding to period division c are similarly completed. Note that the sign of the voltage applied to the row electrodes is reversed each field, and the voltage applied to the column electrodes is also reversed accordingly.
- Fig. 43 shows an example of this.
- voltage V X4 or -V X4 is used as the applied voltage level to each row electrode for the two highest display data bits, V X1 or -V X1 is applied for the two lowest bits, and the ratio V X1 :V X4 is 1:4.
- the ON/OFF states of the row electrodes X1, X2, and X3 and the display data ON/OFF states are compared bit by bit, and when the number of mismatches is 0, 1, 2, and 3, respectively, voltages -V Y3 , -V Y1 , V Y1 , and V Y3 are applied to the column electrodes Y1...; the V Y1 :V Y3 ratio is 1:3.
- the selection period can also be divided into plural parts within a single frame F.
- Fig. 44 shows this case.
- the periods t1 ⁇ t4 in Fig. 41 are separately divided into four parts in a single frame F as in Fig. 24, one field f lasts until all row electrodes have been selected in each period, and the operation is repeated four times in one frame F.
- embodiment 21 can also be driven for each display data bit or can be further divided as in embodiment 20 shown in Fig. 41 and Fig. 42.
- the waveform of the voltages applied to the row electrodes shall not be limited to the embodiments, and the waveforms can be changed to the waveforms as shown in Fig. 48 (a) and (b) or Fig. 3 (a) and (b), or the pulse widths thereof can be appropriately selected or the order changed insofar as the waveforms applied to the simultaneously selected row electrodes do not become intermixed and the row electrodes can be separately driven.
- a drive method and display apparatus for liquid crystal elements according to the present invention as described above simultaneously selects plural sequential row electrodes, divides one selection period into plural periods, and in each of these divided selection periods applies a voltage weighted according to the desired display data to achieve a gray scale display.
- a voltage weighted according to the desired display data to achieve a gray scale display.
- the drive means of the drive can be structurally simplified, and a liquid crystal element drive method and display apparatus featuring outstanding reliability and display performance can be provided by means of the invention.
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP97120078A EP0836173B1 (de) | 1992-05-08 | 1993-05-10 | Verfahren zur Multiplexsteuerung einer elektrooptischen Matrix-Flüssigkristallvorrichtung |
Applications Claiming Priority (10)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP143482/92 | 1992-05-08 | ||
JP14348292 | 1992-05-08 | ||
JP14348292 | 1992-05-08 | ||
JP12362392 | 1992-05-15 | ||
JP12362392 | 1992-05-15 | ||
JP123623/92 | 1992-05-15 | ||
JP19907792 | 1992-07-02 | ||
JP199077/92 | 1992-07-02 | ||
JP19907792 | 1992-07-02 | ||
PCT/JP1993/000604 WO1993023844A1 (en) | 1992-05-08 | 1993-05-10 | Method and circuit for driving liquid crystal device, etc., and display device |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP97120078A Division EP0836173B1 (de) | 1992-05-08 | 1993-05-10 | Verfahren zur Multiplexsteuerung einer elektrooptischen Matrix-Flüssigkristallvorrichtung |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0598913A1 true EP0598913A1 (de) | 1994-06-01 |
EP0598913A4 EP0598913A4 (de) | 1994-10-26 |
EP0598913B1 EP0598913B1 (de) | 1999-10-13 |
Family
ID=27314759
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP93911979A Expired - Lifetime EP0598913B1 (de) | 1992-05-08 | 1993-05-10 | Steuerungsverfahren und -schaltung für flüssigkristallelemente und bildanzeigevorrichtung |
EP97120078A Expired - Lifetime EP0836173B1 (de) | 1992-05-08 | 1993-05-10 | Verfahren zur Multiplexsteuerung einer elektrooptischen Matrix-Flüssigkristallvorrichtung |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP97120078A Expired - Lifetime EP0836173B1 (de) | 1992-05-08 | 1993-05-10 | Verfahren zur Multiplexsteuerung einer elektrooptischen Matrix-Flüssigkristallvorrichtung |
Country Status (5)
Country | Link |
---|---|
EP (2) | EP0598913B1 (de) |
JP (2) | JP3508115B2 (de) |
DE (2) | DE69331812T2 (de) |
TW (1) | TW280874B (de) |
WO (1) | WO1993023844A1 (de) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0683479A1 (de) * | 1994-05-18 | 1995-11-22 | Seiko Instruments Inc. | Graustufenansteuervorrichtung insbesondere geeignet für aktive Steuerung |
WO1996006423A1 (en) * | 1994-08-23 | 1996-02-29 | Asahi Glass Company Ltd. | Driving method for a liquid crystal display device |
EP0720141A2 (de) * | 1994-12-27 | 1996-07-03 | Seiko Instruments Inc. | Graustufenansteuereinrichtung für eine Flüssigkristallanzeigetafel mit aktiver Steuerung |
FR2738378A1 (fr) * | 1995-09-05 | 1997-03-07 | Samsung Display Devices Co Ltd | Procede de commande d'affichage a cristaux liquides |
US5739803A (en) * | 1994-01-24 | 1998-04-14 | Arithmos, Inc. | Electronic system for driving liquid crystal displays |
EP1079364A1 (de) * | 1999-03-15 | 2001-02-28 | Seiko Epson Corporation | Flüssigkristallanzeige und verfahren zum antreiben von flüssigkristallanzeige |
EP1365384A1 (de) * | 2002-05-23 | 2003-11-26 | STMicroelectronics S.r.l. | Ansteuerverfahren für Flachbildschirme |
EP1396838A1 (de) * | 2001-06-13 | 2004-03-10 | Kawasaki Microelectronics, Inc. | Einfaches ansteuerverfahren und einfache ansteuervorrichtung für matrix-flüssigkristalle |
EP1471496A1 (de) * | 2003-04-23 | 2004-10-27 | STMicroelectronics S.r.l. | Verfahren zum Steuern eines Flüssigkristallanzeigegeräts |
WO2004111987A1 (en) * | 2003-06-12 | 2004-12-23 | Koninklijke Philips Electronics N.V. | Energy saving passive matrix display device and method for driving |
Families Citing this family (5)
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FR2784489B1 (fr) * | 1998-10-13 | 2000-11-24 | Thomson Multimedia Sa | Procede d'affichage de donnees sur un afficheur matriciel |
JP3642328B2 (ja) * | 2001-12-05 | 2005-04-27 | セイコーエプソン株式会社 | 電気光学装置、その駆動回路、駆動方法及び電子機器 |
JP2004287118A (ja) | 2003-03-24 | 2004-10-14 | Hitachi Ltd | 表示装置 |
JP4945119B2 (ja) * | 2005-11-16 | 2012-06-06 | 株式会社ブリヂストン | 情報表示用パネルの駆動方法 |
TW201227660A (en) * | 2010-12-22 | 2012-07-01 | Ind Tech Res Inst | Apparatus and method for driving multi-stable display panel |
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EP0349415A1 (de) * | 1988-06-29 | 1990-01-03 | Commissariat A L'energie Atomique | Verfahren und Einrichtung zur Steuerung eines Matrixbildschirmes, der Grauwerte anzeigt |
EP0479450A2 (de) * | 1990-10-01 | 1992-04-08 | Raytheon Company | Helligkeitsregelung für eine flache Anzeigeeinrichtung |
EP0507061A2 (de) * | 1991-04-01 | 1992-10-07 | In Focus Systems, Inc. | Adressierungssystem für eine Flüssigkristallanzeige |
EP0569974A2 (de) * | 1992-05-14 | 1993-11-18 | In Focus Systems, Inc. | Graupegeladressierung für LCD's |
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JPS62102230A (ja) * | 1985-10-30 | 1987-05-12 | Seiko Epson Corp | 液晶素子の駆動方法 |
JP2675060B2 (ja) * | 1988-04-20 | 1997-11-12 | 株式会社日立製作所 | アクティブマトリクス方式の表示装置及びその走査回路と走査回路の駆動回路 |
JP2823614B2 (ja) * | 1989-12-15 | 1998-11-11 | 株式会社日立製作所 | 階調表示方式および液晶表示装置 |
EP0522510B1 (de) * | 1991-07-08 | 1996-10-02 | Asahi Glass Company Ltd. | Steuerverfahren für ein Flüssigkristallanzeigeelement |
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- 1993-05-10 JP JP52004893A patent/JP3508115B2/ja not_active Expired - Lifetime
- 1993-05-10 EP EP93911979A patent/EP0598913B1/de not_active Expired - Lifetime
- 1993-05-10 EP EP97120078A patent/EP0836173B1/de not_active Expired - Lifetime
- 1993-05-10 DE DE1993631812 patent/DE69331812T2/de not_active Expired - Lifetime
- 1993-05-10 WO PCT/JP1993/000604 patent/WO1993023844A1/ja active IP Right Grant
- 1993-05-10 DE DE69326740T patent/DE69326740T2/de not_active Expired - Lifetime
- 1993-06-17 TW TW082104841A patent/TW280874B/zh not_active IP Right Cessation
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EP0479450A2 (de) * | 1990-10-01 | 1992-04-08 | Raytheon Company | Helligkeitsregelung für eine flache Anzeigeeinrichtung |
EP0507061A2 (de) * | 1991-04-01 | 1992-10-07 | In Focus Systems, Inc. | Adressierungssystem für eine Flüssigkristallanzeige |
EP0569974A2 (de) * | 1992-05-14 | 1993-11-18 | In Focus Systems, Inc. | Graupegeladressierung für LCD's |
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Cited By (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5739803A (en) * | 1994-01-24 | 1998-04-14 | Arithmos, Inc. | Electronic system for driving liquid crystal displays |
EP0683479A1 (de) * | 1994-05-18 | 1995-11-22 | Seiko Instruments Inc. | Graustufenansteuervorrichtung insbesondere geeignet für aktive Steuerung |
US5696524A (en) * | 1994-05-18 | 1997-12-09 | Seiko Instruments Inc. | Gradative driving apparatus of liquid crystal display panel |
WO1996006423A1 (en) * | 1994-08-23 | 1996-02-29 | Asahi Glass Company Ltd. | Driving method for a liquid crystal display device |
CN1107301C (zh) * | 1994-08-23 | 2003-04-30 | 旭硝子株式会社 | 液晶显示器的驱动方法 |
EP0720141A2 (de) * | 1994-12-27 | 1996-07-03 | Seiko Instruments Inc. | Graustufenansteuereinrichtung für eine Flüssigkristallanzeigetafel mit aktiver Steuerung |
EP0720141A3 (de) * | 1994-12-27 | 1996-07-10 | Seiko Instr Inc | |
US5815128A (en) * | 1994-12-27 | 1998-09-29 | Seiko Instruments Inc. | Gray shade driving device of liquid crystal display |
FR2738378A1 (fr) * | 1995-09-05 | 1997-03-07 | Samsung Display Devices Co Ltd | Procede de commande d'affichage a cristaux liquides |
US5774103A (en) * | 1995-09-05 | 1998-06-30 | Samsung Display Devices Co., Ltd. | Method for driving a liquid crystal display |
EP1079364A4 (de) * | 1999-03-15 | 2003-01-02 | Seiko Epson Corp | Flüssigkristallanzeige und verfahren zum antreiben von flüssigkristallanzeige |
EP1079364A1 (de) * | 1999-03-15 | 2001-02-28 | Seiko Epson Corporation | Flüssigkristallanzeige und verfahren zum antreiben von flüssigkristallanzeige |
US6657610B1 (en) | 1999-03-15 | 2003-12-02 | Seiko Epson Corporation | Liquid-crystal display device and method of driving the same |
EP1396838A1 (de) * | 2001-06-13 | 2004-03-10 | Kawasaki Microelectronics, Inc. | Einfaches ansteuerverfahren und einfache ansteuervorrichtung für matrix-flüssigkristalle |
US7209129B2 (en) | 2001-06-13 | 2007-04-24 | Kawasaki Microelectronics, Inc. | Method and apparatus for driving passive matrix liquid crystal |
EP1396838A4 (de) * | 2001-06-13 | 2008-04-30 | Kawasaki Microelectronics Inc | Einfaches ansteuerverfahren und einfache ansteuervorrichtung für matrix-flüssigkristalle |
US7403195B2 (en) | 2001-06-13 | 2008-07-22 | Kawasaki Microelectronics, Inc. | Method and apparatus for driving passive matrix liquid crystal |
EP1365384A1 (de) * | 2002-05-23 | 2003-11-26 | STMicroelectronics S.r.l. | Ansteuerverfahren für Flachbildschirme |
EP1471496A1 (de) * | 2003-04-23 | 2004-10-27 | STMicroelectronics S.r.l. | Verfahren zum Steuern eines Flüssigkristallanzeigegeräts |
WO2004111987A1 (en) * | 2003-06-12 | 2004-12-23 | Koninklijke Philips Electronics N.V. | Energy saving passive matrix display device and method for driving |
CN100446073C (zh) * | 2003-06-12 | 2008-12-24 | Nxp股份有限公司 | 节能的无源矩阵显示装置及其驱动方法 |
Also Published As
Publication number | Publication date |
---|---|
EP0836173A2 (de) | 1998-04-15 |
DE69326740D1 (de) | 1999-11-18 |
EP0836173A3 (de) | 1999-04-07 |
DE69326740T2 (de) | 2000-04-06 |
WO1993023844A1 (en) | 1993-11-25 |
DE69331812D1 (de) | 2002-05-16 |
DE69331812T2 (de) | 2002-11-14 |
EP0836173B1 (de) | 2002-04-10 |
JP3391334B2 (ja) | 2003-03-31 |
EP0598913A4 (de) | 1994-10-26 |
JP2000347163A (ja) | 2000-12-15 |
TW280874B (de) | 1996-07-11 |
JP3508115B2 (ja) | 2004-03-22 |
EP0598913B1 (de) | 1999-10-13 |
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